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Merge "ARM: dts: msm: Add interconnect voting for Debug UART instance in Tuna"

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QCTECMDR Service
2024-11-27 13:08:31 -08:00
committed by Gerrit - the friendly Code Review server
parent b95397b61c 3307867c54
commit 914fa6a79a
1 changed files with 5 additions and 0 deletions
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qcom/tuna-qupv3.dtsi
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@@ -390,6 +390,11 @@
interrupts = <GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
<&aggre1_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se7_2uart_tx_active>, <&qupv3_se7_2uart_rx_active>; pinctrl-0 = <&qupv3_se7_2uart_tx_active>, <&qupv3_se7_2uart_rx_active>;
pinctrl-1 = <&qupv3_se7_2uart_sleep>; pinctrl-1 = <&qupv3_se7_2uart_sleep>;