From 909b17e5d0e318f56aed39a5235bd4a84271f8a0 Mon Sep 17 00:00:00 2001
From: Meena Pasumarthi <quic_pasumart@quicinc.com>
Date: Mon, 6 Nov 2023 11:42:35 +0530
Subject: [PATCH] ARM: dts: msm: gunyah: Add msgq,dbl,irq test node for
 pineapple

1. Add message-queue, doorbell test node to pineapple.dtsi,
   pineapple-vm.dtsi, pineapple-oemvm.dtsi.
2. Add irq lend test node to pineapple.dtsi and pineapple-vm.dtsi.
3. These nodes validate hypervisor message-queue,doorbell and
   irq lend functionalities respectively.

Change-Id: Iff5d8652b55c3d32adf92b3c16e501e85db75a49
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
---
 qcom/pineapple-oemvm.dtsi | 32 +++++++++++++++++++++++++++++
 qcom/pineapple-vm.dtsi    | 43 +++++++++++++++++++++++++++++++++++++++
 qcom/pineapple.dtsi       | 31 ++++++++++++++++++++++++++++
 3 files changed, 106 insertions(+)

diff --git a/qcom/pineapple-oemvm.dtsi b/qcom/pineapple-oemvm.dtsi
index d86df3e0..c4a1b226 100644
--- a/qcom/pineapple-oemvm.dtsi
+++ b/qcom/pineapple-oemvm.dtsi
@@ -157,6 +157,28 @@
 				};
 			};
 
+			test-dbl-oemvm {
+				vdevice-type = "doorbell";
+				generate = "/hypervisor/test-dbl-oemvm";
+				qcom,label = <0x5>;
+				peer-default;
+			};
+
+			test-dbl-oemvm-source {
+				vdevice-type = "doorbell-source";
+				generate = "/hypervisor/test-dbl-oemvm-source";
+				qcom,label = <0x5>;
+				peer-default;
+			};
+
+			test-msgq-oemvm {
+				vdevice-type = "message-queue-pair";
+				generate = "/hypervisor/test-msgq-oemvm-pair";
+				message-size = <0xf0>;
+				queue-depth = <0x8>;
+				qcom,label = <0x5>;
+				peer-default;
+			};
 		};
 	};
 
@@ -200,4 +222,14 @@
 		clock-frequency = <19200000>;
 	};
 
+	qcom,test-dbl-oemvm {
+		compatible = "qcom,gh-dbl";
+		qcom,label = <0x5>;
+	};
+
+	qcom,test-msgq-oemvm {
+		compatible = "qcom,gh-msgq-test";
+		gunyah-label = <5>;
+		affinity = <0>;
+	};
 };
diff --git a/qcom/pineapple-vm.dtsi b/qcom/pineapple-vm.dtsi
index d0db4b56..9293b4d0 100644
--- a/qcom/pineapple-vm.dtsi
+++ b/qcom/pineapple-vm.dtsi
@@ -199,6 +199,29 @@
 					allocate-base;
 				};
 			};
+
+			test-dbl-tuivm {
+				vdevice-type = "doorbell";
+				generate = "/hypervisor/test-dbl-tuivm";
+				qcom,label = <0x4>;
+				peer-default;
+			};
+
+			test-dbl-tuivm-source {
+				vdevice-type = "doorbell-source";
+				generate = "/hypervisor/test-dbl-tuivm-source";
+				qcom,label = <0x4>;
+				peer-default;
+			};
+
+			test-msgq-tuivm {
+				vdevice-type = "message-queue-pair";
+				generate = "/hypervisor/test-msgq-tuivm-pair";
+				message-size = <0xf0>;
+				queue-depth = <0x8>;
+				qcom,label = <0x4>;
+				peer-default;
+			};
 		};
 	};
 
@@ -295,6 +318,26 @@
 		qcom,ipa-range = <0x0 0x0 0xf 0xffffffff>;
 		qcom,block-size = <0x400000>;
 	};
+
+	qcom,test-dbl-tuivm {
+		compatible = "qcom,gh-dbl";
+		qcom,label = <0x4>;
+	};
+
+	qcom,test-msgq-tuivm {
+		compatible = "qcom,gh-msgq-test";
+		gunyah-label = <4>;
+		affinity = <0>;
+	};
+
+	qcom,gh-qtimer@17425000 {
+		compatible = "qcom,gh-qtmr";
+		reg = <0x17425000 0x1000>;
+		reg-names = "qtmr-base";
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "qcom,qtmr-intr";
+		qcom,secondary;
+	};
 };
 
 #include "msm-arm-smmu-pineapple-vm.dtsi"
diff --git a/qcom/pineapple.dtsi b/qcom/pineapple.dtsi
index ee721b6a..3f9126e2 100644
--- a/qcom/pineapple.dtsi
+++ b/qcom/pineapple.dtsi
@@ -2516,6 +2516,16 @@
 		restrict-access;
 	};
 
+	qcom,test-dbl-tuivm {
+		compatible = "qcom,gh-dbl";
+		qcom,label = <0x4>;
+	};
+
+	qcom,test-dbl-oemvm {
+		compatible = "qcom,gh-dbl";
+		qcom,label = <0x5>;
+	};
+
 	qcom,pmic_glink {
 		compatible = "qcom,qti-pmic-glink";
 		qcom,pmic-glink-channel = "PMIC_RTR_ADSP_APPS";
@@ -2578,6 +2588,27 @@
 		};
 	};
 
+	qcom,test-msgq-tuivm {
+		compatible = "qcom,gh-msgq-test";
+		gunyah-label = <4>;
+		qcom,primary;
+	};
+
+	qcom,test-msgq-oemvm {
+		compatible = "qcom,gh-msgq-test";
+		gunyah-label = <5>;
+		qcom,primary;
+	};
+
+	qcom,gh-qtimer@17425000 {
+		compatible = "qcom,gh-qtmr";
+		reg = <0x17425000 0x1000>;
+		reg-names = "qtmr-base";
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "qcom,qtmr-intr";
+		qcom,primary;
+	};
+
 	msm_gpu: qcom,kgsl-3d0@3d00000 { };
 
 	mmio_sram: mmio-sram@17D09400 {