From 332c4d4778b279ba3893ff64740ccc93b76b627d Mon Sep 17 00:00:00 2001 From: Sayantan Chakraborty Date: Sun, 15 Dec 2024 01:45:56 +0530 Subject: [PATCH 01/29] ARM: dts: msm: Add MPAM,NOC BW MPAM node for Kera Add device nodes for MPAM,NOC BW MPAM node for Kera. Change-Id: I9c366e7460cbe23f1646026c77755c2ab93faa61 Signed-off-by: Sayantan Chakraborty --- qcom/kera.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 805a0525..62d89728 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -2226,6 +2226,44 @@ compatible = "qcom,cpufreq-stats-v2"; }; + qcom_mpam: qcom,mpam { + compatible = "qcom,mpam"; + }; + + cpu_mpam: qcom,cpu_mpam { + compatible = "qcom,cpu-mpam"; + + L3 { + qcom,msc-id = <0>; + qcom,msc-name = "L3"; + }; + }; + + noc_bw_mpam: qcom,noc_bw_mpam { + compatible = "qcom,platform-mpam"; + reg = <0x17D2E800 0x400>; + reg-names = "mon-base"; + qcom,msc-id = <3>; + qcom,msc-name = "noc_bw"; + qcom,gears = "low", "medium", "high", "veryhigh"; + qcom,gear-id = <1>, <2>, <3>, <4>; + + cpu { + qcom,client-id = <0x1>; + qcom,client-name = "cpu"; + }; + + gpu { + qcom,client-id = <0x10>; + qcom,client-name = "gpu"; + }; + + nsp { + qcom,client-id = <0x100>; + qcom,client-name = "nsp"; + }; + }; + spmi_bus: spmi0_bus: qcom,spmi@c42d000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc42d000 0x4000>, From 1dfb188a7f69132ee5fd42da32d7fe3c7a8da243 Mon Sep 17 00:00:00 2001 From: Manish Pandey Date: Fri, 3 Jan 2025 11:15:48 +0530 Subject: [PATCH 02/29] ARM: dts: msm: Add UFS support for kera-atp platform Add UFS support for kera atp platform. Change-Id: Idd02434cd3186a0de96d8b3212646cfe09873778 Signed-off-by: Manish Pandey --- qcom/kera-atp.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/qcom/kera-atp.dtsi b/qcom/kera-atp.dtsi index ed1d67d3..f9a92385 100644 --- a/qcom/kera-atp.dtsi +++ b/qcom/kera-atp.dtsi @@ -1,8 +1,9 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include +#include "kera_ufs4.dtsi" &sdhc_2 { vdd-supply = <&L13B>; From 96bfcbe1dcca19b3282a0e5e9b1fb88ec23e94e7 Mon Sep 17 00:00:00 2001 From: Kavya Nunna Date: Sat, 28 Dec 2024 15:17:48 +0530 Subject: [PATCH 03/29] ARM: dts: msm: Include pmiv0102 for kera qrd platforms Add PMIV0102 support for kera-qrd/rcm platforms. Change-Id: I70b374053e7b007bc1375f54fb760e332435691c Signed-off-by: Kavya Nunna --- qcom/kera-qrd-qca6750-ufs2-overlay.dts | 1 + qcom/kera-qrd-wcn7750-ufs2-overlay.dts | 1 + qcom/kera-qrd-wcn7750-ufs3-overlay.dts | 1 + qcom/kera-rcm-wcn7750-ufs4-overlay.dts | 1 + 4 files changed, 4 insertions(+) diff --git a/qcom/kera-qrd-qca6750-ufs2-overlay.dts b/qcom/kera-qrd-qca6750-ufs2-overlay.dts index d0e3b143..0d661b50 100644 --- a/qcom/kera-qrd-qca6750-ufs2-overlay.dts +++ b/qcom/kera-qrd-qca6750-ufs2-overlay.dts @@ -7,6 +7,7 @@ /plugin/; #include "kera-qrd-qca6750-ufs2.dtsi" +#include "kera-pmiv0102.dtsi" / { model = "Qualcomm Technologies, Inc. Kera QRD + QCA6750 + UFS2"; diff --git a/qcom/kera-qrd-wcn7750-ufs2-overlay.dts b/qcom/kera-qrd-wcn7750-ufs2-overlay.dts index 10cd2559..d6593fbe 100644 --- a/qcom/kera-qrd-wcn7750-ufs2-overlay.dts +++ b/qcom/kera-qrd-wcn7750-ufs2-overlay.dts @@ -7,6 +7,7 @@ /plugin/; #include "kera-qrd-wcn7750-ufs2.dtsi" +#include "kera-pmiv0102.dtsi" / { model = "Qualcomm Technologies, Inc. Kera QRD + WCN7750 + UFS2"; diff --git a/qcom/kera-qrd-wcn7750-ufs3-overlay.dts b/qcom/kera-qrd-wcn7750-ufs3-overlay.dts index 533095a1..18c22570 100644 --- a/qcom/kera-qrd-wcn7750-ufs3-overlay.dts +++ b/qcom/kera-qrd-wcn7750-ufs3-overlay.dts @@ -7,6 +7,7 @@ /plugin/; #include "kera-qrd-wcn7750-ufs3.dtsi" +#include "kera-pmiv0102.dtsi" / { model = "Qualcomm Technologies, Inc. Kera QRD + WCN7750 + UFS3"; diff --git a/qcom/kera-rcm-wcn7750-ufs4-overlay.dts b/qcom/kera-rcm-wcn7750-ufs4-overlay.dts index d3816403..02ce058f 100644 --- a/qcom/kera-rcm-wcn7750-ufs4-overlay.dts +++ b/qcom/kera-rcm-wcn7750-ufs4-overlay.dts @@ -7,6 +7,7 @@ /plugin/; #include "kera-rcm-wcn7750-ufs4.dtsi" +#include "kera-pmiv0102.dtsi" / { model = "Qualcomm Technologies, Inc. Kera RCM + WCN7750 + UFS4"; From 250999288a7377c096e5183333d8c9adb0a633c1 Mon Sep 17 00:00:00 2001 From: Kavya Nunna Date: Fri, 27 Dec 2024 12:11:53 +0530 Subject: [PATCH 04/29] ARM: dts: msm: Disable sys-therm-11 node for kera Disable sys-therm-11 node for kera as it is not required in kera platforms. While at it disable amoled-ecm for pmiv0102 kera platforms. Change-Id: Iadc6ef3fdddfc32789540e829f96d938f3fa2cd8 Signed-off-by: Kavya Nunna --- qcom/kera-atp.dtsi | 12 ++++++++++++ qcom/kera-cdp.dtsi | 12 ++++++++++++ qcom/kera-mtp.dtsi | 13 ++++++++++++- qcom/kera-pmic-overlay.dtsi | 3 --- qcom/kera-pmiv0102.dtsi | 4 ---- qcom/kera-qrd.dtsi | 12 ++++++++++++ qcom/kera-rcm.dtsi | 12 ++++++++++++ qcom/tuna-pmic-overlay.dtsi | 6 +++--- 8 files changed, 63 insertions(+), 11 deletions(-) diff --git a/qcom/kera-atp.dtsi b/qcom/kera-atp.dtsi index ed1d67d3..5b09937c 100644 --- a/qcom/kera-atp.dtsi +++ b/qcom/kera-atp.dtsi @@ -31,3 +31,15 @@ &pmic_glink_adc { status = "disabled"; }; + +&pmxr2230_sys_therm_11 { + status = "disabled"; +}; + +&sys_therm_11 { + status = "disabled"; +}; + +&pm8550ve_f_die_temp { + status = "disabled"; +}; diff --git a/qcom/kera-cdp.dtsi b/qcom/kera-cdp.dtsi index f9d8f28b..6c89c76e 100644 --- a/qcom/kera-cdp.dtsi +++ b/qcom/kera-cdp.dtsi @@ -64,3 +64,15 @@ &tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>; }; }; + +&pmxr2230_sys_therm_11 { + status = "disabled"; +}; + +&sys_therm_11 { + status = "disabled"; +}; + +&pm8550ve_f_die_temp { + status = "disabled"; +}; diff --git a/qcom/kera-mtp.dtsi b/qcom/kera-mtp.dtsi index fe3b8f24..b5b73f13 100644 --- a/qcom/kera-mtp.dtsi +++ b/qcom/kera-mtp.dtsi @@ -7,7 +7,6 @@ #include #include #include -#include "pmk8550.dtsi" &sdhc_2 { vdd-supply = <&L13B>; @@ -77,3 +76,15 @@ &tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>; }; }; + +&pmxr2230_sys_therm_11 { + status = "disabled"; +}; + +&sys_therm_11 { + status = "disabled"; +}; + +&pm8550ve_f_die_temp { + status = "disabled"; +}; diff --git a/qcom/kera-pmic-overlay.dtsi b/qcom/kera-pmic-overlay.dtsi index 7563e31f..e0a3983c 100644 --- a/qcom/kera-pmic-overlay.dtsi +++ b/qcom/kera-pmic-overlay.dtsi @@ -24,6 +24,3 @@ }; }; -&thermal_zones { - /delete-node/ sys-therm-11; -}; diff --git a/qcom/kera-pmiv0102.dtsi b/qcom/kera-pmiv0102.dtsi index 9d63b135..0b4586c1 100644 --- a/qcom/kera-pmiv0102.dtsi +++ b/qcom/kera-pmiv0102.dtsi @@ -9,10 +9,6 @@ status= "ok"; }; -&pmiv010x_amoled_ecm { - status = "ok"; -}; - &pmiv010x_eusb2_repeater { vdd18-supply = <&L7B>; vdd3-supply = <&L17B>; diff --git a/qcom/kera-qrd.dtsi b/qcom/kera-qrd.dtsi index bc809756..6981e8c7 100644 --- a/qcom/kera-qrd.dtsi +++ b/qcom/kera-qrd.dtsi @@ -106,3 +106,15 @@ label = "smb1393_1_die_temp"; }; }; + +&pmxr2230_sys_therm_11 { + status = "disabled"; +}; + +&sys_therm_11 { + status = "disabled"; +}; + +&pm8550ve_f_die_temp { + status = "disabled"; +}; diff --git a/qcom/kera-rcm.dtsi b/qcom/kera-rcm.dtsi index f9d8f28b..6c89c76e 100644 --- a/qcom/kera-rcm.dtsi +++ b/qcom/kera-rcm.dtsi @@ -64,3 +64,15 @@ &tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>; }; }; + +&pmxr2230_sys_therm_11 { + status = "disabled"; +}; + +&sys_therm_11 { + status = "disabled"; +}; + +&pm8550ve_f_die_temp { + status = "disabled"; +}; diff --git a/qcom/tuna-pmic-overlay.dtsi b/qcom/tuna-pmic-overlay.dtsi index a934e553..9424acf6 100644 --- a/qcom/tuna-pmic-overlay.dtsi +++ b/qcom/tuna-pmic-overlay.dtsi @@ -279,7 +279,7 @@ }; }; - sys-therm-11 { + sys_therm_11: sys-therm-11 { polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&pmk8550_vadc PMXR2230_ADC5_GEN3_AMUX_THM5_100K_PU>; @@ -387,7 +387,7 @@ qcom,adc-tm-type = <1>; }; - pmxr2230_sys_therm_11 { + pmxr2230_sys_therm_11: pmxr2230_sys_therm_11 { reg = ; label = "pmxr2230_sys_therm_11"; qcom,ratiometric; @@ -408,7 +408,7 @@ qcom,pre-scaling = <1 1>; }; - pm8550ve_f_die_temp { + pm8550ve_f_die_temp: pm8550ve_f_die_temp { reg = ; label = "pm8550ve_f_die_temp"; qcom,pre-scaling = <1 1>; From f3d10cad83742d4c85522aec273f01a00c350a94 Mon Sep 17 00:00:00 2001 From: Prasanna S Date: Thu, 2 Jan 2025 17:54:57 +0530 Subject: [PATCH 05/29] Revert "ARM: dts: qcom: Update HLOS Audio LPM memory region for kera" Updated the HLOS Audio LPM memory region for Kera is causing bootup crash. Keep the HLOS Audio LPM memory region for Kera same as base target sun and tuna. Fixes: 87876b303b5e ("ARM: dts: qcom: Update HLOS Audio LPM memory region for kera") Change-Id: I99ff160e4679b92dce337bd66d2ee1898a4470f0 Signed-off-by: Prasanna S --- qcom/kera.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 38fc677f..97f949d2 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1139,7 +1139,7 @@ slimbam: bamdma@6c04000 { compatible = "qcom,bam-v1.7.0"; - reg = <0x6c04000 0x20000>, <0x6c93000 0x1000>; + reg = <0x6c04000 0x20000>, <0x6c8f000 0x1000>; reg-names = "bam", "bam_remote_mem"; interrupts = ; num-channels = <31>; @@ -1151,7 +1151,7 @@ slim_msm: slim@6c40000 { compatible = "qcom,slim-ngd-v1.5.0"; - reg = <0x6c40000 0x2c000>, <0x6c92000 0x1000>; + reg = <0x6c40000 0x2c000>, <0x6c8e000 0x1000>; reg-names = "ctrl", "slimbus_remote_mem"; interrupts = ; dmas = <&slimbam 3>, <&slimbam 4>; From 355b5a3bb00069670f8f27dca7c5e2c6260da2af Mon Sep 17 00:00:00 2001 From: Manish Pandey Date: Mon, 6 Jan 2025 15:18:34 +0530 Subject: [PATCH 06/29] ARM: dts: msm: Add UFS CPU masks for tuna Add `qcom,cluster-mask`, and `qcom,esi-affinity-mask` to specify CPU and cluster configurations. These additions aim to enhance UFS performance by optimizing CPU and cluster utilization. Change-Id: Ib54d842d47341190a3b400e91a4520d2b72a4e24 Signed-off-by: Manish Pandey --- qcom/tuna.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi index 6d624ac0..2ea0aa67 100644 --- a/qcom/tuna.dtsi +++ b/qcom/tuna.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -2535,7 +2535,8 @@ qcom,ice-use-hwkm; qcom,prime-mask = <0x80>; qcom,silver-mask = <0x0f>; - qcom,esi-affinity-mask = <1 1 4 4 3 6 6 7>; + qcom,cluster-mask = <0x03 0x1c 0x60 0x80>; + qcom,esi-affinity-mask = <5 6 7 7 7 6 6 5>; lanes-per-direction = <2>; clock-names = From 32b6a7bbaf6c724df216f7c7f2f237045f140a17 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 27 Dec 2024 13:10:21 +0530 Subject: [PATCH 07/29] ARM: dts: qcom: remove unused gpio Removal of I2S0_DATA1 pin, as GPIO_63 is not used internally for I2S purpose and it is being used by other subsystem. Change-Id: I7c3636f9dfcebc68ed3da95793c158e70ad95184 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- qcom/kera-pinctrl.dtsi | 31 ------------------------------- 1 file changed, 31 deletions(-) diff --git a/qcom/kera-pinctrl.dtsi b/qcom/kera-pinctrl.dtsi index 3eef2cd5..4a7c6acd 100644 --- a/qcom/kera-pinctrl.dtsi +++ b/qcom/kera-pinctrl.dtsi @@ -94,37 +94,6 @@ }; }; - i2s0_sd1 { - i2s0_sd1_sleep: i2s0_sd1_sleep { - mux { - pins = "gpio63"; - function = "gpio"; - }; - - config { - pins = "gpio63"; - drive-strength = <2>; /* 2 mA */ - bias-pull-down; /* PULL DOWN */ - input-enable; - }; - }; - - i2s0_sd1_active: i2s0_sd1_active { - mux { - pins = "gpio63"; - function = "i2s0_data1"; - }; - - config { - pins = "gpio63"; - drive-strength = <8>; /* 8 mA */ - bias-disable; /* NO PULL */ - output-high; - }; - }; - }; - - /* WCD reset pin */ wcd_reset_active: wcd_reset_active { mux { From 2754050ea7d2c63850ccc8260223452c6057e4a0 Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Fri, 27 Dec 2024 16:09:59 +0530 Subject: [PATCH 08/29] ARM: dts: qcom: Add PCIE CRM device for sdxkova Add PCIE CRM device for local vote aggregation at subsystem level. Change-Id: I7d7254bcd1aa83bb5d20ccd5af51afd1589c8e6a Signed-off-by: Sneh Mankad --- qcom/sdxkova.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi index 5130ff86..600596c9 100644 --- a/qcom/sdxkova.dtsi +++ b/qcom/sdxkova.dtsi @@ -276,6 +276,18 @@ compatible = "qcom,lpm-cluster-dev"; power-domains = <&CLUSTER_PD>; }; + + pcie_crm: crm@501000 { + label = "pcie_crm"; + compatible = "qcom,pcie-crm"; + reg = <0x0 0x501000 0x0 0x3000>, <0x0 0x504800 0x0 0x800>, <0x0 0x505000 0x0 0x2000>, <0x0 0x504000 0x0 0x800>; + reg-names = "base", "crm_b", "crm_c", "crm_v"; + interrupts = ; + interrupt-names = "pcie_crm"; + clocks = <&pcie_pipe_clk>; + qcom,hw-drv-ids = <0>; + qcom,sw-drv-ids = <0>; + }; }; firmware: firmware { }; From 6f99f4f9dc9ca88229622833f86fb0333e94223b Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Fri, 27 Dec 2024 17:48:43 +0530 Subject: [PATCH 09/29] bindings: soc: qcom: Document pcie-pdc compatibility for sdxkova Document pcie-pdc compatibility for sdxkova. Change-Id: Ib546e947769e0f8f6e0126a8a3a5fd48117a03bb Signed-off-by: Sneh Mankad --- bindings/soc/qcom/qcom,pcie-pdc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/bindings/soc/qcom/qcom,pcie-pdc.yaml b/bindings/soc/qcom/qcom,pcie-pdc.yaml index 62a9f3fe..5e4ec249 100644 --- a/bindings/soc/qcom/qcom,pcie-pdc.yaml +++ b/bindings/soc/qcom/qcom,pcie-pdc.yaml @@ -24,6 +24,7 @@ properties: - qcom,tuna-pcie-pdc - qcom,kera-pcie-pdc - qcom,pcie-pdc + - qcom,sdxkova-pcie-pdc reg: maxItems: 1 From b48c5726a72f4dc3b80d7d6b52da94b24092a4cc Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Fri, 27 Dec 2024 16:13:29 +0530 Subject: [PATCH 10/29] ARM: dts: qcom: Add PCIe PDC device for sdxkova Add PCIe PDC device to wakeup SoC from PCIe clk request gpio. Change-Id: I32e3547552f9c6f608682356a023e44e50c7f83e Signed-off-by: Sneh Mankad --- qcom/sdxkova.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi index 600596c9..45e8626f 100644 --- a/qcom/sdxkova.dtsi +++ b/qcom/sdxkova.dtsi @@ -288,6 +288,11 @@ qcom,hw-drv-ids = <0>; qcom,sw-drv-ids = <0>; }; + + pcie_pdc: pdc@b2b0000 { + compatible = "qcom,sdxkova-pcie-pdc", "qcom,pcie-pdc"; + reg = <0x0 0xb2b0000 0x0 0x30000>; + }; }; firmware: firmware { }; From 45deb7dcd6bae34c5691ce060858491ffbfc1bf0 Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Fri, 27 Dec 2024 17:44:15 +0530 Subject: [PATCH 11/29] bindings: arm: msm: Document sys-pm-violators for sdxkova Document sys-pm-violators for sdxkova. Change-Id: I8c26b1565efc57ee93b34a0a3455a4d1975cfdc0 Signed-off-by: Sneh Mankad --- bindings/arm/msm/sys-pm-violators.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/bindings/arm/msm/sys-pm-violators.yaml b/bindings/arm/msm/sys-pm-violators.yaml index 3883054a..5fda0cf8 100644 --- a/bindings/arm/msm/sys-pm-violators.yaml +++ b/bindings/arm/msm/sys-pm-violators.yaml @@ -28,6 +28,7 @@ properties: - qcom,sys-pm-sun - qcom,sys-pm-tuna - qcom,sys-pm-kera + - qcom,sys-pm-sdxkova reg: maxItems: 1 @@ -55,6 +56,8 @@ allOf: - qcom,sys-pm-pineapple - qcom,sys-pm-parrot - qcom,sys-pm-ravelin + - qcom,sys-pm-sdxkova + then: properties: reg: From 771bce1acd3d3c5177ed2bd8630fae1d82b2285a Mon Sep 17 00:00:00 2001 From: Anand Tarakh Date: Tue, 7 Jan 2025 18:02:12 +0530 Subject: [PATCH 12/29] ARM: dts: msm: enable touch support for Kera ATP platform Enable touch support for Kera ATP platform. Change-Id: Ib4fa26a97df01d90678e5c8c98444ffb1303e0fc Signed-off-by: Anand Tarakh --- qcom/kera-atp.dtsi | 43 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/qcom/kera-atp.dtsi b/qcom/kera-atp.dtsi index ed1d67d3..c1c6fb56 100644 --- a/qcom/kera-atp.dtsi +++ b/qcom/kera-atp.dtsi @@ -1,9 +1,50 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include +&qupv3_se8_spi { + #address-cells = <1>; + #size-cells = <0>; + + status = "ok"; + qcom,touch-active = "goodix,gt9916S"; + qcom,la-vm; + + goodix-berlin@0 { + compatible = "goodix,gt9916S"; + reg = <0>; + spi-max-frequency = <1000000>; + interrupt-parent = <&tlmm>; + interrupts = <13 0x2008>; + goodix,reset-gpio = <&tlmm 16 0x00>; + goodix,irq-gpio = <&tlmm 13 0x2008>; + goodix,irq-flags = <2>; + goodix,panel-max-x = <1080>; + goodix,panel-max-y = <2400>; + goodix,panel-max-w = <255>; + goodix,panel-max-p = <4096>; + goodix,firmware-name = "goodix_firmware_spi.bin"; + goodix,config-name = "goodix_cfg_group_spi.bin"; + goodix,avdd-name = "avdd"; + goodix,iovdd-name = "iovdd"; + avdd-supply = <&L22B>; + iovdd-supply = <&L8B>; + goodix,touch-type = "primary"; + goodix,qts_en; + + qts,trusted-touch-mode = "vm_mode"; + qts,touch-environment = "pvm"; + qts,trusted-touch-type = "primary"; + qts,trusted-touch-spi-irq = <653>; + qts,trusted-touch-io-bases = <0x880000>; + qts,trusted-touch-io-sizes = <0x1000>; + qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0 + &tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>; + }; +}; + &sdhc_2 { vdd-supply = <&L13B>; qcom,vdd-voltage-level = <2960000 2960000>; From e59cc81cf38c9c8128fa1b716a400a3174ab431f Mon Sep 17 00:00:00 2001 From: Ajit Pandey Date: Tue, 7 Jan 2025 10:03:05 +0530 Subject: [PATCH 13/29] ARM: dts: qcom: Add support for clk8_a4 as fixed factor clock Add support for clk8_a4 as fixed factor clock for client to be able to request on them for Kera platform. Change-Id: I3f6fe7e444231be4489cf4459b1f98cc19417b48 Signed-off-by: Ajit Pandey --- qcom/kera.dtsi | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 18912460..b1b2e31b 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1754,6 +1754,14 @@ clock-output-names = "usb3_phy_wrapper_gcc_usb30_pipe_clk"; #clock-cells = <0>; }; + + clk8_a4: clk8_a4 { + compatible = "fixed-factor-clock"; + clocks = <&rpmhcc RPMH_LN_BB_CLK3>; + clock-mult = <1>; + clock-div = <2>; + #clock-cells = <0>; + }; }; cambistmclkcc: clock-controller@1760000 { From ce55a157cf6118bf28b3abff93422f67d6af1d3b Mon Sep 17 00:00:00 2001 From: Hrishabh Rajput Date: Thu, 9 Jan 2025 15:37:47 +0530 Subject: [PATCH 14/29] ARM: dts: msm: Add gunyah rm booster node on Kera Add gunyah rm booster node on Kera to accelerate VM Bootup. Change-Id: Ide19df6e6607994b70856412e60857e4b4e41c0c Signed-off-by: Hrishabh Rajput --- qcom/kera.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 18912460..eb791c5a 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -2052,6 +2052,12 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + gh-rm-booster { + compatible = "qcom,gh-rm-booster"; + qcom,rm-vmid = <255>; + qcom,rm-affinity-default = <0>; + }; + trust_ui_vm_vblk0_ring: trust_ui_vm_vblk0_ring { size = <0x4000>; gunyah-label = <0x11>; From 439c762c94c24f00ec064f6b73b00ec8b1a39fbe Mon Sep 17 00:00:00 2001 From: Hrishabh Rajput Date: Thu, 9 Jan 2025 15:50:27 +0530 Subject: [PATCH 15/29] ARM: dts: msm: Add gunyah rm booster node on Tuna Add gunyah rm booster node on Tuna to accelerate VM Bootup. Change-Id: I53ff5f8ad05558186fb601e8233ad36908fdcead Signed-off-by: Hrishabh Rajput --- qcom/tuna.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi index 6d624ac0..d3780ea9 100644 --- a/qcom/tuna.dtsi +++ b/qcom/tuna.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -2847,6 +2847,12 @@ peer-name = <4>; }; + gh-rm-booster { + compatible = "qcom,gh-rm-booster"; + qcom,rm-vmid = <255>; + qcom,rm-affinity-default = <0>; + }; + trust_ui_vm_vblk0_ring: trust_ui_vm_vblk0_ring { size = <0x4000>; gunyah-label = <0x11>; From 5255610dc9a25666a1ab7468d40dfef3f2dabe63 Mon Sep 17 00:00:00 2001 From: Yingchao Deng Date: Fri, 10 Jan 2025 13:50:33 +0800 Subject: [PATCH 16/29] ARM: dts: msm: Disable TPDM QM for kera Disable TPDM QM to avoid the register access issue. Signed-off-by: Yingchao Deng --- qcom/kera-coresight.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/qcom/kera-coresight.dtsi b/qcom/kera-coresight.dtsi index 4bc74ecd..20e98fc3 100644 --- a/qcom/kera-coresight.dtsi +++ b/qcom/kera-coresight.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ &soc { @@ -2844,6 +2844,7 @@ reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-qm"; + status = "disabled"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; From 67fdf207c7e73158bf22b96dd46960a0725bac3d Mon Sep 17 00:00:00 2001 From: Manish Pandey Date: Tue, 7 Jan 2025 16:21:51 +0530 Subject: [PATCH 17/29] ARM: dts: msm: Update Reference Clock to clk8_a4 for Kera UFS 2.x The Kera UFS 2.x requires a reference clock of 19.2MHz. Currently, the reference clock provided by the DTSI node RPMH_LN_BB_CLK3 returns clk_get_rate() as 38.4MHz. To address this, the handler is updated to use clk8_a4, ensuring the clock rate is set to 19.2MHz. Change-Id: I92ad772c7b86652c0dc5bdc3af18a9db900d74e5 Signed-off-by: Manish Pandey --- qcom/kera_ufs2.dtsi | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/qcom/kera_ufs2.dtsi b/qcom/kera_ufs2.dtsi index 320ed23f..da26508c 100644 --- a/qcom/kera_ufs2.dtsi +++ b/qcom/kera_ufs2.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include @@ -57,5 +57,36 @@ qcom,vccq2-parent-supply = <&S1B>; qcom,vccq2-parent-max-microamp = <210000>; + clock-names = + "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "core_clk_ice", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "rx_lane1_sync_clk"; + clocks = + <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>, + <&clk8_a4>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; + freq-table-hz = + <100000000 403000000>, + <0 0>, + <0 0>, + <100000000 403000000>, + <100000000 403000000>, + <0 0>, + <0 0>, + <0 0>, + <0 0>; + status = "ok"; }; From 17849691a95e033d83bc2481173dd665b6525daa Mon Sep 17 00:00:00 2001 From: Udipto Goswami Date: Sat, 28 Dec 2024 16:01:01 +0530 Subject: [PATCH 18/29] ARM: dts: msm: Enable nb7vpq904m redriver on Kera QRD platfrom Add nb7vpq904m related configurations including i2c device, pinctrl, gpio and register sequences. Change-Id: I781e670f14fa9658003e397233b5a91068f75729 Signed-off-by: Udipto Goswami --- qcom/kera-qrd.dtsi | 51 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/qcom/kera-qrd.dtsi b/qcom/kera-qrd.dtsi index 6981e8c7..0167d656 100644 --- a/qcom/kera-qrd.dtsi +++ b/qcom/kera-qrd.dtsi @@ -118,3 +118,54 @@ &pm8550ve_f_die_temp { status = "disabled"; }; + +&qupv3_se4_i2c { + status = "ok"; + + #address-cells = <1>; + #size-cells = <0>; + redriver: redriver@1c { + compatible = "onnn,redriver"; + reg = <0x1c>; + + vdd-supply = <&L7B>; + + lane-channel-swap; + + eq = /bits/ 8 < + /* Parameters for USB */ + 0x4 0x4 0x4 0x4 + /* Parameters for DP */ + 0x5 0x7 0x7 0x5>; + flat-gain = /bits/ 8 < + /* Parameters for USB */ + 0x3 0x1 0x1 0x3 + /* Parameters for DP */ + 0x0 0x3 0x3 0x0>; + output-comp = /bits/ 8 < + /* Parameters for USB */ + 0x3 0x3 0x3 0x3 + /* Parameters for DP */ + 0x3 0x3 0x3 0x3>; + loss-match = /bits/ 8 < + /* Parameters for USB */ + 0x1 0x3 0x3 0x1 + /* Parameters for DP */ + 0x3 0x3 0x3 0x3>; + }; +}; + +&usb_qmp_dp_phy { + pinctrl-names = "unused"; +}; + +&usb0 { + pinctrl-names = "default"; + pinctrl-0 = <&usb3phy_portselect_gpio>; + gpios = <&tlmm 122 0>; + + ssusb_redriver = <&redriver>; + + qcom,wcd_usbss = <&wcd_usbss>; + +}; From dd1ed36916352b63d22c5694634f35591ca9743d Mon Sep 17 00:00:00 2001 From: Udipto Goswami Date: Sun, 5 Jan 2025 12:52:16 +0530 Subject: [PATCH 19/29] ARM: dts: msm: Add wcd_usbss reference to USB on Kera The USB D+/D- signal lines are first routed through the WCD939x USB subsystem before connecting to the USB controller on MTP and QRD platform for kera. Add a phandle to the former to the USB device node. This will allow the USB driver to control the D+/D- switches when functionality is needed. Change-Id: Ie6e76885785cc57974d52df91297a98f300cf666 Signed-off-by: Udipto Goswami --- qcom/kera-mtp.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/qcom/kera-mtp.dtsi b/qcom/kera-mtp.dtsi index b5b73f13..e875880e 100644 --- a/qcom/kera-mtp.dtsi +++ b/qcom/kera-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include @@ -88,3 +88,7 @@ &pm8550ve_f_die_temp { status = "disabled"; }; + +&usb0 { + qcom,wcd_usbss = <&wcd_usbss>; +}; From 4d68af42ba5cb389d545b8f44df6d6d96cdc6f4b Mon Sep 17 00:00:00 2001 From: Vijayanand Jitta Date: Mon, 13 Jan 2025 10:47:09 +0530 Subject: [PATCH 20/29] Revert "ARM: dts: msm: Disable mem-offline node" This reverts commit 2edfcbba9ba430feda78a3fc7b6e07cd2b2ad5a7. Change-Id: I71c3ccd731e7267c8ee0b5c7031aa9a392fea6f5 Signed-off-by: Vijayanand Jitta --- qcom/kera.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 2b94cf9f..c4a2844f 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -82,7 +82,6 @@ offline-sizes = <0x2 0xc0000000 0x1 0x0>; granule = <512>; qcom,qmp = <&aoss_qmp>; - status = "disabled"; }; firmware: firmware { From 5033cb2dc68e78a9b4f4256e998986cd74efb4b1 Mon Sep 17 00:00:00 2001 From: Vijayanand Jitta Date: Fri, 13 Dec 2024 16:22:34 +0530 Subject: [PATCH 21/29] Revert "ARM: dts: msm: Disable mem-offline node" This reverts commit 3058bd15490e711601b8261989ebab71917ec6d6. Change-Id: Iba37bbba5aaf9a416bf400d6f1b6806fcd1404c4 Signed-off-by: Vijayanand Jitta --- qcom/tuna.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi index d3780ea9..943cd284 100644 --- a/qcom/tuna.dtsi +++ b/qcom/tuna.dtsi @@ -84,7 +84,6 @@ offline-sizes = <0x2 0xc0000000 0x1 0x0>; granule = <512>; qcom,qmp = <&aoss_qmp>; - status = "disabled"; }; firmware: firmware { From 42edbf0cc0912d573a981056ffca4f0721454d37 Mon Sep 17 00:00:00 2001 From: Priyansh Jain Date: Mon, 13 Jan 2025 11:10:19 +0530 Subject: [PATCH 22/29] ARM: dts: qcom: Update passive polling delay for tuna and kera thermalzones Update passive polling delay for GPU and Modem thermal zones for tuna and kera. Change-Id: Id36c9c83de822d0065f62d7f64d48201564a0404 Signed-off-by: Priyansh Jain --- qcom/kera-thermal.dtsi | 14 +++++++------- qcom/tuna-thermal.dtsi | 22 +++++++++++----------- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/qcom/kera-thermal.dtsi b/qcom/kera-thermal.dtsi index 036869cd..702adca7 100644 --- a/qcom/kera-thermal.dtsi +++ b/qcom/kera-thermal.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -957,7 +957,7 @@ gpuss-0 { - polling-delay-passive = <0>; + polling-delay-passive = <10>; polling-delay = <0>; thermal-sensors = <&tsens1 8>; @@ -996,7 +996,7 @@ }; gpuss-1 { - polling-delay-passive = <0>; + polling-delay-passive = <10>; polling-delay = <0>; thermal-sensors = <&tsens1 9>; @@ -1156,7 +1156,7 @@ }; mdmss-0 { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&tsens2 1>; @@ -1215,7 +1215,7 @@ }; mdmss-1 { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&tsens2 2>; @@ -1274,7 +1274,7 @@ }; mdmss-2 { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&tsens2 3>; @@ -1333,7 +1333,7 @@ }; mdmss-3 { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&tsens2 4>; diff --git a/qcom/tuna-thermal.dtsi b/qcom/tuna-thermal.dtsi index f555783e..1a844d48 100644 --- a/qcom/tuna-thermal.dtsi +++ b/qcom/tuna-thermal.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1211,7 +1211,7 @@ }; gpu-0 { - polling-delay-passive = <0>; + polling-delay-passive = <10>; polling-delay = <0>; thermal-sensors = <&tsens2 5>; @@ -1250,7 +1250,7 @@ }; gpu-1 { - polling-delay-passive = <0>; + polling-delay-passive = <10>; polling-delay = <0>; thermal-sensors = <&tsens2 6>; @@ -1289,7 +1289,7 @@ }; gpu-2 { - polling-delay-passive = <0>; + polling-delay-passive = <10>; polling-delay = <0>; thermal-sensors = <&tsens2 7>; @@ -1328,7 +1328,7 @@ }; gpu-3 { - polling-delay-passive = <0>; + polling-delay-passive = <10>; polling-delay = <0>; thermal-sensors = <&tsens2 8>; @@ -1367,7 +1367,7 @@ }; gpu-4 { - polling-delay-passive = <0>; + polling-delay-passive = <10>; polling-delay = <0>; thermal-sensors = <&tsens2 9>; @@ -1406,7 +1406,7 @@ }; gpu-5 { - polling-delay-passive = <0>; + polling-delay-passive = <10>; polling-delay = <0>; thermal-sensors = <&tsens2 10>; @@ -1569,7 +1569,7 @@ }; mdmss-0 { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&tsens3 1>; @@ -1628,7 +1628,7 @@ }; mdmss-1 { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&tsens3 2>; @@ -1687,7 +1687,7 @@ }; mdmss-2 { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&tsens3 3>; @@ -1746,7 +1746,7 @@ }; mdmss-3 { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&tsens3 4>; From 5c03a99c593cdcef74efe14a65aef31fa299bc72 Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Fri, 10 Jan 2025 16:11:28 +0530 Subject: [PATCH 23/29] ARM: dts: msm: Add CRM devices for kera Add PCIe and Display CRM devices for kera. Change-Id: I4d02a84242a1b05c204d6a5165806dac3a00c9d8 Signed-off-by: Sneh Mankad --- qcom/kera-rumi.dtsi | 10 +++++++++- qcom/kera.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 1 deletion(-) diff --git a/qcom/kera-rumi.dtsi b/qcom/kera-rumi.dtsi index 343aecd6..fe33cdd8 100644 --- a/qcom/kera-rumi.dtsi +++ b/qcom/kera-rumi.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -22,6 +22,14 @@ status = "disabled"; }; +&disp_crm { + status = "disabled"; +}; + +&pcie_crm { + status = "disabled"; +}; + &soc { usb_emuphy: phy@a784000 { compatible = "qcom,usb-emu-phy"; diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 2b94cf9f..f841c9ab 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -673,6 +673,42 @@ }; }; + disp_crm: crm@af21000 { + label = "disp_crm"; + compatible = "qcom,disp-crm-v2"; + reg = <0xaf21000 0x6000>, <0xaf27000 0x400>, <0xaf27400 0x400>, + <0xaf27800 0x2000>, <0xaf29800 0x700>, <0xaf29f00 0x100>; + reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common"; + interrupts = , + , + , + , + , + ; + interrupt-names = "disp_crm_drv0", + "disp_crm_drv1", + "disp_crm_drv2", + "disp_crm_drv3", + "disp_crm_drv4", + "disp_crm_drv5"; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>; + qcom,hw-drv-ids = <0 1 2 3 4 5>; + qcom,sw-drv-ids = <0 1 2 3 4 5>; + }; + + pcie_crm: crm@1d01000 { + label = "pcie_crm"; + compatible = "qcom,pcie-crm-v2"; + reg = <0x1d01000 0x2000>, <0x1d03000 0x400>, <0x1d03400 0x400>, + <0x1d03800 0x2000>, <0x1d05800 0x700>, <0x1d05f00 0x100>; + reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common"; + interrupts = ; + interrupt-names = "pcie_crm_drv0"; + clocks = <&pcie_0_pipe_clk>; + qcom,hw-drv-ids = <0 1>; + qcom,sw-drv-ids = <0>; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,kera-pdc", "qcom,pdc"; reg = <0xb220000 0x10000>, <0x174000f0 0x64>; From c5e6726dbee06417499a9a133e14ed86d84d84bc Mon Sep 17 00:00:00 2001 From: Aman Kanwar Date: Tue, 14 Jan 2025 01:00:26 +0530 Subject: [PATCH 24/29] ARM: dts: msm: Add SLC MPAM nodes for kera Add support for SLC MPAM. Enables support for CPU, GPU SLC partitioning and monitoring current capacity and read miss monitors. Change-Id: I97d3cdafcf8c1c08733d0efc5902e72bb7a7fa91 Signed-off-by: Aman Kanwar --- qcom/kera.dtsi | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 1582e8ec..0e618300 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -2327,6 +2327,52 @@ }; }; + qcom-mpam-msc { + compatible = "qcom,mpam-msc"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + qcom-slc-mpam@17D2EC00 { + compatible = "qcom,slc-mpam"; + reg = <0x17D2EC00 0x400>; + reg-names = "mon-base"; + qcom,msc-id = <2>; + qcom,msc-name = "slc"; + qcom,dev-index = <0>; + qcom,num-read-miss-cfg = <2>; + qcom,num-cap-cfg = <5>; + qcom,slc-clients = "APPS_CLIENT", "GPU_CLIENT"; + }; + }; + + qcom_slc_mpam: qcom,slc_mpam { + compatible = "qcom,mpam-slc"; + qcom,msc-name = "slc"; + + apps { + qcom,client-id = <0>; + qcom,client-name = "apps"; + + part-id0 { + qcom,part-id = <0>; + }; + + part-id1 { + qcom,part-id = <1>; + }; + + part-id2 { + qcom,part-id = <2>; + }; + }; + + gpu { + qcom,client-id = <1>; + qcom,client-name = "gpu"; + }; + }; + spmi_bus: spmi0_bus: qcom,spmi@c42d000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc42d000 0x4000>, From d6e45df54a0186364a668b1ed326eb31b3876ba5 Mon Sep 17 00:00:00 2001 From: Rui Chen Date: Tue, 14 Jan 2025 10:21:37 +0800 Subject: [PATCH 25/29] ARM: dts: msm: add trusted touch properties for tuna qrd Add trusted touch properties for tuna qrd platforms. Change-Id: I79fdebd3543b381bb8174a39b402b6faacd04816 Signed-off-by: Rui Chen --- qcom/tuna-vm-qrd.dtsi | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/qcom/tuna-vm-qrd.dtsi b/qcom/tuna-vm-qrd.dtsi index 1510613d..409ab94f 100644 --- a/qcom/tuna-vm-qrd.dtsi +++ b/qcom/tuna-vm-qrd.dtsi @@ -1,7 +1,29 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ &soc { }; + +&qupv3_se4_spi { + status = "ok"; + qcom,touch-active = "st,fts"; + + st_fts@0 { + compatible = "st,fts"; + reg = <0x0>; + + st,touch-type = "primary"; + st,qts_en; + qts,trusted-touch-mode = "vm_mode"; + qts,touch-environment = "pvm"; + qts,trusted-touch-type = "primary"; + qts,trusted-touch-spi-irq = <658>; + qts,trusted-touch-io-bases = <0xa90000>; + qts,trusted-touch-io-sizes = <0x1000>; + qts,trusted-touch-vm-gpio-list = <&tlmm 16 0 &tlmm 17 0 &tlmm 18 0 + &tlmm 19 0 &tlmm 189 0 &tlmm 176 0x2008>; + + }; +}; From d310a153840d2489dae750b3d6de24fb5322882c Mon Sep 17 00:00:00 2001 From: Prem Sai Grandhi Date: Thu, 16 Jan 2025 17:53:28 +0530 Subject: [PATCH 26/29] ARM: dts: msm: Add llcc perfmon node for kera SOC Add llcc perfmon entry, qdss clock node to llcc perfmon driver and aoss_qmp headers. Change-Id: I34d57d4ab8ccb161a48ff7a89110ef67107d37a2 Signed-off-by: Prem Sai Grandhi --- qcom/kera.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index cbb612cc..60c6c9b0 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -19,6 +19,8 @@ #include #include #include +#include +#include / { model = "Qualcomm Technologies, Inc. Kera"; @@ -1286,6 +1288,12 @@ "llcc_broadcast_or_base", "llcc_broadcast_and_base"; interrupts = ; cap-based-alloc-and-pwr-collapse; + + llcc_perfmon { + compatible = "qcom,llcc-perfmon"; + clocks = <&aoss_qmp QDSS_CLK>; + clock-names = "qdss_clk"; + }; }; gic-interrupt-router { From 750a2cdf68d58742e25820083d20e994aae8b64d Mon Sep 17 00:00:00 2001 From: Pranav Mahesh Phansalkar Date: Fri, 3 Jan 2025 15:39:19 +0530 Subject: [PATCH 27/29] ARM: dts: msm: Add glink probe entry for Kera Add glink probe driver entry for Kera to have a way for glink core to get pm notifications during apps suspend/resume. Change-Id: I4c3a41dfb1bcb9e28ecad040c616b563be0b5e40 Signed-off-by: Pranav Mahesh Phansalkar --- qcom/kera.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 104b406f..1a4aba8d 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1048,6 +1048,10 @@ }; }; + qcom,glink { + compatible = "qcom,glink"; + }; + sys-pm-vx@c320000 { compatible = "qcom,sys-pm-violators", "qcom,sys-pm-kera"; reg = <0xc320000 0x400>; From 280a4588dc467eae8b70e5056e0d20b9017c3c83 Mon Sep 17 00:00:00 2001 From: Kavya Nunna Date: Thu, 9 Jan 2025 14:59:03 +0530 Subject: [PATCH 28/29] ARM: dts: msm: Update init mode as LPM for L11B for kera update init mode as LPM , as L11B is kept always-on if client is not available during boot in sleep state NPM is voted because of init vote, update init mode to LPM. Change-Id: I6e3602106970db24ca3166ded7176791515f7901 Signed-off-by: Kavya Nunna --- qcom/kera-regulators.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/qcom/kera-regulators.dtsi b/qcom/kera-regulators.dtsi index 2b82ef1f..d3fe2b34 100644 --- a/qcom/kera-regulators.dtsi +++ b/qcom/kera-regulators.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -280,7 +280,7 @@ qcom,resource-name = "ldob11"; qcom,regulator-type = "pmic5-ldo"; qcom,supported-modes = - ; qcom,mode-threshold-currents = <0 30000>; @@ -290,7 +290,7 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2000000>; qcom,init-voltage = <1800000>; - qcom,init-mode = ; + qcom,init-mode = ; regulator-always-on; }; }; From a12606e007b221f60b3be189fd55109479515df9 Mon Sep 17 00:00:00 2001 From: Kavya Nunna Date: Tue, 7 Jan 2025 15:45:34 +0530 Subject: [PATCH 29/29] ARM: dts: msm: Update init mode as LPM for L2G for tuna Update init mode as LPM , as L2G is kept always-on if client is not available during boot in sleep state NPM is voted because of init vote, update init mode to LPM. Change-Id: I929be465451d0968cea75d486071b8593470ae9e Signed-off-by: Kavya Nunna --- qcom/tuna-regulators.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qcom/tuna-regulators.dtsi b/qcom/tuna-regulators.dtsi index 8071f35e..157ecf02 100644 --- a/qcom/tuna-regulators.dtsi +++ b/qcom/tuna-regulators.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -963,7 +963,7 @@ regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; qcom,init-voltage = <1200000>; - qcom,init-mode = ; + qcom,init-mode = ; regulator-always-on; }; };