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ARM: dts: msm: Add soccp node for Sun

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Add devicetree soccp node for Sun SoC. In addition to existing smp2p INT's
SOCCP H/W needs 2 more INT for controlling the power state of the H/W.
sleep bit and wakeup bit on master kernel corresponds to these INT.

Change-Id: I00d2f6a3fb76f306fa070df87f22bb2d07cb4c3b
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
This commit is contained in:
Gokul krishna Krishnakumar
2023-10-25 09:35:32 -07:00
parent 362840c89a
commit 8f447bddcf
1 changed files with 35 additions and 0 deletions
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35
qcom/sun.dtsi
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@@ -3033,6 +3033,41 @@
gunyah-label = <8>;
peer-name = <4>;
};
soccp_pas: remoteproc-soccp@a3380000 {
compatible = "qcom,sun-soccp-pas";
reg = <0xa3380000 0x10000>;
status = "ok";
cx-supply = <&VDD_LPI_CX_LEVEL>;
cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
mx-supply = <&VDD_LPI_MX_LEVEL>;
mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
reg-names = "cx", "mx";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
memory-region = <&soccp_mem 0>;
soccp-config = <&tcsr 0x9a000>;
/* Inputs from SOCCP */
interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
<&soccp_smp2p_in 0 0>,
<&soccp_smp2p_in 1 0>,
<&soccp_smp2p_in 3 0>,
<&soccp_smp2p_in 2 0>;
interrupt-names = "wdog",
"fatal",
"ready",
"stop-ack",
"handover";
/* Outputs to soccp */
qcom,smem-states = <&soccp_smp2p_out 0>, <&soccp_smp2p_out 10>, <&soccp_smp2p_out 9>;
qcom,smem-state-names = "stop", "wakeup", "sleep";
};
};
&reserved_memory {