Merge "ARM: dts: qcom: keep the DT format aligned for SDCC"
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8e20164259
@@ -42,7 +42,7 @@
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serial0 = &qupv3_se7_2uart;
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serial0 = &qupv3_se7_2uart;
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hsuart0 = &qupv3_se14_4uart;
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hsuart0 = &qupv3_se14_4uart;
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ufshc1 = &ufshc_mem; /* Embedded UFS Slot */
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ufshc1 = &ufshc_mem; /* Embedded UFS Slot */
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sdhc2 = &sdhc_2;
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mmc1 = &sdhc_2; /* SDC2 SD card slot */
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};
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};
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firmware: firmware { };
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firmware: firmware { };
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@@ -2117,13 +2117,13 @@
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opp-100000000 {
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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opp-hz = /bits/ 64 <100000000>;
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opp-peak-kBps = <160000 100000>;
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opp-peak-kBps = <160000 100000>;
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opp-avg-kBps = <80000 50000>;
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opp-avg-kBps = <50000 0>;
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};
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};
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opp-202000000 {
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opp-202000000 {
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opp-hz = /bits/ 64 <202000000>;
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opp-hz = /bits/ 64 <202000000>;
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opp-peak-kBps = <200000 120000>;
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opp-peak-kBps = <200000 120000>;
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opp-avg-kBps = <80000 50000>;
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opp-avg-kBps = <104000 0>;
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};
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};
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};
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};
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@@ -2139,7 +2139,7 @@
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compatible = "qcom,sdhci-msm-v5";
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compatible = "qcom,sdhci-msm-v5";
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reg = <0x08804000 0x1000>;
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reg = <0x08804000 0x1000>;
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reg-names = "hc_mem";
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reg-names = "hc";
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interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
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@@ -2165,6 +2165,8 @@
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iommus = <&apps_smmu 0x540 0x0>;
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iommus = <&apps_smmu 0x540 0x0>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-dma = "fastmap";
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dma-coherent;
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dma-coherent;
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qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
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qcom,iommu-geometry = <0x40000000 0x10000000>;
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interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
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interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
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<&gem_noc MASTER_APPSS_PROC &config_noc
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<&gem_noc MASTER_APPSS_PROC &config_noc
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