ARM: dts: msm: Add interconnect devices for SM6150
Add interconnect devices for camnoc_virt, ipa_virt, mc_virt, dc_noc, gem_noc, config_noc, system_noc, aggre1_noc and mmss_noc. This will allow consumers to get their path and set bandwidth constraints on them. Change-Id: I8c2eb0b8a63252cbfcfe44355ad9b4421c8aee5c Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
This commit is contained in:
@@ -9,6 +9,8 @@
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#include <dt-bindings/clock/qcom,gcc-sm6150.h>
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#include <dt-bindings/clock/qcom,gcc-sm6150.h>
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#include <dt-bindings/clock/qcom,gpucc-sm6150.h>
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#include <dt-bindings/clock/qcom,gpucc-sm6150.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/interconnect/qcom,icc.h>
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#include <dt-bindings/interconnect/qcom,sm6150.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
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#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
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#include <dt-bindings/clock/qcom,videocc-sm6150.h>
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#include <dt-bindings/clock/qcom,videocc-sm6150.h>
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@@ -442,6 +444,10 @@
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<FAST_PATH_TCS 0>;
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<FAST_PATH_TCS 0>;
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};
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};
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apps_bcm_voter: bcm_voter {
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compatible = "qcom,bcm-voter";
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};
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rpmhcc: qcom,rpmhclk {
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rpmhcc: qcom,rpmhclk {
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compatible = "qcom,sm6150-rpmh-clk";
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compatible = "qcom,sm6150-rpmh-clk";
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#clock-cells = <1>;
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#clock-cells = <1>;
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@@ -468,6 +474,11 @@
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<CONTROL_TCS 0>,
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<CONTROL_TCS 0>,
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<FAST_PATH_TCS 0>;
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<FAST_PATH_TCS 0>;
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};
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};
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disp_bcm_voter: bcm_voter {
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compatible = "qcom,bcm-voter";
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qcom,tcs-wait = <QCOM_ICC_TAG_AMC>;
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};
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};
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};
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};
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};
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@@ -576,6 +587,78 @@
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};
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};
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};
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};
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camnoc_virt: interconnect@0 {
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compatible = "qcom,sm6150-camnoc_virt";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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ipa_virt: interconnect@1 {
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compatible = "qcom,sm6150-ipa_virt";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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mc_virt: interconnect@2 {
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compatible = "qcom,sm6150-mc_virt";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos", "disp";
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qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
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};
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dc_noc: interconnect@9160000 {
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reg = <0x9160000 0x3200>;
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compatible = "qcom,sm6150-dc_noc";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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gem_noc: interconnect@9680000 {
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reg = <0x9680000 0x3e200>;
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compatible = "qcom,sm6150-gem_noc";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos", "disp";
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qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
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};
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config_noc: interconnect@1500000 {
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reg = <0x1500000 0x5080>;
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compatible = "qcom,sm6150-config_noc";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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system_noc: interconnect@1620000 {
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reg = <0x1620000 0x1f300>;
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compatible = "qcom,sm6150-system_noc";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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aggre1_noc: interconnect@1700000 {
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reg = <0x1700000 0x3f200>;
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compatible = "qcom,sm6150-aggre1_noc";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
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<&gcc GCC_AGGRE_USB2_SEC_AXI_CLK>,
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<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
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};
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mmss_noc: interconnect@1740000 {
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reg = <0x1740000 0x1c100>;
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compatible = "qcom,sm6150-mmss_noc";
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos", "disp";
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qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
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};
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gcc: clock-controller@100000 {
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gcc: clock-controller@100000 {
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compatible = "qcom,sm6150-gcc", "syscon";
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compatible = "qcom,sm6150-gcc", "syscon";
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reg = <0x100000 0x1f0000>;
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reg = <0x100000 0x1f0000>;
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