From 8ba4f778a956bb604cb8fee68f5251ec4045736f Mon Sep 17 00:00:00 2001
From: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
Date: Wed, 6 Nov 2024 14:58:05 +0530
Subject: [PATCH] ARM: dts: qcom: Add pins for Kera Audio

Add Audio pinctrl for Kera variants.
Add usbss for kera mtp variants.

Change-Id: I3afc160df26cfd1dbcc9dd2d007ee7dbe3af13e8
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
---
 qcom/kera-mtp.dtsi     |  14 +++
 qcom/kera-pinctrl.dtsi | 211 +++++++++++++++++++++++++++++++++++++++++
 qcom/kera.dtsi         |   9 ++
 3 files changed, 234 insertions(+)

diff --git a/qcom/kera-mtp.dtsi b/qcom/kera-mtp.dtsi
index 9df4770a..c1025537 100644
--- a/qcom/kera-mtp.dtsi
+++ b/qcom/kera-mtp.dtsi
@@ -2,3 +2,17 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/clock/qcom,gcc-kera.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+#include "pmk8550.dtsi"
+
+&wcd_usbss {
+	interrupt-parent = <&spmi_bus>;
+	interrupts = <0x0 0xb6 0x1 IRQ_TYPE_EDGE_BOTH>;
+	interrupt-names = "usb_wcd";
+	nvmem-cells = <&usb_mode>;
+	nvmem-cell-names = "usb_mode";
+};
diff --git a/qcom/kera-pinctrl.dtsi b/qcom/kera-pinctrl.dtsi
index 81dfe38e..f6ac4a7b 100644
--- a/qcom/kera-pinctrl.dtsi
+++ b/qcom/kera-pinctrl.dtsi
@@ -4,6 +4,217 @@
  */
 
 &tlmm {
+	i2s0_sck {
+		i2s0_sck_sleep: i2s0_sck_sleep {
+			mux {
+				pins = "gpio60";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio60";
+				drive-strength = <2>;   /* 2 mA */
+				bias-pull-down;         /* PULL DOWN */
+				input-enable;
+			};
+		};
+
+		i2s0_sck_active: i2s0_sck_active {
+			mux {
+				pins = "gpio60";
+				function = "i2s0_sck";
+			};
+
+			config {
+				pins = "gpio60";
+				drive-strength = <8>;   /* 8 mA */
+				bias-disable;           /* NO PULL */
+				output-high;
+			};
+		};
+	};
+
+	i2s0_ws {
+		i2s0_ws_sleep: i2s0_ws_sleep {
+			mux {
+				pins = "gpio61";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio61";
+				drive-strength = <2>;   /* 2 mA */
+				bias-pull-down;         /* PULL DOWN */
+				input-enable;
+			};
+		};
+
+		i2s0_ws_active: i2s0_ws_active {
+			mux {
+				pins = "gpio61";
+				function = "i2s0_ws";
+			};
+
+			config {
+				pins = "gpio61";
+				drive-strength = <8>;   /* 8 mA */
+				bias-disable;           /* NO PULL */
+				output-high;
+			};
+		};
+	};
+
+	i2s0_sd0 {
+		i2s0_sd0_sleep: i2s0_sd0_sleep {
+			mux {
+				pins = "gpio62";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio62";
+				drive-strength = <2>;   /* 2 mA */
+				bias-pull-down;         /* PULL DOWN */
+				input-enable;
+			};
+		};
+
+		i2s0_sd0_active: i2s0_sd0_active {
+			mux {
+				pins = "gpio62";
+				function = "i2s0_data0";
+			};
+
+			config {
+				pins = "gpio62";
+				drive-strength = <8>;   /* 8 mA */
+				bias-disable;           /* NO PULL */
+				output-high;
+			};
+		};
+	};
+
+	i2s0_sd1 {
+		i2s0_sd1_sleep: i2s0_sd1_sleep {
+			mux {
+				pins = "gpio63";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio63";
+				drive-strength = <2>;   /* 2 mA */
+				bias-pull-down;         /* PULL DOWN */
+				input-enable;
+			};
+		};
+
+		i2s0_sd1_active: i2s0_sd1_active {
+			mux {
+				pins = "gpio63";
+				function = "i2s0_data1";
+			};
+
+			config {
+				pins = "gpio63";
+				drive-strength = <8>;   /* 8 mA */
+				bias-disable;           /* NO PULL */
+				output-high;
+			};
+		};
+	};
+
+
+	/* WCD reset pin */
+	wcd_reset_active: wcd_reset_active {
+		mux {
+			pins = "gpio150";
+			function = "gpio";
+		};
+
+		config {
+			pins = "gpio150";
+			drive-strength = <16>;
+			output-high;
+		};
+	};
+
+	wcd_reset_sleep: wcd_reset_sleep {
+		mux {
+			pins = "gpio150";
+			function = "gpio";
+		};
+
+		config {
+			pins = "gpio150";
+			drive-strength = <16>;
+			bias-disable;
+			output-low;
+		};
+	};
+
+/* WSA speaker reset pins  North Pins*/
+	spkr_1_sd_n {
+		spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
+			mux {
+				pins = "gpio59";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio59";
+				drive-strength = <2>;   /* 2 mA */
+				bias-pull-down;
+				input-enable;
+			};
+		};
+
+		spkr_1_sd_n_active: spkr_1_sd_n_active {
+			mux {
+				pins = "gpio59";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio59";
+				drive-strength = <16>;   /* 16 mA */
+				bias-disable;
+				output-high;
+			};
+		};
+	};
+
+/* WSA speaker reset pins  south Pins*/
+	spkr_2_sd_n {
+		spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
+			mux {
+				pins = "gpio69";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio69";
+				drive-strength = <2>;   /* 2 mA */
+				bias-pull-down;
+				input-enable;
+			};
+		};
+
+		spkr_2_sd_n_active: spkr_2_sd_n_active {
+			mux {
+				pins = "gpio69";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio69";
+				drive-strength = <16>;   /* 16 mA */
+				bias-disable;
+				output-high;
+			};
+		};
+	};
+
 	qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
 		qupv3_se0_i2c_sda_active: qupv3_se0_i2c_sda_active {
 			mux {
diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi
index 52fdf690..8d4659b6 100644
--- a/qcom/kera.dtsi
+++ b/qcom/kera.dtsi
@@ -2285,3 +2285,12 @@
 &qupv3_se13_2uart {
 	status = "ok";
 };
+
+&qupv3_se3_i2c {
+	status = "disabled";
+	wcd_usbss: wcd939x_i2c@e {
+		compatible = "qcom,wcd939x-i2c";
+		reg = <0xe>;
+		vdd-usb-cp-supply = <&L7B>;
+	};
+};