ARM: dts: msm: correct the port mask of mbhc port

Correct the port mask of mbhc port.
Since the WCD_SWR_TX DATA0 voltage was incorrect
with default setting, but was correct when
the ADC_LP was running in the swrm bus 9.6mhz,
So copy the SWR_UC0(9.6mhz) to SWR_UC1(4.8mhz).

Change-Id: I3638349a6ebec06b8f4a828498e1285579361e45
Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
This commit is contained in:
Yuhui Zhao
2025-03-07 15:38:21 +08:00
parent 0b38d81c90
commit 8ab4f13077

View File

@@ -362,20 +362,16 @@
<2 ADC3 0x1 0 SWRM_TX1_CH3>, <2 ADC3 0x1 0 SWRM_TX1_CH3>,
<3 DMIC0 0x4 0 SWRM_TX2_CH1>, <3 DMIC0 0x4 0 SWRM_TX2_CH1>,
<3 DMIC1 0x8 0 SWRM_TX2_CH2>, <3 DMIC1 0x8 0 SWRM_TX2_CH2>,
<3 MBHC 0x1 0 SWRM_TX2_CH3>, <3 MBHC 0x4 0 SWRM_TX2_CH3>,
<4 DMIC2 0x1 0 SWRM_TX2_CH3>, <4 DMIC2 0x1 0 SWRM_TX2_CH3>,
<4 DMIC3 0x2 0 SWRM_TX2_CH4>, <4 DMIC3 0x2 0 SWRM_TX2_CH4>,
<4 DMIC4 0x3 0 SWRM_TX3_CH1>, <4 DMIC4 0x3 0 SWRM_TX3_CH1>,
<4 DMIC5 0x4 0 SWRM_TX3_CH2>; <4 DMIC5 0x4 0 SWRM_TX3_CH2>;
qcom,swr-tx-port-params = qcom,swr-tx-port-params =
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE1>, <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE1>, <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>;
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>;
qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
qcom,rx-slave = <&wcd9378_rx_slave>; qcom,rx-slave = <&wcd9378_rx_slave>;
qcom,tx-slave = <&wcd9378_tx_slave>; qcom,tx-slave = <&wcd9378_tx_slave>;