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ARM: dts: msm: Add pinctrl support on Tuna VM

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Add pinctrl support on Tuna VM.

Change-Id: Iba4d93b262a7a80a5057fde9a259c3aa31729ca6
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
This commit is contained in:
Hrishabh Rajput
2024-09-23 15:46:01 +05:30
parent 66a225b028
commit 89fe5f21e5
2 changed files with 102 additions and 0 deletions
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80
qcom/tuna-vm.dtsi
View File

@@ -187,6 +187,19 @@
allocate-base; allocate-base;
}; };
gpiomem0 {
vdevice-type = "iomem";
patch = "/soc/tlmm-vm-mem-access";
push-compatible = "qcom,tlmm-vm-mem-access";
peer-default;
memory {
qcom,label = <0x8>;
qcom,mem-info-tag = <0x3>;
allocate-base;
};
};
}; };
}; };
@@ -216,6 +229,73 @@
wakeup-source; wakeup-source;
}; };
vm_tlmm_irq: vm-tlmm-irq@0 {
compatible = "qcom,tlmm-vm-irq";
reg = <0x0 0x0>;
interrupt-controller;
#interrupt-cells = <2>;
};
tlmm: pinctrl@f000000 {
compatible = "qcom,tuna-vm-tlmm";
reg = <0x0F000000 0x1000000>;
interrupts-extended = <&vm_tlmm_irq 1 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
/* Valid pins */
gpios = /bits/ 16 <86 87 98 97 16 17 18 19 161 162 100 44 45 46 47 88 14 126 77 78 189 176>;
};
tlmm-vm-mem-access {
compatible = "qcom,tlmm-vm-mem-access";
tlmm-vm-gpio-list = <&tlmm 86 0 &tlmm 87 0 &tlmm 98 0 &tlmm 97 0 &tlmm 16 0 &tlmm 17 0
&tlmm 18 0 &tlmm 19 0 &tlmm 161 0 &tlmm 162 0 &tlmm 100 0 &tlmm 44 0
&tlmm 45 0 &tlmm 46 0 &tlmm 47 0 &tlmm 88 0 &tlmm 14 0 &tlmm 126 0
&tlmm 77 &tlmm 78 &tlmm 189 0 &tlmm 176 0>;
};
tlmm-vm-test {
compatible = "qcom,tlmm-vm-test";
pinctrl-names = "active", "sleep";
pinctrl-0 = <&qupv3_se1_7i2c_active>;
pinctrl-1 = <&qupv3_se1_7i2c_sleep>;
tlmm-vm-gpio-list = <&tlmm 86 0 &tlmm 87 0 &tlmm 98 0 &tlmm 97 0 &tlmm 16 0 &tlmm 17 0
&tlmm 18 0 &tlmm 19 0 &tlmm 161 0 &tlmm 162 0 &tlmm 100 0 &tlmm 44 0
&tlmm 45 0 &tlmm 46 0 &tlmm 47 0 &tlmm 88 0 &tlmm 14 0 &tlmm 126 0
&tlmm 77 &tlmm 78 &tlmm 189 0 &tlmm 176 0>;
};
pinctrl@f000000 {
qupv3_se1_7i2c_pins: qupv3_se1_7i2c_pins {
qupv3_se1_7i2c_active: qupv3_se1_7i2c_active {
mux {
pins = "gpio44";
function = "qup2_se7_l0";
};
config {
pins = "gpio44";
drive-strength = <2>;
bias-pull-up;
};
};
qupv3_se1_7i2c_sleep: qupv3_se1_7i2c_sleep {
mux {
pins = "gpio44";
function = "gpio";
};
config {
pins = "gpio44";
drive-strength = <2>;
};
};
};
};
psci { psci {
compatible = "arm,psci-1.0"; compatible = "arm,psci-1.0";
method = "smc"; method = "smc";

22
qcom/tuna.dtsi
View File

@@ -1037,6 +1037,28 @@
qcom,gpios-reserved = <54 4 5 6 7 82 83 111 112>; qcom,gpios-reserved = <54 4 5 6 7 82 83 111 112>;
}; };
tlmm-vm-mem-access {
compatible = "qcom,tlmm-vm-mem-access";
qcom,master;
tuivm {
qcom,label = <0x08>;
qcom,vmid = <45>;
tlmm-vm-gpio-list = <&tlmm 86 0 &tlmm 87 0 &tlmm 98 0 &tlmm 97 0 &tlmm 16 0 &tlmm 17 0
&tlmm 18 0 &tlmm 19 0 &tlmm 161 0 &tlmm 162 0 &tlmm 100 0 &tlmm 44 0
&tlmm 45 0 &tlmm 46 0 &tlmm 47 0 &tlmm 88 0 &tlmm 14 0 &tlmm 126 0
&tlmm 77 &tlmm 78 &tlmm 189 0 &tlmm 176 0>;
};
};
tlmm-vm-test {
compatible = "qcom,tlmm-vm-test";
qcom,master;
tlmm-vm-gpio-list = <&tlmm 86 0 &tlmm 87 0 &tlmm 98 0 &tlmm 97 0 &tlmm 16 0 &tlmm 17 0
&tlmm 18 0 &tlmm 19 0 &tlmm 161 0 &tlmm 162 0 &tlmm 100 0 &tlmm 44 0
&tlmm 45 0 &tlmm 46 0 &tlmm 47 0 &tlmm 88 0 &tlmm 14 0 &tlmm 126 0
&tlmm 77 &tlmm 78 &tlmm 189 0 &tlmm 176 0>;
};
slimbam: bamdma@6c04000 { slimbam: bamdma@6c04000 {
compatible = "qcom,bam-v1.7.0"; compatible = "qcom,bam-v1.7.0";
reg = <0x6c04000 0x20000>, <0x6c8f000 0x1000>; reg = <0x6c04000 0x20000>, <0x6c8f000 0x1000>;