From b7ca0a4904108c0b06966cb0ee25ba43d3357a82 Mon Sep 17 00:00:00 2001 From: Huang Yiwei Date: Tue, 30 Jul 2024 18:14:47 +0800 Subject: [PATCH 1/2] dt-bindings: Add new bindings for CPU MPAM Add new bindings for CPU MPAM. Change-Id: I856a137958140d1bc34cdfeadf5ddda4030a5c62 Signed-off-by: Huang Yiwei --- bindings/soc/qcom/qcom,cpu-mpam.yaml | 75 ++++++++++++++++++++++++++++ bindings/soc/qcom/qcom,mpam.yaml | 34 ++----------- 2 files changed, 79 insertions(+), 30 deletions(-) create mode 100644 bindings/soc/qcom/qcom,cpu-mpam.yaml diff --git a/bindings/soc/qcom/qcom,cpu-mpam.yaml b/bindings/soc/qcom/qcom,cpu-mpam.yaml new file mode 100644 index 00000000..f45d6639 --- /dev/null +++ b/bindings/soc/qcom/qcom,cpu-mpam.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,cpu-mpam.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. (QTI) CPU MPAM Driver + +maintainers: + - Huang Yiwei + +description: | + The Qualcomm Technologies, Inc. (QTI) CPU MPAM Driver provides configfs nodes + for userspace clients to set MPAM configuration with CPUCP firmware via + consolidated SCMI protocol. + +properties: + compatible: + items: + - const: qcom,cpu-mpam + + reg: + items: + - description: address and size of CPUCP DTIM area for CPUCP MPAM monitor data + + reg-names: + items: + - const: mon-base + + child-node: + description: | + Available components of the CPU MPAM. + type: object + properties: + qcom,msc-id: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: | + MSC id of the child node. + + qcom,msc-name: + $ref: '/schemas/types.yaml#/definitions/string' + description: | + MSC name of the child node. + + required: + - qcom,msc-id + - qcom,msc-name + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + +additionalProperties: false + +examples: + - | + cpu_mpam: qcom,cpu_mpam { + compatible = "qcom,cpu-mpam"; + reg = <0x17b6f000 0x400>; + reg-names = "mon-base"; + + L2_0 { + qcom,msc-id = <0>; + qcom,msc-name = "L2_0"; + }; + + L2_1 { + qcom,msc-id = <1>; + qcom,msc-name = "L2_1"; + }; + }; +... diff --git a/bindings/soc/qcom/qcom,mpam.yaml b/bindings/soc/qcom/qcom,mpam.yaml index 540f1579..9cea0902 100644 --- a/bindings/soc/qcom/qcom,mpam.yaml +++ b/bindings/soc/qcom/qcom,mpam.yaml @@ -12,29 +12,17 @@ maintainers: - Huang Yiwei description: | - The Qualcomm Technologies, Inc. (QTI) MPAM Driver provides sysfs nodes for - userspace clients to communicate MPAM configuration settings with CPUCP - firmware via consolidated SCMI protocol. + The Qualcomm Technologies, Inc. (QTI) MPAM Driver provides raw APIs to + communicate MPAM configuration settings with CPUCP firmware via + consolidated SCMI protocol. properties: compatible: - enum: - - qcom,cpu-mpam - - qcom,platform-mpam - - qcom,mpam - - reg: items: - - description: address and size of CPUCP DTIM area for MPAM monitor data - - reg-names: - items: - - const: mon-base + - const: qcom,mpam required: - compatible - - reg - - reg-names additionalProperties: false @@ -42,19 +30,5 @@ examples: - | qcom_mpam: qcom,mpam { compatible = "qcom,mpam"; - reg = <0x17b6f000 0x400>; - reg-names = "mon-base"; - }; - - cpu_mpam: qcom,cpu_mpam { - compatible = "qcom,cpu-mpam"; - reg = <0x17b6f400 0x400>; - reg-names = "mon-base"; - }; - - noc_bw_mpam: qcom,noc_bw_mpam { - compatible = "qcom,platform-mpam"; - reg = <0x17b6f800 0x400>; - reg-names = "mon-base"; }; ... From 7a4a20762908960afc94161d2f30df5531ab1074 Mon Sep 17 00:00:00 2001 From: Huang Yiwei Date: Wed, 31 Jul 2024 09:48:38 +0800 Subject: [PATCH 2/2] dt-bindings: Add new bindings for platform MPAM Add new bindings for platform MPAM. Change-Id: I311a902e3135c5a825dcf4d6446d578489498b66 Signed-off-by: Huang Yiwei --- bindings/soc/qcom/qcom,platform-mpam.yaml | 114 ++++++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 bindings/soc/qcom/qcom,platform-mpam.yaml diff --git a/bindings/soc/qcom/qcom,platform-mpam.yaml b/bindings/soc/qcom/qcom,platform-mpam.yaml new file mode 100644 index 00000000..98818c32 --- /dev/null +++ b/bindings/soc/qcom/qcom,platform-mpam.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,platform-mpam.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. (QTI) Platform MPAM Driver + +maintainers: + - Huang Yiwei + +description: | + The Qualcomm Technologies, Inc. (QTI) Platform MPAM Driver provides configfs + nodes for userspace clients to set MPAM configuration with CPUCP firmware via + consolidated SCMI protocol. + +properties: + compatible: + items: + - const: qcom,platform-mpam + + reg: + items: + - description: address and size of CPUCP DTIM area for Platform MPAM + monitor data + + reg-names: + items: + - const: mon-base + + qcom,msc-id: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: | + MSC id of the component. + + qcom,msc-name: + $ref: '/schemas/types.yaml#/definitions/string' + description: | + MSC name of the component. + + qcom,gears: + $ref: '/schemas/types.yaml#/definitions/string-array' + description: | + Available gear names of the component. + + qcom,gear-id: + $ref: '/schemas/types.yaml#/definitions/uint32-array' + description: | + Available gear ids of the component. + + child-node: + description: | + Available clients of the Platform MPAM. + type: object + properties: + qcom,client-id: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: | + MSC id of the child node. + + qcom,client-name: + $ref: '/schemas/types.yaml#/definitions/string' + description: | + MSC name of the child node. + + required: + - qcom,client-id + - qcom,client-name + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - qcom,msc-id + - qcom,msc-name + - qcom,gears + - qcom,gear-id + +additionalProperties: false + +examples: + - | + noc_bw_mpam: qcom,noc_bw_mpam { + compatible = "qcom,platform-mpam"; + reg = <0x17b6f400 0x400>; + reg-names = "mon-base"; + qcom,msc-id = <3>; + qcom,msc-name = "noc_bw"; + qcom,gears = "low", "medium", "high", "veryhigh"; + qcom,gear-id = <1>, <2>, <3>, <4>; + + cpu_cluster0 { + qcom,client-id = <0x1>; + qcom,client-name = "cpu_cluster0"; + }; + + cpu_cluster1 { + qcom,client-id = <0x2>; + qcom,client-name = "cpu_cluster1"; + }; + + gpu { + qcom,client-id = <0x10>; + qcom,client-name = "gpu"; + }; + + nsp { + qcom,client-id = <0x100>; + qcom,client-name = "nsp"; + }; + }; +...