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ARM: dts: msm: Correct etr interrupts for kera

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Correct etr interrupts for kera.

Change-Id: Id47f2a0765ca43755a19f2627269a6241692262c
Signed-off-by: songchai <quic_songchai@quicinc.com>
This commit is contained in:
songchai
2024-12-26 18:44:01 +08:00
committed by Rohit Jadhav
parent 8a3443db2a
commit 888d601177
1 changed files with 2 additions and 2 deletions
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4
qcom/kera-coresight.dtsi
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@@ -4326,7 +4326,7 @@
csr-irqctrl-offset = <0x6c>; csr-irqctrl-offset = <0x6c>;
byte-cntr-name = "byte-cntr"; byte-cntr-name = "byte-cntr";
byte-cntr-class-name = "coresight-tmc-etr-stream"; byte-cntr-class-name = "coresight-tmc-etr-stream";
interrupts = <GIC_SPI 738 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 352 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "byte-cntr-irq"; interrupt-names = "byte-cntr-irq";
clocks = <&aoss_qmp>; clocks = <&aoss_qmp>;
@@ -4359,7 +4359,7 @@
csr-irqctrl-offset = <0x70>; csr-irqctrl-offset = <0x70>;
byte-cntr-name = "byte-cntr1"; byte-cntr-name = "byte-cntr1";
byte-cntr-class-name = "coresight-tmc-etr1-stream"; byte-cntr-class-name = "coresight-tmc-etr1-stream";
interrupts = <GIC_SPI 737 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 362 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "byte-cntr-irq"; interrupt-names = "byte-cntr-irq";
clocks = <&aoss_qmp>; clocks = <&aoss_qmp>;