From 34133f31a813d9f97459a137687600ed20cfd6a0 Mon Sep 17 00:00:00 2001 From: Gerrit SelfHelp Service Account Date: Thu, 9 Nov 2023 04:39:00 -0800 Subject: [PATCH 01/13] Initial empty repository From e071da204fa9a55db0f9949687b56a3f4f3681c4 Mon Sep 17 00:00:00 2001 From: Ram Nagesh Date: Mon, 8 Jan 2024 15:55:44 +0530 Subject: [PATCH 02/13] ARM: dts: msm: Initial commit for synx-devicetree Signed-off-by: Ram Nagesh Change-Id: Ia7dc3119a366e42166e2a5e7cce988a471704dff --- Kbuild | 18 +++ Makefile | 20 +++ bindings/qcom,ipclite.txt | 86 +++++++++++ config/pineapple.mk | 4 + config/sun.mk | 4 + pineapple-synx-atp.dts | 15 ++ pineapple-synx-common.dtsi | 11 ++ pineapple-synx-mtp.dts | 13 ++ sun-synx-cdp.dts | 15 ++ sun-synx-common.dtsi | 11 ++ sun-synx-mtp.dts | 15 ++ sun-synx-qrd.dts | 13 ++ synx/pineapple-synx.dts | 15 ++ synx/pineapple-synx.dtsi | 291 +++++++++++++++++++++++++++++++++++++ synx/sun-synx.dts | 15 ++ synx/sun-synx.dtsi | 291 +++++++++++++++++++++++++++++++++++++ 16 files changed, 837 insertions(+) create mode 100644 Kbuild create mode 100644 Makefile create mode 100644 bindings/qcom,ipclite.txt create mode 100644 config/pineapple.mk create mode 100644 config/sun.mk create mode 100644 pineapple-synx-atp.dts create mode 100644 pineapple-synx-common.dtsi create mode 100644 pineapple-synx-mtp.dts create mode 100644 sun-synx-cdp.dts create mode 100644 sun-synx-common.dtsi create mode 100644 sun-synx-mtp.dts create mode 100644 sun-synx-qrd.dts create mode 100644 synx/pineapple-synx.dts create mode 100644 synx/pineapple-synx.dtsi create mode 100644 synx/sun-synx.dts create mode 100644 synx/sun-synx.dtsi diff --git a/Kbuild b/Kbuild new file mode 100644 index 00000000..c6b9be42 --- /dev/null +++ b/Kbuild @@ -0,0 +1,18 @@ +# Use current $(MSM_ARCH) to set config/ makefile path +SYNX_TARGET_MKFILE_PATH := $(SYNX_DEVICETREE_ROOT)/config/$(MSM_ARCH).mk +# Check to see if current target makefile exists +SYNX_TARGET_EXISTS := $(or $(and $(wildcard $(SYNX_TARGET_MKFILE_PATH)),y),n) + +# Since Kernel SI can support multiple ARCH's this allows only the current selected target ARCH +# to compile. +ifeq ($(SYNX_TARGET_EXISTS), y) +include $(SYNX_TARGET_MKFILE_PATH) +else +# Print a warning but do not throw an error to allow bring-up of new targets! +$(warning [$(MODNAME)] $(MSM_ARCH) is not a valid target, make sure config\ folder contains a makefile named $(MSM_ARCH).mk) +$(warning [$(MODNAME)] driver is NOT being enabled!) +endif + +always-y := $(dtbo-y) $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb *.dtbo diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..37f193f9 --- /dev/null +++ b/Makefile @@ -0,0 +1,20 @@ + +SYNX_DEVICETREE_ROOT=$(KERNEL_SRC)/$(M) +SYNX_KERNEL_ROOT=$(SYNX_DEVICETREE_ROOT)/../../opensource/synx-kernel + +KBUILD_OPTIONS += SYNX_DEVICETREE_ROOT=$(KERNEL_SRC)/$(M) +KBUILD_OPTIONS += KBUILD_DTC_INCLUDE=$(SYNX_KERNEL_ROOT) +KBUILD_OPTIONS += KBUILD_EXTMOD_DTS=. +KBUILD_OPTIONS += KERNEL_ROOT=$(ROOT_DIR)/$(KERNEL_DIR) +KBUILD_OPTIONS += MODNAME=synx-devicetree + +all: dtbs + +dtbs: + $(MAKE) -C $(KERNEL_SRC) M=$(M) dtbs $(KBUILD_OPTIONS) + +modules_install: + $(MAKE) M=$(M) -C $(KERNEL_SRC) modules_install + +clean: + $(MAKE) -C $(KERNEL_SRC) M=$(M) clean diff --git a/bindings/qcom,ipclite.txt b/bindings/qcom,ipclite.txt new file mode 100644 index 00000000..07d37f22 --- /dev/null +++ b/bindings/qcom,ipclite.txt @@ -0,0 +1,86 @@ +Qualcomm Technologies, Inc. IPCLite Framework + +This binding describes IPCLite protocol within the system. +IPCLite is a light weight mechanism for communication between +subsystem-pairs. This protocol will be primarily used to +support low-latency signalling for Global Synx framework. + +- compatible : + Usage: required + Value type: + Definition: must be "qcom,ipclite" + +- label: + Usage: optional + Value type: + Definition: should specify the subsystem name this edge corresponds to. + +- global_atomic: + Usage: required + Value type: + Definition: this property specifies if the core supports global atomic operations + 1 if cores supports, 0 if core doesn't support global atomic operations + +- interrupts: + Usage: required + Value type: + Definition: should specify the IRQ used by the remote processor to + signal this processor about communication related events + +- qcom,remote-pid: + Usage: required for ipcmem + Value type: + Definition: specifies the identifier of the remote endpoint of this edge + +- mboxes: + Usage: required + Value type: + Definition: reference to the "rpm_hlos" mailbox in APCS, as described + in mailbox/mailbox.txt + += EXAMPLE +The following example represents the IPCLite node along with cdsp sub-node. + +ipclite { + compatible = "qcom,ipclite"; + memory-region = <&global_sync_mem>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + ipclite_cdsp: cdsp { + qcom,remote-pid = <5>; + label = "cdsp"; + global_atomic = <0>; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; +}; diff --git a/config/pineapple.mk b/config/pineapple.mk new file mode 100644 index 00000000..8cfc7dec --- /dev/null +++ b/config/pineapple.mk @@ -0,0 +1,4 @@ +dtbo-y := synx/pineapple-synx.dtbo +dtbo-y += pineapple-synx-atp.dtbo +dtbo-y += pineapple-synx-mtp.dtbo + diff --git a/config/sun.mk b/config/sun.mk new file mode 100644 index 00000000..6b319c3d --- /dev/null +++ b/config/sun.mk @@ -0,0 +1,4 @@ +dtbo-y := synx/sun-synx.dtbo +#dtbo-y += sun-synx-cdp.dtbo +#dtbo-y += sun-synx-mtp.dtbo +#dtbo-y += sun-synx-qrd.dtbo diff --git a/pineapple-synx-atp.dts b/pineapple-synx-atp.dts new file mode 100644 index 00000000..c73d090a --- /dev/null +++ b/pineapple-synx-atp.dts @@ -0,0 +1,15 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +/dts-v1/; +/plugin/; + +#include +#include +#include "synx/pineapple-synx.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Pineapple"; + compatible = "qcom,pineapple"; + qcom,msm-id = <557 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/pineapple-synx-common.dtsi b/pineapple-synx-common.dtsi new file mode 100644 index 00000000..028eeb42 --- /dev/null +++ b/pineapple-synx-common.dtsi @@ -0,0 +1,11 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +//&soc { +// st54spi_gpio { +// status = "ok"; +// compatible = "st,st54spi_gpio"; +// /* gpio used as SE_nRESET */ +// gpio-power_nreset = <&tlmm 12 0x00>; +// }; +//}; + diff --git a/pineapple-synx-mtp.dts b/pineapple-synx-mtp.dts new file mode 100644 index 00000000..63207d43 --- /dev/null +++ b/pineapple-synx-mtp.dts @@ -0,0 +1,13 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +/dts-v1/; +/plugin/; + +#include "pineapple-synx-common.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Lanai MTP"; + compatible = "qcom,lanai-mtp", "qcom,lanai", "qcom,mtp"; + qcom,msm-id = <519 0x10000>, <536 0x10000>; + qcom,board-id = <0x10008 0>; +}; diff --git a/sun-synx-cdp.dts b/sun-synx-cdp.dts new file mode 100644 index 00000000..5db529d2 --- /dev/null +++ b/sun-synx-cdp.dts @@ -0,0 +1,15 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +// /dts-v1/; +// /plugin/; +// +// #include +// #include +// #include "synx/sun-synx.dtsi" +// +// / { +// model = "Qualcomm Technologies, Inc. Sun CDP"; +// compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp"; +// qcom,msm-id = <618 0x10000>; +// qcom,board-id = <1 0>; +// }; \ No newline at end of file diff --git a/sun-synx-common.dtsi b/sun-synx-common.dtsi new file mode 100644 index 00000000..028eeb42 --- /dev/null +++ b/sun-synx-common.dtsi @@ -0,0 +1,11 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +//&soc { +// st54spi_gpio { +// status = "ok"; +// compatible = "st,st54spi_gpio"; +// /* gpio used as SE_nRESET */ +// gpio-power_nreset = <&tlmm 12 0x00>; +// }; +//}; + diff --git a/sun-synx-mtp.dts b/sun-synx-mtp.dts new file mode 100644 index 00000000..1402f98f --- /dev/null +++ b/sun-synx-mtp.dts @@ -0,0 +1,15 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +// /dts-v1/; +// /plugin/; +// +// #include +// #include +// #include "sun-synx-common.dtsi" +// +// / { +// model = "Qualcomm Technologies, Inc. Sun MTP"; +// compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; +// qcom,msm-id = <618 0x10000>; +// qcom,board-id = <8 0>; +// }; \ No newline at end of file diff --git a/sun-synx-qrd.dts b/sun-synx-qrd.dts new file mode 100644 index 00000000..3b53a08e --- /dev/null +++ b/sun-synx-qrd.dts @@ -0,0 +1,13 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +// /dts-v1/; +// /plugin/; +// +// #include "sun-synx-common.dtsi" +// +// / { +// model = "Qualcomm Technologies, Inc. Sun QRD"; +// compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; +// qcom,msm-id = <618 0x10000>; +// qcom,board-id = <11 0>; +// }; \ No newline at end of file diff --git a/synx/pineapple-synx.dts b/synx/pineapple-synx.dts new file mode 100644 index 00000000..346aac34 --- /dev/null +++ b/synx/pineapple-synx.dts @@ -0,0 +1,15 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +/dts-v1/; +/plugin/; + +#include +#include +#include "pineapple-synx.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Pineapple"; + compatible = "qcom,pineapple"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/synx/pineapple-synx.dtsi b/synx/pineapple-synx.dtsi new file mode 100644 index 00000000..c0aec61a --- /dev/null +++ b/synx/pineapple-synx.dtsi @@ -0,0 +1,291 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +#include + +&soc { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + ipcc_compute_l0: qcom,ipcc_compute_l0@443000 { + compatible = "qcom,ipcc"; + reg = <0x443000 0x1000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + #mbox-cells = <2>; + }; + ipclite { + compatible = "qcom,ipclite"; + memory-region = <&global_sync_mem>; + hwlocks = <&tcsr_mutex 11>; + #address-cells = <1>; + #size-cells = <1>; + major_version = <1>; + minor_version = <0>; + feature_mask_low = <0x0003>; + feature_mask_high = <0x0000>; + ranges; + + ipclite_apss: apss { + qcom,remote-pid = <0>; + label = "apss"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_BROADCAST + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cdsp: cdsp { + qcom,remote-pid = <5>; + label = "cdsp"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cvp: cvp { + qcom,remote-pid = <6>; + label = "cvp"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cam: cam { + qcom,remote-pid = <7>; + label = "cam"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + }; + +}; diff --git a/synx/sun-synx.dts b/synx/sun-synx.dts new file mode 100644 index 00000000..2a93da13 --- /dev/null +++ b/synx/sun-synx.dts @@ -0,0 +1,15 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +/dts-v1/; +/plugin/; + +#include +#include +#include "sun-synx.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun SoC"; + compatible = "qcom,sun"; + qcom,msm-id = <618 0x10000>; + qcom,board-id = <0 0>; +}; \ No newline at end of file diff --git a/synx/sun-synx.dtsi b/synx/sun-synx.dtsi new file mode 100644 index 00000000..c0aec61a --- /dev/null +++ b/synx/sun-synx.dtsi @@ -0,0 +1,291 @@ +Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. +SPDX-License-Identifier: BSD-3-Clause +#include + +&soc { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + ipcc_compute_l0: qcom,ipcc_compute_l0@443000 { + compatible = "qcom,ipcc"; + reg = <0x443000 0x1000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + #mbox-cells = <2>; + }; + ipclite { + compatible = "qcom,ipclite"; + memory-region = <&global_sync_mem>; + hwlocks = <&tcsr_mutex 11>; + #address-cells = <1>; + #size-cells = <1>; + major_version = <1>; + minor_version = <0>; + feature_mask_low = <0x0003>; + feature_mask_high = <0x0000>; + ranges; + + ipclite_apss: apss { + qcom,remote-pid = <0>; + label = "apss"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_BROADCAST + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cdsp: cdsp { + qcom,remote-pid = <5>; + label = "cdsp"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cvp: cvp { + qcom,remote-pid = <6>; + label = "cvp"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cam: cam { + qcom,remote-pid = <7>; + label = "cam"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + }; + +}; From 95a105a2d06816d9b49c12d980f0d774d041b242 Mon Sep 17 00:00:00 2001 From: Ram Nagesh Date: Thu, 11 Jan 2024 15:18:54 +0530 Subject: [PATCH 03/13] ARM: dts: msm: Adding comments to the markings Signed-off-by: Ram Nagesh Change-Id: If6458d3144095dffc5c28c36ec6289041bcfb445 --- pineapple-synx-atp.dts | 5 +++-- pineapple-synx-common.dtsi | 5 +++-- pineapple-synx-mtp.dts | 5 +++-- sun-synx-cdp.dts | 5 +++-- sun-synx-common.dtsi | 5 +++-- sun-synx-mtp.dts | 5 +++-- sun-synx-qrd.dts | 5 +++-- synx/pineapple-synx.dts | 5 +++-- synx/pineapple-synx.dtsi | 5 +++-- synx/sun-synx.dts | 5 +++-- synx/sun-synx.dtsi | 5 +++-- 11 files changed, 33 insertions(+), 22 deletions(-) diff --git a/pineapple-synx-atp.dts b/pineapple-synx-atp.dts index c73d090a..5372bd6e 100644 --- a/pineapple-synx-atp.dts +++ b/pineapple-synx-atp.dts @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ /dts-v1/; /plugin/; diff --git a/pineapple-synx-common.dtsi b/pineapple-synx-common.dtsi index 028eeb42..85efd1e5 100644 --- a/pineapple-synx-common.dtsi +++ b/pineapple-synx-common.dtsi @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ //&soc { // st54spi_gpio { // status = "ok"; diff --git a/pineapple-synx-mtp.dts b/pineapple-synx-mtp.dts index 63207d43..f8252ece 100644 --- a/pineapple-synx-mtp.dts +++ b/pineapple-synx-mtp.dts @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ /dts-v1/; /plugin/; diff --git a/sun-synx-cdp.dts b/sun-synx-cdp.dts index 5db529d2..312045be 100644 --- a/sun-synx-cdp.dts +++ b/sun-synx-cdp.dts @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ // /dts-v1/; // /plugin/; // diff --git a/sun-synx-common.dtsi b/sun-synx-common.dtsi index 028eeb42..85efd1e5 100644 --- a/sun-synx-common.dtsi +++ b/sun-synx-common.dtsi @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ //&soc { // st54spi_gpio { // status = "ok"; diff --git a/sun-synx-mtp.dts b/sun-synx-mtp.dts index 1402f98f..9a136c76 100644 --- a/sun-synx-mtp.dts +++ b/sun-synx-mtp.dts @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ // /dts-v1/; // /plugin/; // diff --git a/sun-synx-qrd.dts b/sun-synx-qrd.dts index 3b53a08e..b4ce63ff 100644 --- a/sun-synx-qrd.dts +++ b/sun-synx-qrd.dts @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ // /dts-v1/; // /plugin/; // diff --git a/synx/pineapple-synx.dts b/synx/pineapple-synx.dts index 346aac34..93cf6e7f 100644 --- a/synx/pineapple-synx.dts +++ b/synx/pineapple-synx.dts @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ /dts-v1/; /plugin/; diff --git a/synx/pineapple-synx.dtsi b/synx/pineapple-synx.dtsi index c0aec61a..35a1d121 100644 --- a/synx/pineapple-synx.dtsi +++ b/synx/pineapple-synx.dtsi @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ #include &soc { diff --git a/synx/sun-synx.dts b/synx/sun-synx.dts index 2a93da13..5ffff479 100644 --- a/synx/sun-synx.dts +++ b/synx/sun-synx.dts @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ /dts-v1/; /plugin/; diff --git a/synx/sun-synx.dtsi b/synx/sun-synx.dtsi index c0aec61a..35a1d121 100644 --- a/synx/sun-synx.dtsi +++ b/synx/sun-synx.dtsi @@ -1,5 +1,6 @@ -Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. -SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ #include &soc { From 3da00e29bbe94a51171880a0c37e7f9a528821b3 Mon Sep 17 00:00:00 2001 From: NITIN LAXMIDAS NAIK Date: Wed, 7 Feb 2024 09:22:22 -0800 Subject: [PATCH 04/13] msm: synx: Adding APQ variant msm id for synx devicetree Adding msm id for APQ variant V1 and V2 for sun target Signed-off-by: NITIN LAXMIDAS NAIK Change-Id: Ic9cf304dfe0ac82af8a99da274dfd06e021e122d --- synx/sun-synx.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/synx/sun-synx.dts b/synx/sun-synx.dts index 5ffff479..2d9915d9 100644 --- a/synx/sun-synx.dts +++ b/synx/sun-synx.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Sun SoC"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0 0>; }; \ No newline at end of file From 73180df613461edd3f298724e06bdaaee2a41af0 Mon Sep 17 00:00:00 2001 From: NITIN LAXMIDAS NAIK Date: Wed, 7 Feb 2024 09:22:22 -0800 Subject: [PATCH 05/13] msm: synx: Adding APQ variant msm id for synx devicetree Adding msm id for APQ variant V1 and V2 for sun target Signed-off-by: NITIN LAXMIDAS NAIK Change-Id: Ic9cf304dfe0ac82af8a99da274dfd06e021e122d Signed-off-by: Bruce Levy --- synx/sun-synx.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/synx/sun-synx.dts b/synx/sun-synx.dts index 5ffff479..2d9915d9 100644 --- a/synx/sun-synx.dts +++ b/synx/sun-synx.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Sun SoC"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0 0>; }; \ No newline at end of file From 7e5cbfeda15e84f7fdc8fa7fa2cfb278c0de5d0c Mon Sep 17 00:00:00 2001 From: Vaishali Gupta Date: Mon, 18 Mar 2024 22:06:41 -0700 Subject: [PATCH 06/13] Revert "msm: synx: Adding APQ variant msm id for synx devicetree" This reverts commit 73180df613461edd3f298724e06bdaaee2a41af0. Change-Id: I8f508fbb4fa971e7ef24e32e8ac586001febcf54 Signed-off-by: Vaishali Gupta --- synx/sun-synx.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/synx/sun-synx.dts b/synx/sun-synx.dts index 2d9915d9..5ffff479 100644 --- a/synx/sun-synx.dts +++ b/synx/sun-synx.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Sun SoC"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>; qcom,board-id = <0 0>; }; \ No newline at end of file From ff51362c179f70108fe55ba70452e8f9000feb7e Mon Sep 17 00:00:00 2001 From: VijayaRamarao Mellempudi Date: Thu, 4 Apr 2024 16:24:16 -0700 Subject: [PATCH 07/13] ARM: dts: msm: new MSM-ID to support for different packagings add new MSM-ID for SUN target Change-Id: I01a2aab87fec2f9a00662a6741630b93762d35dd --- synx/sun-synx.dts | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/synx/sun-synx.dts b/synx/sun-synx.dts index 2d9915d9..daadb6c1 100644 --- a/synx/sun-synx.dts +++ b/synx/sun-synx.dts @@ -11,6 +11,8 @@ / { model = "Qualcomm Technologies, Inc. Sun SoC"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0 0>; -}; \ No newline at end of file +}; From fee1af2a6b9bb2234965c59dff9aa3cba060f499 Mon Sep 17 00:00:00 2001 From: vchollan Date: Mon, 16 Sep 2024 16:20:26 +0530 Subject: [PATCH 08/13] msm: synx: Bonito synx dtsi changes Change-Id: I01cd065cfb2b7148de8e05e00fa45c6e7da70ca5 Signed-off-by: vchollan --- config/sun.mk | 12 +- synx/tuna-synx.dts | 16 +++ synx/tuna-synx.dtsi | 292 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 316 insertions(+), 4 deletions(-) create mode 100644 synx/tuna-synx.dts create mode 100644 synx/tuna-synx.dtsi diff --git a/config/sun.mk b/config/sun.mk index 6b319c3d..88a77a8f 100644 --- a/config/sun.mk +++ b/config/sun.mk @@ -1,4 +1,8 @@ -dtbo-y := synx/sun-synx.dtbo -#dtbo-y += sun-synx-cdp.dtbo -#dtbo-y += sun-synx-mtp.dtbo -#dtbo-y += sun-synx-qrd.dtbo +ifeq ($(CONFIG_ARCH_TUNA), y) + dtbo-y := synx/tuna-synx.dtbo +else + dtbo-y := synx/sun-synx.dtbo + #dtbo-y += sun-synx-cdp.dtbo + #dtbo-y += sun-synx-mtp.dtbo + #dtbo-y += sun-synx-qrd.dtbo +endif diff --git a/synx/tuna-synx.dts b/synx/tuna-synx.dts new file mode 100644 index 00000000..3c25fa68 --- /dev/null +++ b/synx/tuna-synx.dts @@ -0,0 +1,16 @@ +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ +/dts-v1/; +/plugin/; + +#include +#include +#include "tuna-synx.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. tuna SoC"; + compatible = "qcom,tuna"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <0 0>, <15 0>; +}; \ No newline at end of file diff --git a/synx/tuna-synx.dtsi b/synx/tuna-synx.dtsi new file mode 100644 index 00000000..e64e131b --- /dev/null +++ b/synx/tuna-synx.dtsi @@ -0,0 +1,292 @@ +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ +#include + +&soc { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + ipcc_compute_l0: qcom,ipcc_compute_l0@443000 { + compatible = "qcom,ipcc"; + reg = <0x443000 0x1000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + #mbox-cells = <2>; + }; + ipclite { + compatible = "qcom,ipclite"; + memory-region = <&global_sync_mem>; + hwlocks = <&tcsr_mutex 11>; + #address-cells = <1>; + #size-cells = <1>; + major_version = <1>; + minor_version = <0>; + feature_mask_low = <0x0003>; + feature_mask_high = <0x0000>; + ranges; + + ipclite_apss: apss { + qcom,remote-pid = <0>; + label = "apss"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_BROADCAST + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cdsp: cdsp { + qcom,remote-pid = <5>; + label = "cdsp"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cvp: cvp { + qcom,remote-pid = <6>; + label = "cvp"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cam: cam { + qcom,remote-pid = <7>; + label = "cam"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + }; + +}; From 7625dce00e823ac2a95966eb3b63854a3d66855d Mon Sep 17 00:00:00 2001 From: vchollan Date: Tue, 22 Oct 2024 18:44:33 +0530 Subject: [PATCH 09/13] msm: synx: make file changes of synx-tuna Bringup CONFIG_ARCH_TUNA is enabled for tuna and sun variants. Both tuna and sun dts files getting compiled, corresponding dts variant will be picked based on msm-id. Change-Id: Iff3f77eb6ef22d897dfd08b4e9b919c92eaac43a Signed-off-by: vchollan --- config/sun.mk | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/config/sun.mk b/config/sun.mk index 88a77a8f..ef5df50f 100644 --- a/config/sun.mk +++ b/config/sun.mk @@ -1,8 +1,7 @@ +dtbo-y := synx/sun-synx.dtbo ifeq ($(CONFIG_ARCH_TUNA), y) - dtbo-y := synx/tuna-synx.dtbo -else - dtbo-y := synx/sun-synx.dtbo - #dtbo-y += sun-synx-cdp.dtbo - #dtbo-y += sun-synx-mtp.dtbo - #dtbo-y += sun-synx-qrd.dtbo + dtbo-y += synx/tuna-synx.dtbo endif +#dtbo-y += sun-synx-cdp.dtbo +#dtbo-y += sun-synx-mtp.dtbo +#dtbo-y += sun-synx-qrd.dtbo From 4facd7acc97a2673f6eb598335886bc48fffa9c4 Mon Sep 17 00:00:00 2001 From: vchollan Date: Mon, 28 Oct 2024 19:30:34 +0530 Subject: [PATCH 10/13] msm: synx: synx dts changes for tunaP variant Change-Id: I99ad97ed1174beb4c19b1fc6cafceca90eee9544 Signed-off-by: vchollan --- synx/tuna-synx.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/synx/tuna-synx.dts b/synx/tuna-synx.dts index 3c25fa68..17dd3b19 100644 --- a/synx/tuna-synx.dts +++ b/synx/tuna-synx.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. tuna SoC"; compatible = "qcom,tuna"; - qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,msm-id = <655 0x10000>, <681 0x10000>, <694 0x10000>; qcom,board-id = <0 0>, <15 0>; }; \ No newline at end of file From dd07b1d6e5af86815d10dd10a23160fee254048a Mon Sep 17 00:00:00 2001 From: vchollan Date: Wed, 4 Dec 2024 16:47:00 +0530 Subject: [PATCH 11/13] msm: synx: Kera(Eliza) synx dtsi changes Change-Id: I33af6c6314d020fd144835ebc1312a1d31c0bd10 Signed-off-by: vchollan --- config/sun.mk | 2 +- synx/tuna-synx.dts | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/config/sun.mk b/config/sun.mk index ef5df50f..c735285d 100644 --- a/config/sun.mk +++ b/config/sun.mk @@ -1,5 +1,5 @@ dtbo-y := synx/sun-synx.dtbo -ifeq ($(CONFIG_ARCH_TUNA), y) +ifneq (, $(filter y, $(CONFIG_ARCH_TUNA) $(CONFIG_ARCH_KERA))) dtbo-y += synx/tuna-synx.dtbo endif #dtbo-y += sun-synx-cdp.dtbo diff --git a/synx/tuna-synx.dts b/synx/tuna-synx.dts index 17dd3b19..92f32fb9 100644 --- a/synx/tuna-synx.dts +++ b/synx/tuna-synx.dts @@ -11,6 +11,7 @@ / { model = "Qualcomm Technologies, Inc. tuna SoC"; compatible = "qcom,tuna"; - qcom,msm-id = <655 0x10000>, <681 0x10000>, <694 0x10000>; + qcom,msm-id = <655 0x10000>, <681 0x10000>, <694 0x10000>, <659 0x10000>, + <686 0x10000>; qcom,board-id = <0 0>, <15 0>; }; \ No newline at end of file From 40ccf0476caf58bc76bd992fbbfdcbefa9b44f45 Mon Sep 17 00:00:00 2001 From: vchollan Date: Wed, 4 Dec 2024 16:47:00 +0530 Subject: [PATCH 12/13] msm: synx: Kera(Eliza) synx dtsi changes Change-Id: I33af6c6314d020fd144835ebc1312a1d31c0bd10 Signed-off-by: vchollan --- config/sun.mk | 2 +- synx/tuna-synx.dts | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/config/sun.mk b/config/sun.mk index ef5df50f..c735285d 100644 --- a/config/sun.mk +++ b/config/sun.mk @@ -1,5 +1,5 @@ dtbo-y := synx/sun-synx.dtbo -ifeq ($(CONFIG_ARCH_TUNA), y) +ifneq (, $(filter y, $(CONFIG_ARCH_TUNA) $(CONFIG_ARCH_KERA))) dtbo-y += synx/tuna-synx.dtbo endif #dtbo-y += sun-synx-cdp.dtbo diff --git a/synx/tuna-synx.dts b/synx/tuna-synx.dts index 17dd3b19..92f32fb9 100644 --- a/synx/tuna-synx.dts +++ b/synx/tuna-synx.dts @@ -11,6 +11,7 @@ / { model = "Qualcomm Technologies, Inc. tuna SoC"; compatible = "qcom,tuna"; - qcom,msm-id = <655 0x10000>, <681 0x10000>, <694 0x10000>; + qcom,msm-id = <655 0x10000>, <681 0x10000>, <694 0x10000>, <659 0x10000>, + <686 0x10000>; qcom,board-id = <0 0>, <15 0>; }; \ No newline at end of file From 3099b0c2ee01fe393ca7e8083ee844020d3062f0 Mon Sep 17 00:00:00 2001 From: yulong li Date: Sun, 30 Mar 2025 14:14:48 +0800 Subject: [PATCH 13/13] synx-devicetree: fix synx devicetree compile can not find sun_le.mk add sun_le.mk to compile synx-devicetree Change-Id: Id2d90d45b1efed41ad6e44598d469c5fbc34f5a2 --- Makefile | 7 +++---- config/sun_le.mk | 4 ++++ 2 files changed, 7 insertions(+), 4 deletions(-) create mode 100644 config/sun_le.mk diff --git a/Makefile b/Makefile index 37f193f9..e3ef2242 100644 --- a/Makefile +++ b/Makefile @@ -1,9 +1,8 @@ - -SYNX_DEVICETREE_ROOT=$(KERNEL_SRC)/$(M) +SYNX_DEVICETREE_ROOT=$(shell pwd) SYNX_KERNEL_ROOT=$(SYNX_DEVICETREE_ROOT)/../../opensource/synx-kernel -KBUILD_OPTIONS += SYNX_DEVICETREE_ROOT=$(KERNEL_SRC)/$(M) -KBUILD_OPTIONS += KBUILD_DTC_INCLUDE=$(SYNX_KERNEL_ROOT) +KBUILD_OPTIONS += SYNX_DEVICETREE_ROOT=$(shell pwd) +KBUILD_OPTIONS += KBUILD_DTC_INCLUDE+=$(SYNX_KERNEL_ROOT) KBUILD_OPTIONS += KBUILD_EXTMOD_DTS=. KBUILD_OPTIONS += KERNEL_ROOT=$(ROOT_DIR)/$(KERNEL_DIR) KBUILD_OPTIONS += MODNAME=synx-devicetree diff --git a/config/sun_le.mk b/config/sun_le.mk new file mode 100644 index 00000000..e42c1d08 --- /dev/null +++ b/config/sun_le.mk @@ -0,0 +1,4 @@ +dtbo-y := synx/sun-synx.dtbo +ifneq (, $(filter y, $(CONFIG_ARCH_TUNA) $(CONFIG_ARCH_KERA))) + dtbo-y += synx/tuna-synx.dtbo +endif