From e2885ffc431cb0e4d9969db4e9355d12b50d28a3 Mon Sep 17 00:00:00 2001 From: Rashid Zafar Date: Tue, 22 Aug 2023 00:16:00 -0700 Subject: [PATCH 1/4] dt-bindings: interrupt-controller: qcom,pdc: Add sun Document sun compatible property. Change-Id: I24e2957f324d8ec532ee40b343c6f3779a566ea1 Signed-off-by: Rashid Zafar --- bindings/interrupt-controller/qcom,pdc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/bindings/interrupt-controller/qcom,pdc.yaml b/bindings/interrupt-controller/qcom,pdc.yaml index b6f56cf5..b0ad74d7 100644 --- a/bindings/interrupt-controller/qcom,pdc.yaml +++ b/bindings/interrupt-controller/qcom,pdc.yaml @@ -33,6 +33,7 @@ properties: - qcom,sm8150-pdc - qcom,sm8250-pdc - qcom,sm8350-pdc + - qcom,sun-pdc - const: qcom,pdc reg: From b1b99b1e21a40375cf9af561dbd4c4acd1f8e9ac Mon Sep 17 00:00:00 2001 From: Rashid Zafar Date: Mon, 21 Aug 2023 15:59:26 -0700 Subject: [PATCH 2/4] ARM: dts: msm: Add PDC irqchip for sun Add PDC interrupt controller to support wake irqs. Change-Id: I459a68079611f7ed08977b2296b7d4377eb649ee Signed-off-by: Rashid Zafar --- qcom/sun.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index 26b69a4e..cb39047f 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -198,6 +198,16 @@ #hwlock-cells = <1>; }; + pdc: interrupt-controller@b220000 { + compatible = "qcom,sun-pdc", "qcom,pdc"; + reg = <0xb220000 0x10000>, <0x164400F0 0x64>; + qcom,pdc-ranges = <0 745 51>, <51 527 47>, + <98 609 32>, <130 717 12>, + <142 251 5>, <147 796 16>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; tlmm: pinctrl@f000000 { compatible = "qcom,sun-tlmm"; @@ -207,6 +217,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + wakeup-parent = <&pdc>; }; intc: interrupt-controller@16000000 { From b328de5242e49bf75cfba4124438247578b6fa42 Mon Sep 17 00:00:00 2001 From: Chris Lew Date: Mon, 10 Jul 2023 16:01:14 -0700 Subject: [PATCH 3/4] ARM: dts: msm: Add AOSS and TME QMP nodes for sun Add the nodes to describe the QMP devices to communicate with AOSS and TME. Change-Id: Iaac6b401e3554ce696a9faf5abaeb16717ff0907 Signed-off-by: Chris Lew --- qcom/sun.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index cb39047f..035b7837 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -14,8 +14,10 @@ #include #include #include +#include #include #include +#include / { model = "Qualcomm Technologies, Inc. Sun"; @@ -209,6 +211,38 @@ interrupt-controller; }; + aoss_qmp: power-controller@c300000 { + compatible = "qcom,aoss-qmp"; + reg = <0xc300000 0x400>; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + mboxes = <&ipcc_mproc IPCC_CLIENT_AOP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + #power-domain-cells = <1>; + #clock-cells = <0>; + }; + + qmp_tme: qcom,qmp-tme { + compatible = "qcom,qmp-mbox"; + qcom,remote-pid = <14>; + mboxes = <&ipcc_mproc IPCC_CLIENT_TME + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "tme_qmp"; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + + label = "tme"; + qcom,early-boot; + priority = <0>; + mbox-desc-offset = <0x0>; + #mbox-cells = <1>; + }; + tlmm: pinctrl@f000000 { compatible = "qcom,sun-tlmm"; reg = <0xf000000 0x1000000>; From 830e4d7eb4502e5bc15a25d4cbfa935ed760f955 Mon Sep 17 00:00:00 2001 From: Chris Lew Date: Mon, 10 Jul 2023 19:49:46 -0700 Subject: [PATCH 4/4] ARM: dts: msm: Add smp2p for sun Add the smp2p nodes for lpaidsp, modem, cdsp and soccp for sun. Change-Id: I9664b57fbb8f39e5edbadfad66882d97fe1634d3 Signed-off-by: Chris Lew --- qcom/sun.dtsi | 101 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index 035b7837..9c90bc06 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -243,6 +243,107 @@ #mbox-cells = <1>; }; + qcom,smp2p-adsp { + compatible = "qcom,smp2p"; + qcom,smem = <443>, <429>; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <2>; + + adsp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + adsp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + sleepstate_smp2p_out: sleepstate-out { + qcom,entry-name = "sleepstate"; + #qcom,smem-state-cells = <1>; + }; + + sleepstate_smp2p_in: qcom,sleepstate-in { + qcom,entry-name = "sleepstate_see"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + + qcom,smp2p-cdsp { + compatible = "qcom,smp2p"; + qcom,smem = <94>, <432>; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <5>; + + cdsp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + cdsp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + qcom,smp2p-modem { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + modem_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + modem_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + qcom,smp2p-soccp { + compatible = "qcom,smp2p"; + qcom,smem = <617>, <616>; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + mboxes = <&ipcc_mproc IPCC_CLIENT_SOCCP IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <19>; + + soccp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + soccp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + tlmm: pinctrl@f000000 { compatible = "qcom,sun-tlmm"; reg = <0xf000000 0x1000000>;