From 8642f7b4094c84f4af45d1ed0ceae644fdc499d6 Mon Sep 17 00:00:00 2001
From: songchai <quic_songchai@quicinc.com>
Date: Sun, 5 Jan 2025 18:18:56 -0800
Subject: [PATCH] ARM: dts: msm: Reserve 32kb to dcc on HLOS for kera

Reserve 32kb to dcc on HLOS for kera.

Change-Id: I926dc00c21e46411785392e08121b08ad116003e
Signed-off-by: songchai <quic_songchai@quicinc.com>
---
 qcom/kera-debug.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/qcom/kera-debug.dtsi b/qcom/kera-debug.dtsi
index da91ef64..da87105f 100644
--- a/qcom/kera-debug.dtsi
+++ b/qcom/kera-debug.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <dt-bindings/soc/qcom,dcc_v2.h>
@@ -20,13 +20,13 @@
 	dcc: dcc_v2@100ff000 {
 		compatible = "qcom,dcc-v2";
 		reg = <0x100ff000 0x1000>,
-		      <0x10084000 0x4000>;
+		      <0x10080000 0x8000>;
 
 		status = "disabled";
 		qcom,transaction_timeout = <0>;
 
 		reg-names = "dcc-base", "dcc-ram-base";
-		dcc-ram-offset = <0x4000>;
+		dcc-ram-offset = <0x0>;
 	};
 
 	mem_dump {