ARM: dts: msm: Remove jtag_mm node on monaco

Remove jtag_mm DT node as this feature is not enabled
on monaco.

Change-Id: I3fde6c254dbbdf9ced550fc53ba59a6e27866db0
Signed-off-by: Xiaoqi Zhuang <quic_xiaozhua@quicinc.com>
This commit is contained in:
Xiaoqi Zhuang
2024-06-25 14:26:50 +08:00
parent 59ea707ea5
commit 85c0e79e7b

View File

@@ -1592,50 +1592,6 @@
}; };
jtag_mm0: jtagmm@9040000 {
/* compatible = "qcom,jtagv8-mm"; */
reg = <0x9040000 0x1000>;
reg-names = "etm-base";
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
clock-names = "core_clk";
qcom,coresight-jtagmm-cpu = <&CPU0>;
};
jtag_mm1: jtagmm@9140000 {
/* compatible = "qcom,jtagv8-mm"; */
reg = <0x9140000 0x1000>;
reg-names = "etm-base";
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
clock-names = "core_clk";
qcom,coresight-jtagmm-cpu = <&CPU1>;
};
jtag_mm2: jtagmm@9240000 {
/* compatible = "qcom,jtagv8-mm"; */
reg = <0x9240000 0x1000>;
reg-names = "etm-base";
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
clock-names = "core_clk";
qcom,coresight-jtagmm-cpu = <&CPU2>;
};
jtag_mm3: jtagmm@9340000 {
/* compatible = "qcom,jtagv8-mm"; */
reg = <0x9340000 0x1000>;
reg-names = "etm-base";
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
clock-names = "core_clk";
qcom,coresight-jtagmm-cpu = <&CPU3>;
};
dcc: dcc_v2@16FF000 { dcc: dcc_v2@16FF000 {
compatible = "qcom,dcc-v2"; compatible = "qcom,dcc-v2";
reg = <0x16FF000 0x1000>, reg = <0x16FF000 0x1000>,