From 81ebeaa375c2ceb48d7583c5e1a68bba6e7f0dcb Mon Sep 17 00:00:00 2001 From: Gerrit SelfHelp Service Account Date: Fri, 25 Aug 2023 13:59:26 -0700 Subject: [PATCH 001/143] Initial empty repository From 391017c2ec678392b48b6b10af0b58d7d6c22a5e Mon Sep 17 00:00:00 2001 From: Eric Rosas Date: Wed, 6 Sep 2023 16:14:51 -0700 Subject: [PATCH 002/143] dt-bindings: Check in pineapple and sun dt files Initial check in of pineapple and sun dt files on new branch. Signed-off-by: Eric Rosas Change-Id: I8332884d94e2f2c52113f2630d66c79def470004 --- Kbuild | 31 + Makefile | 19 + msm-audio-lpass.dtsi | 27 + msm-auto-audio-lpass.dtsi | 1004 ++++++++++++ msm-auto-vm-audio-lpass.dtsi | 973 ++++++++++++ pineapple-audio-atp.dts | 15 + pineapple-audio-atp.dtsi | 82 + pineapple-audio-cdp-nfc.dts | 16 + pineapple-audio-cdp-nfc.dtsi | 6 + pineapple-audio-cdp.dts | 15 + pineapple-audio-cdp.dtsi | 150 ++ pineapple-audio-mtp-nfc.dts | 16 + pineapple-audio-mtp-nfc.dtsi | 6 + pineapple-audio-mtp.dts | 15 + pineapple-audio-mtp.dtsi | 14 + pineapple-audio-overlay.dtsi | 812 ++++++++++ pineapple-audio-qrd-sku2.dts | 15 + pineapple-audio-qrd-sku2.dtsi | 11 + pineapple-audio-qrd.dts | 15 + pineapple-audio-qrd.dtsi | 109 ++ pineapple-audio-rcm.dts | 15 + pineapple-audio-rumi.dts | 15 + pineapple-audio-rumi.dtsi | 12 + pineapple-audio-wsa883x-cdp.dts | 15 + pineapple-audio-wsa883x-cdp.dtsi | 92 ++ pineapple-audio.dts | 21 + pineapple-audio.dtsi | 175 ++ pineapple-lpi.dtsi | 2549 ++++++++++++++++++++++++++++++ pineapplep-audio-hdk.dts | 15 + pineapplep-audio-hdk.dtsi | 15 + sun-audio-atp.dts | 15 + sun-audio-atp.dtsi | 82 + sun-audio-cdp-nfc.dts | 16 + sun-audio-cdp-nfc.dtsi | 6 + sun-audio-cdp.dts | 15 + sun-audio-cdp.dtsi | 134 ++ sun-audio-mtp-nfc.dts | 16 + sun-audio-mtp-nfc.dtsi | 6 + sun-audio-mtp.dts | 15 + sun-audio-mtp.dtsi | 165 ++ sun-audio-overlay.dtsi | 765 +++++++++ sun-audio-qrd-sku2.dts | 15 + sun-audio-qrd-sku2.dtsi | 10 + sun-audio-qrd.dts | 15 + sun-audio-qrd.dtsi | 108 ++ sun-audio-rcm.dts | 15 + sun-audio-rumi.dts | 15 + sun-audio-rumi.dtsi | 12 + sun-audio.dts | 21 + sun-audio.dtsi | 174 ++ sun-lpi.dtsi | 2518 +++++++++++++++++++++++++++++ 51 files changed, 10413 insertions(+) create mode 100644 Kbuild create mode 100644 Makefile create mode 100644 msm-audio-lpass.dtsi create mode 100644 msm-auto-audio-lpass.dtsi create mode 100644 msm-auto-vm-audio-lpass.dtsi create mode 100644 pineapple-audio-atp.dts create mode 100644 pineapple-audio-atp.dtsi create mode 100644 pineapple-audio-cdp-nfc.dts create mode 100644 pineapple-audio-cdp-nfc.dtsi create mode 100644 pineapple-audio-cdp.dts create mode 100644 pineapple-audio-cdp.dtsi create mode 100644 pineapple-audio-mtp-nfc.dts create mode 100644 pineapple-audio-mtp-nfc.dtsi create mode 100644 pineapple-audio-mtp.dts create mode 100644 pineapple-audio-mtp.dtsi create mode 100644 pineapple-audio-overlay.dtsi create mode 100644 pineapple-audio-qrd-sku2.dts create mode 100644 pineapple-audio-qrd-sku2.dtsi create mode 100644 pineapple-audio-qrd.dts create mode 100644 pineapple-audio-qrd.dtsi create mode 100644 pineapple-audio-rcm.dts create mode 100644 pineapple-audio-rumi.dts create mode 100644 pineapple-audio-rumi.dtsi create mode 100644 pineapple-audio-wsa883x-cdp.dts create mode 100644 pineapple-audio-wsa883x-cdp.dtsi create mode 100644 pineapple-audio.dts create mode 100644 pineapple-audio.dtsi create mode 100644 pineapple-lpi.dtsi create mode 100644 pineapplep-audio-hdk.dts create mode 100644 pineapplep-audio-hdk.dtsi create mode 100644 sun-audio-atp.dts create mode 100644 sun-audio-atp.dtsi create mode 100644 sun-audio-cdp-nfc.dts create mode 100644 sun-audio-cdp-nfc.dtsi create mode 100644 sun-audio-cdp.dts create mode 100644 sun-audio-cdp.dtsi create mode 100644 sun-audio-mtp-nfc.dts create mode 100644 sun-audio-mtp-nfc.dtsi create mode 100644 sun-audio-mtp.dts create mode 100644 sun-audio-mtp.dtsi create mode 100644 sun-audio-overlay.dtsi create mode 100644 sun-audio-qrd-sku2.dts create mode 100644 sun-audio-qrd-sku2.dtsi create mode 100644 sun-audio-qrd.dts create mode 100644 sun-audio-qrd.dtsi create mode 100644 sun-audio-rcm.dts create mode 100644 sun-audio-rumi.dts create mode 100644 sun-audio-rumi.dtsi create mode 100644 sun-audio.dts create mode 100644 sun-audio.dtsi create mode 100644 sun-lpi.dtsi diff --git a/Kbuild b/Kbuild new file mode 100644 index 00000000..56c8f1c3 --- /dev/null +++ b/Kbuild @@ -0,0 +1,31 @@ +ifeq ($(CONFIG_ARCH_PINEAPPLE), y) +dtbo-y += pineapple-audio.dtbo \ + pineapple-audio-cdp.dtbo \ + pineapple-audio-wsa883x-cdp.dtbo \ + pineapple-audio-cdp-nfc.dtbo \ + pineapple-audio-mtp.dtbo \ + pineapple-audio-mtp-nfc.dtbo \ + pineapple-audio-qrd.dtbo \ + pineapple-audio-atp.dtbo \ + pineapple-audio-rumi.dtbo \ + pineapple-audio-rcm.dtbo \ + pineapple-audio-qrd-sku2.dtbo \ + pineapplep-audio-hdk.dtbo +endif + +ifeq ($(CONFIG_ARCH_SUN), y) +dtbo-y += sun-audio.dtbo \ + sun-audio-cdp.dtbo \ + sun-audio-cdp-nfc.dtbo \ + sun-audio-rumi.dtbo \ + sun-audio-mtp.dtbo \ + sun-audio-mtp-nfc.dtbo \ + sun-audio-qrd.dtbo \ + sun-audio-qrd-sku2.dtbo \ + sun-audio-atp.dtbo \ + sun-audio-rcm.dtbo +endif + + always-y := $(dtb-y) $(dtbo-y) + subdir-y := $(dts-dirs) + clean-files := *.dtb *.dtbo diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..d541b817 --- /dev/null +++ b/Makefile @@ -0,0 +1,19 @@ +AUDIO_DEVICETREE_ROOT=$(KERNEL_SRC)/$(M) +AUDIO_KERNEL_ROOT=$(AUDIO_DEVICETREE_ROOT)/../../opensource/audio-kernel/include + +KBUILD_OPTIONS += KBUILD_DTC_INCLUDE=$(AUDIO_KERNEL_ROOT) +KBUILD_OPTIONS += KBUILD_EXTMOD_DTS=. +KBUILD_OPTIONS += KERNEL_ROOT=$(ROOT_DIR)/$(KERNEL_DIR) +KBUILD_OPTIONS += MODNAME=audio-devicetree + + +all: dtbs + +dtbs: + $(MAKE) -C $(KERNEL_SRC) M=$(M) dtbs $(KBUILD_OPTIONS) + +modules_install: + $(MAKE) M=$(M) -C $(KERNEL_SRC) modules_install + +clean: + $(MAKE) -C $(KERNEL_SRC) M=$(M) clean diff --git a/msm-audio-lpass.dtsi b/msm-audio-lpass.dtsi new file mode 100644 index 00000000..1366b59b --- /dev/null +++ b/msm-audio-lpass.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + stub_codec: qcom,msm-stub-codec { + compatible = "qcom,msm-stub-codec"; + }; + + audio_pkt_core_platform: qcom,audio-pkt-core-platform { + compatible = "qcom,audio-pkt-core-platform"; + }; + + adsp_loader: qcom,msm-adsp-loader { + status = "disabled"; + compatible = "qcom,adsp-loader"; + qcom,rproc-handle = <&adsp_pas>; + qcom,adsp-state = <0>; + }; + + adsp_notify: qcom,msm-adsp-notify { + status = "ok"; + compatible = "qcom,adsp-notify"; + qcom,rproc-handle = <&adsp_pas>; + }; +}; diff --git a/msm-auto-audio-lpass.dtsi b/msm-auto-audio-lpass.dtsi new file mode 100644 index 00000000..25fda191 --- /dev/null +++ b/msm-auto-audio-lpass.dtsi @@ -0,0 +1,1004 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + pcm0: qcom,msm-pcm { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <0>; + }; + + routing: qcom,msm-pcm-routing { + compatible = "qcom,msm-pcm-routing"; + }; + + compr: qcom,msm-compr-dsp { + compatible = "qcom,msm-compr-dsp"; + }; + + pcm1: qcom,msm-pcm-low-latency { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <1>; + qcom,msm-pcm-low-latency; + qcom,latency-level = "regular"; + }; + + pcm2: qcom,msm-ultra-low-latency { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <2>; + qcom,msm-pcm-low-latency; + qcom,latency-level = "ultra"; + }; + + pcm_noirq: qcom,msm-pcm-dsp-noirq { + compatible = "qcom,msm-pcm-dsp-noirq"; + qcom,msm-pcm-low-latency; + qcom,latency-level = "ultra"; + }; + + trans_loopback: qcom,msm-transcode-loopback { + compatible = "qcom,msm-transcode-loopback"; + }; + + compress: qcom,msm-compress-dsp { + compatible = "qcom,msm-compress-dsp"; + }; + + voip: qcom,msm-voip-dsp { + compatible = "qcom,msm-voip-dsp"; + }; + + voice: qcom,msm-pcm-voice { + compatible = "qcom,msm-pcm-voice"; + qcom,destroy-cvd; + }; + + stub_codec: qcom,msm-stub-codec { + compatible = "qcom,msm-stub-codec"; + }; + + qcom,msm-dai-fe { + compatible = "qcom,msm-dai-fe"; + }; + + afe: qcom,msm-pcm-afe { + compatible = "qcom,msm-pcm-afe"; + }; + + dai_hdmi: qcom,msm-dai-q6-hdmi { + compatible = "qcom,msm-dai-q6-hdmi"; + qcom,msm-dai-q6-dev-id = <8>; + }; + + dai_dp: qcom,msm-dai-q6-dp { + compatible = "qcom,msm-dai-q6-hdmi"; + qcom,msm-dai-q6-dev-id = <0>; + }; + + dai_dp1: qcom,msm-dai-q6-dp1 { + compatible = "qcom,msm-dai-q6-hdmi"; + qcom,msm-dai-q6-dev-id = <1>; + }; + + loopback: qcom,msm-pcm-loopback { + compatible = "qcom,msm-pcm-loopback"; + }; + + loopback1: qcom,msm-pcm-loopback-low-latency { + compatible = "qcom,msm-pcm-loopback"; + qcom,msm-pcm-loopback-low-latency; + }; + + pcm_dtmf: qcom,msm-pcm-dtmf { + compatible = "qcom,msm-pcm-dtmf"; + }; + + msm_dai_mi2s: qcom,msm-dai-mi2s { + compatible = "qcom,msm-dai-mi2s"; + dai_mi2s0_rx: qcom,msm-dai-q6-mi2s-prim-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <0>; + qcom,msm-mi2s-lines = <3>; + }; + + dai_mi2s0_tx: qcom,msm-dai-q6-mi2s-prim-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <1>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s1_rx: qcom,msm-dai-q6-mi2s-sec-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <2>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s1_tx: qcom,msm-dai-q6-mi2s-sec-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <3>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s2_rx: qcom,msm-dai-q6-mi2s-tert-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <4>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s2_tx: qcom,msm-dai-q6-mi2s-tert-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <5>; + qcom,msm-mi2s-lines = <3>; + }; + + dai_mi2s3_rx: qcom,msm-dai-q6-mi2s-quat-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <6>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s3_tx: qcom,msm-dai-q6-mi2s-quat-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <7>; + qcom,msm-mi2s-lines = <2>; + }; + + dai_mi2s4_rx: qcom,msm-dai-q6-mi2s-quin-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <8>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s4_tx: qcom,msm-dai-q6-mi2s-quin-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <9>; + qcom,msm-mi2s-lines = <2>; + }; + + dai_mi2s5_rx: qcom,msm-dai-q6-mi2s-senary-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <10>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s5_tx: qcom,msm-dai-q6-mi2s-senary-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <11>; + qcom,msm-mi2s-lines = <3>; + }; + }; + + msm_dai_cdc_dma: qcom,msm-dai-cdc-dma { + compatible = "qcom,msm-dai-cdc-dma"; + wsa_cdc_dma_0_rx: qcom,msm-dai-wsa-cdc-dma-0-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45056>; + }; + + wsa_cdc_dma_0_tx: qcom,msm-dai-wsa-cdc-dma-0-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45057>; + }; + + wsa_cdc_dma_1_rx: qcom,msm-dai-wsa-cdc-dma-1-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45058>; + }; + + wsa_cdc_dma_1_tx: qcom,msm-dai-wsa-cdc-dma-1-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45059>; + }; + + wsa_cdc_dma_2_tx: qcom,msm-dai-wsa-cdc-dma-2-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45061>; + }; + + va_cdc_dma_0_tx: qcom,msm-dai-va-cdc-dma-0-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45089>; + }; + + va_cdc_dma_1_tx: qcom,msm-dai-va-cdc-dma-1-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45091>; + }; + + va_cdc_dma_2_tx: qcom,msm-dai-va-cdc-dma-2-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45093>; + }; + + rx_cdc_dma_0_rx: qcom,msm-dai-rx-cdc-dma-0-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45104>; + }; + + rx_cdc_dma_1_rx: qcom,msm-dai-rx-cdc-dma-1-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45106>; + }; + + rx_cdc_dma_2_rx: qcom,msm-dai-rx-cdc-dma-2-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45108>; + }; + + rx_cdc_dma_3_rx: qcom,msm-dai-rx-cdc-dma-3-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45110>; + }; + + rx_cdc_dma_4_rx: qcom,msm-dai-rx-cdc-dma-4-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45112>; + }; + + rx_cdc_dma_5_rx: qcom,msm-dai-rx-cdc-dma-5-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45114>; + }; + + rx_cdc_dma_6_rx: qcom,msm-dai-rx-cdc-dma-6-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45116>; + qcom,msm-cdc-dma-data-align = <1>; + }; + + rx_cdc_dma_7_rx: qcom,msm-dai-rx-cdc-dma-7-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45118>; + }; + + tx_cdc_dma_0_tx: qcom,msm-dai-tx-cdc-dma-0-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45105>; + }; + + tx_cdc_dma_1_tx: qcom,msm-dai-tx-cdc-dma-1-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45107>; + }; + + tx_cdc_dma_2_tx: qcom,msm-dai-tx-cdc-dma-2-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45109>; + }; + + tx_cdc_dma_3_tx: qcom,msm-dai-tx-cdc-dma-3-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45111>; + }; + + tx_cdc_dma_4_tx: qcom,msm-dai-tx-cdc-dma-4-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45113>; + }; + + tx_cdc_dma_5_tx: qcom,msm-dai-tx-cdc-dma-5-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45115>; + }; + }; + + lsm: qcom,msm-lsm-client { + compatible = "qcom,msm-lsm-client"; + }; + + dai_msm_q6:qcom,msm-dai-q6 { + compatible = "qcom,msm-dai-q6"; + sb_7_rx: qcom,msm-dai-q6-sb-7-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16398>; + qcom,msm-dai-q6-slim-dev-id = <0>; + }; + + sb_7_tx: qcom,msm-dai-q6-sb-7-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16399>; + qcom,msm-dai-q6-slim-dev-id = <0>; + }; + + sb_8_tx: qcom,msm-dai-q6-sb-8-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16401>; + qcom,msm-dai-q6-slim-dev-id = <0>; + }; + + bt_sco_rx: qcom,msm-dai-q6-bt-sco-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <12288>; + }; + + bt_sco_tx: qcom,msm-dai-q6-bt-sco-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <12289>; + }; + + int_fm_rx: qcom,msm-dai-q6-int-fm-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <12292>; + }; + + int_fm_tx: qcom,msm-dai-q6-int-fm-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <12293>; + }; + + afe_pcm_rx: qcom,msm-dai-q6-be-afe-pcm-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <224>; + }; + + afe_pcm_tx: qcom,msm-dai-q6-be-afe-pcm-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <225>; + }; + + afe_proxy_rx: qcom,msm-dai-q6-afe-proxy-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <241>; + }; + + afe_proxy_tx: qcom,msm-dai-q6-afe-proxy-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <240>; + }; + + incall_record_rx: qcom,msm-dai-q6-incall-record-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <32771>; + }; + + incall_record_tx: qcom,msm-dai-q6-incall-record-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <32772>; + }; + + incall_music_rx: qcom,msm-dai-q6-incall-music-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <32773>; + }; + + incall_music_2_rx: qcom,msm-dai-q6-incall-music-2-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <32770>; + }; + + afe_proxy_tx_1: qcom,msm-dai-q6-afe-proxy-tx-1 { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <242>; + }; + + proxy_rx: qcom,msm-dai-q6-proxy-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <8194>; + }; + + proxy_tx: qcom,msm-dai-q6-proxy-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <8195>; + }; + + usb_audio_rx: qcom,msm-dai-q6-usb-audio-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <28672>; + }; + + usb_audio_tx: qcom,msm-dai-q6-usb-audio-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <28673>; + }; + }; + + hostless: qcom,msm-pcm-hostless { + compatible = "qcom,msm-pcm-hostless"; + }; + + audio_apr: qcom,msm-audio-apr { + compatible = "qcom,msm-audio-apr"; + qcom,subsys-name = "apr_adsp"; + qcom,rproc-handle = <&adsp_pas>; + + msm_audio_ion: qcom,msm-audio-ion { + compatible = "qcom,msm-audio-ion"; + qcom,smmu-version = <2>; + qcom,smmu-enabled; + iommus = <&apps_smmu 0x1801 0x0>; + qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>; + }; + }; + + dai_pri_auxpcm_rx: qcom,msm-pri-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "primaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_pri_auxpcm_tx: qcom,msm-pri-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "primaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_sec_auxpcm_rx: qcom,msm-sec-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "secondaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_sec_auxpcm_tx: qcom,msm-sec-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "secondaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_tert_auxpcm_rx: qcom,msm-tert-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "tertiaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_tert_auxpcm_tx: qcom,msm-tert-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "tertiaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quat_auxpcm_rx: qcom,msm-quat-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quaternaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quat_auxpcm_tx: qcom,msm-quat-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quaternaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quin_auxpcm_rx: qcom,msm-quin-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quinaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quin_auxpcm_tx: qcom,msm-quin-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quinaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_sen_auxpcm_rx: qcom,msm-sen-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "senaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_sen_auxpcm_tx: qcom,msm-sen-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "senaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + hdmi_dba: qcom,msm-hdmi-dba-codec-rx { + compatible = "qcom,msm-hdmi-dba-codec-rx"; + qcom,dba-bridge-chip = "adv7533"; + }; + + adsp_loader: qcom,msm-adsp-loader { + status = "ok"; + compatible = "qcom,adsp-loader"; + qcom,rproc-handle = <&adsp_pas>; + qcom,adsp-state = <0>; + }; + + adsp_notify: qcom,msm-adsp-notify { + status = "ok"; + compatible = "qcom,adsp-notify"; + qcom,rproc-handle = <&adsp_pas>; + }; + + tdm_pri_rx: qcom,msm-dai-tdm-pri-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37120>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36864>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_pri_tdm_rx_0: qcom,msm-dai-q6-tdm-pri-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36864>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_pri_tx: qcom,msm-dai-tdm-pri-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37121>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36865>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_pri_tdm_tx_0: qcom,msm-dai-q6-tdm-pri-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36865>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sec_rx: qcom,msm-dai-tdm-sec-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37136>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36880>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sec_tdm_rx_0: qcom,msm-dai-q6-tdm-sec-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36880>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sec_tx: qcom,msm-dai-tdm-sec-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37137>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36881>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sec_tdm_tx_0: qcom,msm-dai-q6-tdm-sec-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36881>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_tert_rx: qcom,msm-dai-tdm-tert-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37152>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36896>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_tert_tdm_rx_0: qcom,msm-dai-q6-tdm-tert-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36896>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_tert_tx: qcom,msm-dai-tdm-tert-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37153>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36897 >; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_tert_tdm_tx_0: qcom,msm-dai-q6-tdm-tert-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36897 >; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_quat_rx: qcom,msm-dai-tdm-quat-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37168>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36912>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_quat_tdm_rx_0: qcom,msm-dai-q6-tdm-quat-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36912>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_quat_tx: qcom,msm-dai-tdm-quat-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37169>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36913 >; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_quat_tdm_tx_0: qcom,msm-dai-q6-tdm-quat-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36913 >; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_quin_rx: qcom,msm-dai-tdm-quin-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37184>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36928>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_quin_tdm_rx_0: qcom,msm-dai-q6-tdm-quin-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36928>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_quin_tx: qcom,msm-dai-tdm-quin-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37185>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36929>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_quin_tdm_tx_0: qcom,msm-dai-q6-tdm-quin-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36929>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sen_rx: qcom,msm-dai-tdm-sen-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37200>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36944>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sen_tdm_rx_0: qcom,msm-dai-q6-tdm-sen-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36944>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sen_tx: qcom,msm-dai-tdm-sen-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37201>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36945>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sen_tdm_tx_0: qcom,msm-dai-q6-tdm-sen-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36945>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sep_rx: qcom,msm-dai-tdm-sep-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37216>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36960>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sep_tdm_rx_0: qcom,msm-dai-q6-tdm-sep-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36960>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sep_tx: qcom,msm-dai-tdm-sep-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37217>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36961>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sep_tdm_tx_0: qcom,msm-dai-q6-tdm-sep-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36961>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif0_rx: qcom,msm-dai-tdm-hsif0-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37232>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36976>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif0_tdm_rx_0: qcom,msm-dai-q6-tdm-hsif0-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36976>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif0_tx: qcom,msm-dai-tdm-hsif0-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37231>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36977>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif0_tdm_tx_0: qcom,msm-dai-q6-tdm-hsif0-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36977>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif1_rx: qcom,msm-dai-tdm-hsif1-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37248>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36992>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif1_tdm_rx_0: qcom,msm-dai-q6-tdm-hsif1-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36992>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif1_tx: qcom,msm-dai-tdm-hsif1-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37249>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36993>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif1_tdm_tx_0: qcom,msm-dai-q6-tdm-hsif1-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36993>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif2_rx: qcom,msm-dai-tdm-hsif2-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37264>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <37008>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif2_tdm_rx_0: qcom,msm-dai-q6-tdm-hsif2-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <37008>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif2_tx: qcom,msm-dai-tdm-hsif2-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37265>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <37009>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif2_tdm_tx_0: qcom,msm-dai-q6-tdm-hsif2-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <37009>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + dai_pri_spdif_rx: qcom,msm-dai-q6-spdif-pri-rx { + compatible = "qcom,msm-dai-q6-spdif"; + qcom,msm-dai-q6-dev-id = <20480>; + }; + + dai_pri_spdif_tx: qcom,msm-dai-q6-spdif-pri-tx { + compatible = "qcom,msm-dai-q6-spdif"; + qcom,msm-dai-q6-dev-id = <20481>; + }; + + dai_sec_spdif_rx: qcom,msm-dai-q6-spdif-sec-rx { + compatible = "qcom,msm-dai-q6-spdif"; + qcom,msm-dai-q6-dev-id = <20482>; + }; + + dai_sec_spdif_tx: qcom,msm-dai-q6-spdif-sec-tx { + compatible = "qcom,msm-dai-q6-spdif"; + qcom,msm-dai-q6-dev-id = <20483>; + }; + + afe_loopback_tx: qcom,msm-dai-q6-afe-loopback-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <24577>; + }; +}; diff --git a/msm-auto-vm-audio-lpass.dtsi b/msm-auto-vm-audio-lpass.dtsi new file mode 100644 index 00000000..6004da79 --- /dev/null +++ b/msm-auto-vm-audio-lpass.dtsi @@ -0,0 +1,973 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + pcm0: qcom,msm-pcm { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <0>; + }; + + routing: qcom,msm-pcm-routing { + compatible = "qcom,msm-pcm-routing"; + }; + + compr: qcom,msm-compr-dsp { + compatible = "qcom,msm-compr-dsp"; + }; + + pcm1: qcom,msm-pcm-low-latency { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <1>; + qcom,msm-pcm-low-latency; + qcom,latency-level = "regular"; + }; + + pcm2: qcom,msm-ultra-low-latency { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <2>; + qcom,msm-pcm-low-latency; + qcom,latency-level = "ultra"; + }; + + pcm_noirq: qcom,msm-pcm-dsp-noirq { + compatible = "qcom,msm-pcm-dsp-noirq"; + qcom,msm-pcm-low-latency; + qcom,latency-level = "ultra"; + }; + + trans_loopback: qcom,msm-transcode-loopback { + compatible = "qcom,msm-transcode-loopback"; + }; + + compress: qcom,msm-compress-dsp { + compatible = "qcom,msm-compress-dsp"; + }; + + voip: qcom,msm-voip-dsp { + compatible = "qcom,msm-voip-dsp"; + }; + + voice: qcom,msm-pcm-voice { + compatible = "qcom,msm-pcm-voice"; + qcom,destroy-cvd; + }; + + stub_codec: qcom,msm-stub-codec { + compatible = "qcom,msm-stub-codec"; + }; + + qcom,msm-dai-fe { + compatible = "qcom,msm-dai-fe"; + }; + + afe: qcom,msm-pcm-afe { + compatible = "qcom,msm-pcm-afe"; + }; + + dai_hdmi: qcom,msm-dai-q6-hdmi { + compatible = "qcom,msm-dai-q6-hdmi"; + qcom,msm-dai-q6-dev-id = <8>; + }; + + dai_dp: qcom,msm-dai-q6-dp { + compatible = "qcom,msm-dai-q6-hdmi"; + qcom,msm-dai-q6-dev-id = <0>; + }; + + dai_dp1: qcom,msm-dai-q6-dp1 { + compatible = "qcom,msm-dai-q6-hdmi"; + qcom,msm-dai-q6-dev-id = <1>; + }; + + loopback: qcom,msm-pcm-loopback { + compatible = "qcom,msm-pcm-loopback"; + }; + + loopback1: qcom,msm-pcm-loopback-low-latency { + compatible = "qcom,msm-pcm-loopback"; + qcom,msm-pcm-loopback-low-latency; + }; + + pcm_dtmf: qcom,msm-pcm-dtmf { + compatible = "qcom,msm-pcm-dtmf"; + }; + + msm_dai_mi2s: qcom,msm-dai-mi2s { + compatible = "qcom,msm-dai-mi2s"; + dai_mi2s0_rx: qcom,msm-dai-q6-mi2s-prim-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <0>; + qcom,msm-mi2s-lines = <3>; + }; + + dai_mi2s0_tx: qcom,msm-dai-q6-mi2s-prim-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <1>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s1_rx: qcom,msm-dai-q6-mi2s-sec-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <2>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s1_tx: qcom,msm-dai-q6-mi2s-sec-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <3>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s2_rx: qcom,msm-dai-q6-mi2s-tert-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <4>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s2_tx: qcom,msm-dai-q6-mi2s-tert-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <5>; + qcom,msm-mi2s-lines = <3>; + }; + + dai_mi2s3_rx: qcom,msm-dai-q6-mi2s-quat-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <6>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s3_tx: qcom,msm-dai-q6-mi2s-quat-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <7>; + qcom,msm-mi2s-lines = <2>; + }; + + dai_mi2s4_rx: qcom,msm-dai-q6-mi2s-quin-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <8>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s4_tx: qcom,msm-dai-q6-mi2s-quin-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <9>; + qcom,msm-mi2s-lines = <2>; + }; + + dai_mi2s5_rx: qcom,msm-dai-q6-mi2s-senary-rx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <10>; + qcom,msm-mi2s-lines = <1>; + }; + + dai_mi2s5_tx: qcom,msm-dai-q6-mi2s-senary-tx { + compatible = "qcom,msm-dai-q6-mi2s"; + qcom,msm-dai-q6-mi2s-dev-id = <11>; + qcom,msm-mi2s-lines = <3>; + }; + }; + + msm_dai_cdc_dma: qcom,msm-dai-cdc-dma { + compatible = "qcom,msm-dai-cdc-dma"; + wsa_cdc_dma_0_rx: qcom,msm-dai-wsa-cdc-dma-0-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45056>; + }; + + wsa_cdc_dma_0_tx: qcom,msm-dai-wsa-cdc-dma-0-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45057>; + }; + + wsa_cdc_dma_1_rx: qcom,msm-dai-wsa-cdc-dma-1-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45058>; + }; + + wsa_cdc_dma_1_tx: qcom,msm-dai-wsa-cdc-dma-1-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45059>; + }; + + wsa_cdc_dma_2_tx: qcom,msm-dai-wsa-cdc-dma-2-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45061>; + }; + + va_cdc_dma_0_tx: qcom,msm-dai-va-cdc-dma-0-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45089>; + }; + + va_cdc_dma_1_tx: qcom,msm-dai-va-cdc-dma-1-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45091>; + }; + + va_cdc_dma_2_tx: qcom,msm-dai-va-cdc-dma-2-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45093>; + }; + + rx_cdc_dma_0_rx: qcom,msm-dai-rx-cdc-dma-0-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45104>; + }; + + rx_cdc_dma_1_rx: qcom,msm-dai-rx-cdc-dma-1-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45106>; + }; + + rx_cdc_dma_2_rx: qcom,msm-dai-rx-cdc-dma-2-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45108>; + }; + + rx_cdc_dma_3_rx: qcom,msm-dai-rx-cdc-dma-3-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45110>; + }; + + rx_cdc_dma_4_rx: qcom,msm-dai-rx-cdc-dma-4-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45112>; + }; + + rx_cdc_dma_5_rx: qcom,msm-dai-rx-cdc-dma-5-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45114>; + }; + + rx_cdc_dma_6_rx: qcom,msm-dai-rx-cdc-dma-6-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45116>; + qcom,msm-cdc-dma-data-align = <1>; + }; + + rx_cdc_dma_7_rx: qcom,msm-dai-rx-cdc-dma-7-rx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45118>; + }; + + tx_cdc_dma_0_tx: qcom,msm-dai-tx-cdc-dma-0-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45105>; + }; + + tx_cdc_dma_1_tx: qcom,msm-dai-tx-cdc-dma-1-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45107>; + }; + + tx_cdc_dma_2_tx: qcom,msm-dai-tx-cdc-dma-2-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45109>; + }; + + tx_cdc_dma_3_tx: qcom,msm-dai-tx-cdc-dma-3-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45111>; + }; + + tx_cdc_dma_4_tx: qcom,msm-dai-tx-cdc-dma-4-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45113>; + }; + + tx_cdc_dma_5_tx: qcom,msm-dai-tx-cdc-dma-5-tx { + compatible = "qcom,msm-dai-cdc-dma-dev"; + qcom,msm-dai-cdc-dma-dev-id = <45115>; + }; + }; + + lsm: qcom,msm-lsm-client { + compatible = "qcom,msm-lsm-client"; + }; + + dai_msm_q6:qcom,msm-dai-q6 { + compatible = "qcom,msm-dai-q6"; + sb_7_rx: qcom,msm-dai-q6-sb-7-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16398>; + qcom,msm-dai-q6-slim-dev-id = <0>; + }; + + sb_7_tx: qcom,msm-dai-q6-sb-7-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16399>; + qcom,msm-dai-q6-slim-dev-id = <0>; + }; + + sb_8_tx: qcom,msm-dai-q6-sb-8-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16401>; + qcom,msm-dai-q6-slim-dev-id = <0>; + }; + + bt_sco_rx: qcom,msm-dai-q6-bt-sco-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <12288>; + }; + + bt_sco_tx: qcom,msm-dai-q6-bt-sco-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <12289>; + }; + + int_fm_rx: qcom,msm-dai-q6-int-fm-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <12292>; + }; + + int_fm_tx: qcom,msm-dai-q6-int-fm-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <12293>; + }; + + afe_pcm_rx: qcom,msm-dai-q6-be-afe-pcm-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <224>; + }; + + afe_pcm_tx: qcom,msm-dai-q6-be-afe-pcm-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <225>; + }; + + afe_proxy_rx: qcom,msm-dai-q6-afe-proxy-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <241>; + }; + + afe_proxy_tx: qcom,msm-dai-q6-afe-proxy-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <240>; + }; + + incall_record_rx: qcom,msm-dai-q6-incall-record-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <32771>; + }; + + incall_record_tx: qcom,msm-dai-q6-incall-record-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <32772>; + }; + + incall_music_rx: qcom,msm-dai-q6-incall-music-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <32773>; + }; + + incall_music_2_rx: qcom,msm-dai-q6-incall-music-2-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <32770>; + }; + + qcom,msm-dai-q6-afe-proxy-tx-1 { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <242>; + }; + + proxy_rx: qcom,msm-dai-q6-proxy-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <8194>; + }; + + proxy_tx: qcom,msm-dai-q6-proxy-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <8195>; + }; + + usb_audio_rx: qcom,msm-dai-q6-usb-audio-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <28672>; + }; + + usb_audio_tx: qcom,msm-dai-q6-usb-audio-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <28673>; + }; + }; + + hostless: qcom,msm-pcm-hostless { + compatible = "qcom,msm-pcm-hostless"; + }; + + audio_apr: qcom,msm-audio-apr { + compatible = "qcom,msm-audio-apr"; + qcom,subsys-name = "apr_adsp"; + + msm_audio_ion: qcom,msm-audio-ion { + compatible = "qcom,msm-audio-ion"; + qcom,smmu-version = <2>; + qcom,smmu-enabled; + qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>; + }; + }; + + dai_pri_auxpcm_rx: qcom,msm-pri-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "primaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_pri_auxpcm_tx: qcom,msm-pri-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "primaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_sec_auxpcm_rx: qcom,msm-sec-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "secondaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_sec_auxpcm_tx: qcom,msm-sec-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "secondaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_tert_auxpcm_rx: qcom,msm-tert-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "tertiaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_tert_auxpcm_tx: qcom,msm-tert-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "tertiaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quat_auxpcm_rx: qcom,msm-quat-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quaternaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quat_auxpcm_tx: qcom,msm-quat-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quaternaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quin_auxpcm_rx: qcom,msm-quin-auxpcm_rx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quinaryRx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quin_auxpcm_tx: qcom,msm-quin-auxpcm_tx { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quinaryTx"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + + hdmi_dba: qcom,msm-hdmi-dba-codec-rx { + compatible = "qcom,msm-hdmi-dba-codec-rx"; + qcom,dba-bridge-chip = "adv7533"; + }; + + adsp_loader: qcom,msm-adsp-loader { + status = "ok"; + compatible = "qcom,adsp-loader"; + qcom,adsp-state = <0>; + }; + + adsp_notify: qcom,msm-adsp-notify { + status = "ok"; + compatible = "qcom,adsp-notify"; + }; + + qcom,msm-dai-tdm-pri-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37120>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36864>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-pri-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36864>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-pri-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37121>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36865>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-pri-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36865>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-sec-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37136>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36880>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-sec-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36880>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-sec-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37137>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36881>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-sec-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36881>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-tert-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37152>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36896>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-tert-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36896>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-tert-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37153>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36897 >; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-tert-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36897 >; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-quat-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37168>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36912>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-quat-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36912>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-quat-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37169>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36913 >; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-quat-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36913 >; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-quin-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37184>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36928>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-quin-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36928>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + qcom,msm-dai-tdm-quin-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37185>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36929>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + qcom,msm-dai-q6-tdm-quin-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36929>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sen_rx: qcom,msm-dai-tdm-sen-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37200>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36944>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sen_tdm_rx_0: qcom,msm-dai-q6-tdm-sen-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36944>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sen_tx: qcom,msm-dai-tdm-sen-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37201>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36945>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sen_tdm_tx_0: qcom,msm-dai-q6-tdm-sen-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36945>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sep_rx: qcom,msm-dai-tdm-sep-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37216>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36960>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sep_tdm_rx_0: qcom,msm-dai-q6-tdm-sep-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36960>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_sep_tx: qcom,msm-dai-tdm-sep-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37217>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36961>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_sep_tdm_tx_0: qcom,msm-dai-q6-tdm-sep-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36961>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif0_rx: qcom,msm-dai-tdm-hsif0-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37232>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36976>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif0_tdm_rx_0: qcom,msm-dai-q6-tdm-hsif0-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36976>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif0_tx: qcom,msm-dai-tdm-hsif0-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37231>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36977>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif0_tdm_tx_0: qcom,msm-dai-q6-tdm-hsif0-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36977>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif1_rx: qcom,msm-dai-tdm-hsif1-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37248>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36992>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif1_tdm_rx_0: qcom,msm-dai-q6-tdm-hsif1-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36992>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif1_tx: qcom,msm-dai-tdm-hsif1-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37249>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <36993>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif1_tdm_tx_0: qcom,msm-dai-q6-tdm-hsif1-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <36993>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif2_rx: qcom,msm-dai-tdm-hsif2-rx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37264>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <37008>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif2_tdm_rx_0: qcom,msm-dai-q6-tdm-hsif2-rx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <37008>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + tdm_hsif2_tx: qcom,msm-dai-tdm-hsif2-tx { + compatible = "qcom,msm-dai-tdm"; + qcom,msm-cpudai-tdm-group-id = <37265>; + qcom,msm-cpudai-tdm-group-num-ports = <1>; + qcom,msm-cpudai-tdm-group-port-id = <37009>; + qcom,msm-cpudai-tdm-clk-rate = <1536000>; + qcom,msm-cpudai-tdm-clk-internal = <1>; + qcom,msm-cpudai-tdm-sync-mode = <1>; + qcom,msm-cpudai-tdm-sync-src = <1>; + qcom,msm-cpudai-tdm-data-out = <0>; + qcom,msm-cpudai-tdm-invert-sync = <1>; + qcom,msm-cpudai-tdm-data-delay = <1>; + dai_hsif2_tdm_tx_0: qcom,msm-dai-q6-tdm-hsif2-tx-0 { + compatible = "qcom,msm-dai-q6-tdm"; + qcom,msm-cpudai-tdm-dev-id = <37009>; + qcom,msm-cpudai-tdm-data-align = <0>; + }; + }; + + dai_pri_spdif_rx: qcom,msm-dai-q6-spdif-pri-rx { + compatible = "qcom,msm-dai-q6-spdif"; + qcom,msm-dai-q6-dev-id = <20480>; + }; + + dai_pri_spdif_tx: qcom,msm-dai-q6-spdif-pri-tx { + compatible = "qcom,msm-dai-q6-spdif"; + qcom,msm-dai-q6-dev-id = <20481>; + }; + + dai_sec_spdif_rx: qcom,msm-dai-q6-spdif-sec-rx { + compatible = "qcom,msm-dai-q6-spdif"; + qcom,msm-dai-q6-dev-id = <20482>; + }; + + dai_sec_spdif_tx: qcom,msm-dai-q6-spdif-sec-tx { + compatible = "qcom,msm-dai-q6-spdif"; + qcom,msm-dai-q6-dev-id = <20483>; + }; + + afe_loopback_tx: qcom,msm-dai-q6-afe-loopback-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <24577>; + }; +}; diff --git a/pineapple-audio-atp.dts b/pineapple-audio-atp.dts new file mode 100644 index 00000000..3bf4fab9 --- /dev/null +++ b/pineapple-audio-atp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-atp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Pineapple ATP"; + compatible = "qcom,pineapple-atp", "qcom,pineapple", "qcom,atp"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x10021 0>; +}; diff --git a/pineapple-audio-atp.dtsi b/pineapple-audio-atp.dtsi new file mode 100644 index 00000000..32c3730e --- /dev/null +++ b/pineapple-audio-atp.dtsi @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-mtp.dtsi" + +&swr_haptics { + status = "disabled"; +}; + +&pineapple_snd { + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1", "wsa-codec2"; + swr-haptics-unsupported; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs= <4>, <4>; +}; + +&wsa2_macro { + qcom,wsa-bat-cfgs= <4>, <4>; +}; diff --git a/pineapple-audio-cdp-nfc.dts b/pineapple-audio-cdp-nfc.dts new file mode 100644 index 00000000..703aa329 --- /dev/null +++ b/pineapple-audio-cdp-nfc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-cdp-nfc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Pineapple CDP ST54L NFC"; + compatible = "qcom,pineapple-cdp", "qcom,pineapple", "qcom,pineapplep-cdp", "qcom,pineapplep", "qcom,cdp"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x50001 0>; +}; \ No newline at end of file diff --git a/pineapple-audio-cdp-nfc.dtsi b/pineapple-audio-cdp-nfc.dtsi new file mode 100644 index 00000000..0a4c3a98 --- /dev/null +++ b/pineapple-audio-cdp-nfc.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-cdp.dtsi" diff --git a/pineapple-audio-cdp.dts b/pineapple-audio-cdp.dts new file mode 100644 index 00000000..9f3ae475 --- /dev/null +++ b/pineapple-audio-cdp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-cdp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Pineapple CDP"; + compatible = "qcom,pineapple-cdp", "qcom,pineapple", "qcom,cdp"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <1 0>; +}; diff --git a/pineapple-audio-cdp.dtsi b/pineapple-audio-cdp.dtsi new file mode 100644 index 00000000..e98cf2c9 --- /dev/null +++ b/pineapple-audio-cdp.dtsi @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-overlay.dtsi" + +&lpass_cdc { + qcom,num-macros = <4>; +}; + +&wsa2_macro { + status = "disabled"; +}; + +&swr_dmic_01 { + status = "disabled"; +}; + +&swr_dmic_02 { + status = "disabled"; +}; + +&swr_dmic_03 { + status = "disabled"; +}; + +&swr_dmic_04 { + status = "disabled"; +}; + +&cdc_pri_mi2s_gpios { + status = "disabled"; +}; + +&fm_i2s1_gpios { + status = "ok"; +}; + +&cdc_tert_mi2s_gpios { + status = "disabled"; +}; + +&cdc_quat_mi2s_gpios { + status = "disabled"; +}; + +&cdc_quin_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sen_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sep_mi2s_gpios { + status = "disabled"; +}; + +&pineapple_snd { + qcom,model = "pineapple-cdp-snd-card"; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS1", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS1", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS1", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS1", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "TX DMIC4", "Digital Mic4", + "TX DMIC4", "MIC BIAS3", + "TX DMIC5", "Digital Mic5", + "TX DMIC5", "MIC BIAS3", + "TX DMIC6", "Digital Mic6", + "TX DMIC6", "MIC BIAS4", + "TX DMIC7", "Digital Mic7", + "TX DMIC7", "MIC BIAS4", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "HAP_IN", "PCM_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC4", "Digital Mic4", + "VA DMIC5", "Digital Mic5", + "VA DMIC6", "Digital Mic6", + "VA DMIC7", "Digital Mic7", + "VA DMIC0", "VA MIC BIAS1", + "VA DMIC1", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1", + "VA DMIC4", "VA MIC BIAS3", + "VA DMIC5", "VA MIC BIAS3", + "VA DMIC6", "VA MIC BIAS4", + "VA DMIC7", "VA MIC BIAS4"; + qcom,cdc-dmic67-gpios = <&cdc_dmic67_gpios>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&swr_haptics>, + <&wsa884x_0220>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "swr-haptics", + "wsa-codec1", "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; + qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; + qcom,tert-mi2s-gpios = <&cdc_tert_mi2s_gpios>; + qcom,quat-mi2s-gpios = <&cdc_quat_mi2s_gpios>; + qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>; + qcom,sen-mi2s-gpios = <&cdc_sen_mi2s_gpios>; + qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; + qcom,usbss-hsj-connect-enabled; +}; diff --git a/pineapple-audio-mtp-nfc.dts b/pineapple-audio-mtp-nfc.dts new file mode 100644 index 00000000..9d255c6d --- /dev/null +++ b/pineapple-audio-mtp-nfc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-mtp-nfc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Pineapple MTP ST54L NFC"; + compatible = "qcom,pineapple-mtp", "qcom,pineapple", "qcom,pineapplep-mtp", "qcom,pineapplep", "qcom,mtp"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x50008 0>; +}; \ No newline at end of file diff --git a/pineapple-audio-mtp-nfc.dtsi b/pineapple-audio-mtp-nfc.dtsi new file mode 100644 index 00000000..04c65c25 --- /dev/null +++ b/pineapple-audio-mtp-nfc.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-overlay.dtsi" diff --git a/pineapple-audio-mtp.dts b/pineapple-audio-mtp.dts new file mode 100644 index 00000000..224111a4 --- /dev/null +++ b/pineapple-audio-mtp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-mtp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Pineapple MTP"; + compatible = "qcom,pineapple-mtp", "qcom,pineapple", "qcom,mtp"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <8 0>; +}; diff --git a/pineapple-audio-mtp.dtsi b/pineapple-audio-mtp.dtsi new file mode 100644 index 00000000..5d0d8a67 --- /dev/null +++ b/pineapple-audio-mtp.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-overlay.dtsi" + +&fm_i2s1_gpios { + status = "ok"; +}; + +&pineapple_snd { + qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; +}; diff --git a/pineapple-audio-overlay.dtsi b/pineapple-audio-overlay.dtsi new file mode 100644 index 00000000..31167d16 --- /dev/null +++ b/pineapple-audio-overlay.dtsi @@ -0,0 +1,812 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include "pineapple-lpi.dtsi" + +&lpass_cdc { + qcom,num-macros = <4>; + qcom,lpass-cdc-version = <7>; + #address-cells = <1>; + #size-cells = <1>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>, + <0x3004 0x3 0x1>, <0x3080 0x2 0x2>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,wsa_mclk_mode_muxsel = <0x06BEA100>; + qcom,va_mclk_mode_muxsel = <0x06E28000>; + clock-names = "tx_core_clk", "rx_core_clk", "wsa_core_clk", + "wsa2_core_clk", "rx_tx_core_clk", + "wsa_tx_core_clk", "wsa2_tx_core_clk", "va_core_clk"; + clocks = <&clock_audio_tx_1 0>, <&clock_audio_rx_1 0>, + <&clock_audio_wsa_1 0>, + <&clock_audio_wsa_2 0>, <&clock_audio_rx_tx 0>, + <&clock_audio_wsa_tx 0>, <&clock_audio_wsa2_tx 0>, + <&clock_audio_va_1 0>; + }; + + va_macro: va-macro@6D44000 { + compatible = "qcom,lpass-cdc-va-macro"; + reg = <0x6D44000 0x0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,va-dmic-sample-rate = <600000>; + qcom,va-clk-mux-select = <1>; + qcom,va-island-mode-muxsel = <0x06E28000>; + qcom,default-clk-id = ; + qcom,use-clk-id = ; + qcom,is-used-swr-gpio = <1>; + qcom,va-swr-gpios = <&va_swr_gpios>; + swr2: va_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <3>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0x6d30000 0x0>; + interrupts = + , + ; + interrupt-names = "swr_master_irq", "swr_wake_irq"; + qcom,swr-wakeup-required = <1>; + qcom,swr-num-ports = <5>; + qcom,swr-port-mapping = <1 SWRM_TX_PCM_OUT 0x3>, + <2 SWRM_TX1_CH1 0x1>, <2 SWRM_TX1_CH2 0x2>, + <2 SWRM_TX1_CH3 0x4>, <2 SWRM_TX1_CH4 0x8>, + <3 SWRM_TX2_CH1 0x1>, <3 SWRM_TX2_CH2 0x2>, + <3 SWRM_TX2_CH3 0x4>, <3 SWRM_TX2_CH4 0x8>, + <4 SWRM_TX3_CH1 0x1>, <4 SWRM_TX3_CH2 0x2>, + <4 SWRM_TX3_CH3 0x4>, <4 SWRM_TX3_CH4 0x8>, + <5 SWRM_TX_PCM_IN 0x3>; + qcom,swr-num-dev = <5>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-mstr-irq-wakeup-capable = <1>; + qcom,is-always-on = <1>; + wcd939x_tx_slave: wcd939x-tx-slave { + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170223>; + }; + + swr_dmic_04: dmic_swr@58350223 { + compatible = "qcom,swr-dmic"; + reg = <0x08 0x58350223>; + sound-name-prefix = "SWR_MIC3"; + qcom,codec-name = "swr-dmic.04"; + qcom,swr-dmic-supply = <3>; + qcom,wcd-handle = <&wcd939x_codec>; + status = "disabled"; + }; + + swr_dmic_03: dmic_swr@58350222 { + compatible = "qcom,swr-dmic"; + reg = <0x08 0x58350222>; + sound-name-prefix = "SWR_MIC2"; + qcom,codec-name = "swr-dmic.03"; + qcom,swr-dmic-supply = <1>; + qcom,wcd-handle = <&wcd939x_codec>; + status = "disabled"; + }; + + swr_dmic_02: dmic_swr@58350221 { + compatible = "qcom,swr-dmic"; + reg = <0x08 0x58350221>; + sound-name-prefix = "SWR_MIC1"; + qcom,codec-name = "swr-dmic.02"; + qcom,swr-dmic-supply = <1>; + qcom,wcd-handle = <&wcd939x_codec>; + status = "disabled"; + }; + + swr_dmic_01: dmic_swr@58350220 { + compatible = "qcom,swr-dmic"; + reg = <0x08 0x58350220>; + sound-name-prefix = "SWR_MIC0"; + qcom,codec-name = "swr-dmic.01"; + qcom,swr-dmic-supply = <3>; + qcom,wcd-handle = <&wcd939x_codec>; + status = "disabled"; + }; + }; + }; + + tx_macro: tx-macro@6AE0000 { + compatible = "qcom,lpass-cdc-tx-macro"; + reg = <0x6AE0000 0x0>; + qcom,default-clk-id = ; + qcom,tx-dmic-sample-rate = <2400000>; + qcom,is-used-swr-gpio = <0>; + }; + + rx_macro: rx-macro@6AC0000 { + compatible = "qcom,lpass-cdc-rx-macro"; + reg = <0x6AC0000 0x0>; + qcom,rx-swr-gpios = <&rx_swr_gpios>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + clock-names = "rx_mclk2_2x_clk"; + clocks = <&clock_audio_rx_mclk2_2x_clk 0>; + swr1: rx_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <2>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0x6ad0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <12>; + qcom,swr-port-mapping = <1 HPH_L 0x1>, + <1 HPH_R 0x2>, <2 CLSH 0x3>, + <3 COMP_L 0x1>, <3 COMP_R 0x2>, + <4 LO 0x1>, <5 DSD_L 0x1>, + <5 DSD_R 0x2>, <6 PCM_OUT1 0x01>, + <7 GPPO 0x03>, <8 HAPT 0x03>, + <9 HIFI_PCM_L 0x01>, <9 HIFI_PCM_R 0x2>, + <10 HPTH 0x03>, <11 CMPT 0x03>, <12 IPCM 0x03>; + qcom,swr-num-dev = <2>; + qcom,swr-clock-stop-mode0 = <1>; + swr_haptics: swr_haptics@f0170220 { + compatible = "qcom,pm8550b-swr-haptics"; + reg = <0x02 0xf0170220>; + swr-slave-supply = <&hap_swr_slave_reg>; + qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; + }; + + wcd939x_rx_slave: wcd939x-rx-slave { + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170224>; + }; + }; + }; + + wsa_macro: wsa-macro@6B00000 { + compatible = "qcom,lpass-cdc-wsa-macro"; + reg = <0x6B00000 0x0>; + wsa_data_fs_ctl_reg = <0x6B6F000>; + qcom,wsa-swr-gpios = <&wsa_swr_gpios>; + qcom,wsa-bat-cfgs= <1>, <1>; + qcom,wsa-rloads= <2>, <2>; + qcom,wsa-system-gains= <0 9>, <0 9>; + qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + qcom,thermal-max-state = <11>; + qcom,noise-gate-mode = <2>; + #cooling-cells = <2>; + swr0: wsa_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <1>; + qcom,mipi-sdw-block-packing-mode = <0>; + swrm-io-base = <0x6b10000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <13>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-port-mapping = <1 SPKR_L 0x1>, + <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, + <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, + <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, + <8 SPKR_HAPT 0x3>, <9 OCPM 0x3>, + <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, + <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; + qcom,swr-num-dev = <2>; + qcom,dynamic-port-map-supported = <0>; + wsa884x_0220: wsa884x@02170220 { + compatible = "qcom,wsa884x"; + reg = <0x4 0x2170220>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , , , , , + , , , , , , + , , , , , , + , , , , , ; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrLeft"; + }; + + wsa884x_0221: wsa884x@02170221 { + compatible = "qcom,wsa884x"; + reg = <0x4 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , , , , , + , , , , , , + , , , , , , + , , , , , ; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrRight"; + }; + }; + }; + + wsa2_macro: wsa2-macro@6AA0000 { + compatible = "qcom,lpass-cdc-wsa2-macro"; + reg = <0x6AA0000 0x0>; + wsa_data_fs_ctl_reg = <0x6B6F000>; + qcom,wsa2-swr-gpios = <&wsa2_swr_gpios>; + qcom,wsa-bat-cfgs= <1>, <1>; + qcom,wsa-rloads= <2>, <2>; + qcom,wsa-system-gains= <0 9>, <0 9>; + qcom,wsa2-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + qcom,thermal-max-state = <11>; + qcom,noise-gate-mode = <2>; + #cooling-cells = <2>; + status = "disabled"; + swr3: wsa2_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <4>; + qcom,mipi-sdw-block-packing-mode = <0>; + swrm-io-base = <0x6ab0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <13>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-port-mapping = <1 SPKR_L 0x1>, + <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, + <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, + <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, + <8 SPKR_HAPT 0x3>, <9 OCPM 0x3>, + <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, + <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; + qcom,swr-num-dev = <2>; + qcom,dynamic-port-map-supported = <0>; + wsa884x_2_0220: wsa884x@02170220 { + compatible = "qcom,wsa884x_2"; + reg = <0x4 0x2170220>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa2_macro>; + qcom,swr-wsa-port-params = + , , , , , , + , , , , , , + , , , , , , + , , , , , ; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "Spkr2Left"; + }; + + wsa884x_2_0221: wsa884x@02170221 { + compatible = "qcom,wsa884x_2"; + reg = <0x4 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa2_macro>; + qcom,swr-wsa-port-params = + , , , , , , + , , , , , , + , , , , , , + , , , , , ; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "Spkr2Right"; + }; + }; + }; + + wcd939x_codec: wcd939x-codec { + compatible = "qcom,wcd939x-codec"; + qcom,split-codec = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>, <5 HIFI_PCM_L 0x1 0 HIFI_PCM_L>, + <5 HIFI_PCM_R 0x2 0 HIFI_PCM_R>; + + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <0 ADC2 0x2 0 SWRM_TX1_CH2>, + <1 ADC3 0x1 0 SWRM_TX1_CH3>, + <1 ADC4 0x2 0 SWRM_TX1_CH4>, + <2 DMIC0 0x1 0 SWRM_TX2_CH1>, + <2 DMIC1 0x2 0 SWRM_TX2_CH2>, + <2 MBHC 0x4 0 SWRM_TX2_CH3>, + <2 DMIC2 0x4 0 SWRM_TX2_CH3>, + <2 DMIC3 0x8 0 SWRM_TX2_CH4>, + <3 DMIC4 0x1 0 SWRM_TX3_CH1>, + <3 DMIC5 0x2 0 SWRM_TX3_CH2>, + <3 DMIC6 0x4 0 SWRM_TX3_CH3>, + <3 DMIC7 0x8 0 SWRM_TX3_CH4>; + + qcom,swr-tx-port-params = + , , , , + , , , , + , , , , + , , , ; + + qcom,wcd-rst-gpio-node = <&wcd939x_rst_gpio>; + qcom,rx-slave = <&wcd939x_rx_slave>; + qcom,tx-slave = <&wcd939x_tx_slave>; + + cdc-vdd-rx-supply = <&L15B>; + qcom,cdc-vdd-rx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rx-current = <30000>; + qcom,cdc-vdd-rx-lpm-supported = <1>; + + cdc-vdd-tx-supply = <&L15B>; + qcom,cdc-vdd-tx-voltage = <1800000 1800000>; + qcom,cdc-vdd-tx-current = <30000>; + qcom,cdc-vdd-tx-lpm-supported = <1>; + + cdc-vdd-buck-supply = <&L15B>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <650000>; + qcom,cdc-vdd-buck-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB1>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <30000>; + + cdc-vdd-px-supply = <&L3C>; + qcom,cdc-vdd-px-voltage = <1200000 1200000>; + qcom,cdc-vdd-px-current = <5000>; + qcom,cdc-vdd-px-lpm-supported = <1>; + + qcom,cdc-vdd-px-rem-supported = <1>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + qcom,cdc-micbias4-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rx", + "cdc-vdd-tx", + "cdc-vdd-mic-bias"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck", + "cdc-vdd-px"; + }; + +}; + +&spf_core_platform { + pineapple_snd: sound { + qcom,model = "pineapple-mtp-snd-card"; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,wcn-bt = <1>; + qcom,ext-disp-audio-rx = <1>; + qcom,tdm-max-slots = <8>; + qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,audio-core-list = <0>, <1>; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "HAP_IN", "PCM_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; + qcom,cdc-dmic45-gpios = <&cdc_dmic45_gpios>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&swr_haptics>, + <&wsa884x_0220>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "swr-haptics", + "wsa-codec1", "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; + + /* + * ==================== + * UPD backend - WSA + * ==================== + * + * Mute/Unmute the interpolator + * ------------------------------ + * Register: LPASS_WSA_CDC_RX0_RX_PATH_MIX_CTL - 0x6B00418 + * + * Send control commands to the peripheral from the soundwire controller + * ----------------------------------------------------------------------- + * Register: LPASS_WSA_SWR_MSTR_WSA_SWRM_CPUn_CMD_FIFO_WR_CMD - 0x6B14020 + * + * Enable/Disable ear piece + * -------------------------- + * Register: DIG_CTRL0_PA_FSM_EN - 0x3430 + * + */ + qcom,upd_backends_used = "wsa"; + qcom,upd_lpass_reg_addr = <0x6B00418 0x6B14020>; + qcom,upd_ear_pa_reg_addr = <0x3430>; + + /* + * ==================== + * UPD backend - WCD + * ==================== + * + * Mute/Unmute the interpolator + * ------------------------------ + * Register: LPASS_WCD_CDC_RX0_RX_PATH_MIX_CTL - 0x6AC0418 + * + * Send control commands to the wcd from the soundwire controller + * ---------------------------------------------------------------- + * Register: LPASS_WCD_SWR_MSTR_WSA_SWRM_CPUn_CMD_FIFO_WR_CMD - 0x6D34020 + * + * Enable/Disable ear piece + * -------------------------- + * Register: DIG_CTRL0_PA_FSM_EN - 0x300A + * + */ + /* + qcom,upd_backends_used = "wcd"; + qcom,upd_lpass_reg_addr = <0x6AC0418 0x6D34020>; + qcom,upd_ear_pa_reg_addr = <0x300A>; + */ + }; + + cdc_pri_mi2s_gpios: pri_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active + &i2s0_sd0_active &i2s0_sd1_active>; + pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep + &i2s0_sd0_sleep &i2s0_sd1_sleep>; + #gpio-cells = <0>; + }; + + fm_i2s1_gpios: fm_i2s1_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&i2s1_sck_active &i2s1_ws_active + &i2s1_sd0_active>; + pinctrl-1 = <&i2s1_sck_sleep &i2s1_ws_sleep + &i2s1_sd0_sleep>; + #gpio-cells = <0>; + }; + + cdc_tert_mi2s_gpios: tert_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s4_sck_active &lpi_i2s4_ws_active + &lpi_i2s4_sd0_active &lpi_i2s4_sd1_active>; + pinctrl-1 = <&lpi_i2s4_sck_sleep &lpi_i2s4_ws_sleep + &lpi_i2s4_sd0_sleep &lpi_i2s4_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <185 187>; + #gpio-cells = <0>; + }; + + cdc_quat_mi2s_gpios: quat_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&quat_mi2s_sck_active &quat_mi2s_ws_active + &quat_mi2s_sd0_active &quat_mi2s_sd1_active + &quat_mi2s_sd2_active &quat_mi2s_sd3_active>; + pinctrl-1 = <&quat_mi2s_sck_sleep &quat_mi2s_ws_sleep + &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep + &quat_mi2s_sd2_sleep &quat_mi2s_sd3_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <166 169>; + #gpio-cells = <0>; + }; + + cdc_quin_mi2s_gpios: quin_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s1_sck_active &lpi_i2s1_ws_active + &lpi_i2s1_sd0_active &lpi_i2s1_sd1_active>; + pinctrl-1 = <&lpi_i2s1_sck_sleep &lpi_i2s1_ws_sleep + &lpi_i2s1_sd0_sleep &lpi_i2s1_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <171 172 174>; + #gpio-cells = <0>; + }; + + cdc_sen_mi2s_gpios: sen_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s2_sck_active &lpi_i2s2_ws_active + &lpi_i2s2_sd0_active &lpi_i2s2_sd1_active>; + pinctrl-1 = <&lpi_i2s2_sck_sleep &lpi_i2s2_ws_sleep + &lpi_i2s2_sd0_sleep &lpi_i2s2_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <176 181>; + #gpio-cells = <0>; + }; + + cdc_sep_mi2s_gpios: sep_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s3_sck_active &lpi_i2s3_ws_active + &lpi_i2s3_sd0_active &lpi_i2s3_sd1_active>; + pinctrl-1 = <&lpi_i2s3_sck_sleep &lpi_i2s3_ws_sleep + &lpi_i2s3_sd0_sleep &lpi_i2s3_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <177 182>; + #gpio-cells = <0>; + }; + + wsa_swr_gpios: wsa_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>; + pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <176>; + #gpio-cells = <0>; + }; + + wsa2_swr_gpios: wsa2_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wsa2_swr_clk_active &wsa2_swr_data_active>; + pinctrl-1 = <&wsa2_swr_clk_sleep &wsa2_swr_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <181>; + #gpio-cells = <0>; + }; + + rx_swr_gpios: rx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active + &rx_swr_data1_active>; + pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep + &rx_swr_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <169>; + #gpio-cells = <0>; + }; + + va_swr_gpios: tx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active + &tx_swr_data1_active &tx_swr_data2_active>; + pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep + &tx_swr_data1_sleep &tx_swr_data2_sleep>; + qcom,lpi-gpios; + qcom,chip-wakeup-reg = <0xf1a6008>; + qcom,chip-wakeup-maskbit = <7>; + qcom,chip-wakeup-default-val = <0x1>; + qcom,tlmm-pins = <166>; + #gpio-cells = <0>; + }; + + cdc_dmic01_gpios: cdc_dmic01_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>; + pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <171 172>; + #gpio-cells = <0>; + }; + + cdc_dmic23_gpios: cdc_dmic23_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>; + pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <174>; + #gpio-cells = <0>; + }; + + cdc_dmic45_gpios: cdc_dmic45_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic45_clk_active &cdc_dmic45_data_active>; + pinctrl-1 = <&cdc_dmic45_clk_sleep &cdc_dmic45_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <177>; + #gpio-cells = <0>; + }; + + cdc_dmic67_gpios: cdc_dmic67_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic67_clk_active &cdc_dmic67_data_active>; + pinctrl-1 = <&cdc_dmic67_clk_sleep &cdc_dmic67_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <182>; + #gpio-cells = <0>; + }; +}; + +&soc { + wsa_spkr_en02: wsa_spkr_en1_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_02_sd_n_active>; + pinctrl-1 = <&spkr_02_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wsa_spkr_en13: wsa_spkr_en2_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_13_sd_n_active>; + pinctrl-1 = <&spkr_13_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wcd939x_rst_gpio: msm_cdc_pinctrl@32 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd939x_reset_active>; + pinctrl-1 = <&wcd939x_reset_sleep>; + }; + + clock_audio_va_1: va_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x307>; + #clock-cells = <1>; + }; + + clock_audio_wsa_1: wsa_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x309>; + #clock-cells = <1>; + }; + + clock_audio_wsa_2: wsa2_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x310>; + #clock-cells = <1>; + }; + + clock_audio_rx_1: rx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <22579200>; + qcom,codec-lpass-clk-id = <0x30E>; + #clock-cells = <1>; + }; + + clock_audio_rx_tx: rx_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x312>; + #clock-cells = <1>; + }; + + clock_audio_tx_1: tx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x30C>; + #clock-cells = <1>; + }; + + clock_audio_wsa_tx: wsa_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x314>; + #clock-cells = <1>; + }; + + clock_audio_wsa2_tx: wsa2_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x316>; + #clock-cells = <1>; + }; + + clock_audio_rx_mclk2_2x_clk: rx_mclk2_2x_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x318>; + #clock-cells = <1>; + }; +}; + +&adsp_loader { + status = "ok"; +} \ No newline at end of file diff --git a/pineapple-audio-qrd-sku2.dts b/pineapple-audio-qrd-sku2.dts new file mode 100644 index 00000000..e98b42c5 --- /dev/null +++ b/pineapple-audio-qrd-sku2.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-qrd-sku2.dtsi" + / { + model = "Qualcomm Technologies, Inc. Pineapple QRD"; + compatible = "qcom,pineapple-qrd", "qcom,pineapple", "qcom,qrd"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x5000B 0>; +}; diff --git a/pineapple-audio-qrd-sku2.dtsi b/pineapple-audio-qrd-sku2.dtsi new file mode 100644 index 00000000..f57af4d9 --- /dev/null +++ b/pineapple-audio-qrd-sku2.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-qrd.dtsi" + +&pineapple_snd { + qcom,model = "pineapple-qrd-sku2-snd-card"; +}; + diff --git a/pineapple-audio-qrd.dts b/pineapple-audio-qrd.dts new file mode 100644 index 00000000..d5b38c65 --- /dev/null +++ b/pineapple-audio-qrd.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-qrd.dtsi" + / { + model = "Qualcomm Technologies, Inc. Pineapple QRD"; + compatible = "qcom,pineapple-qrd", "qcom,pineapple", "qcom,qrd"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x1000B 0>, <11 0>; +}; diff --git a/pineapple-audio-qrd.dtsi b/pineapple-audio-qrd.dtsi new file mode 100644 index 00000000..c213da43 --- /dev/null +++ b/pineapple-audio-qrd.dtsi @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-overlay.dtsi" +&tx_swr_clk_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data0_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data1_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data2_active { + config { + drive-strength = <2>; + }; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs = <2>, <2>; +}; + +&wsa2_macro { + qcom,wsa-bat-cfgs = <2>, <2>; +}; + +&wcd939x_codec { + cdc-vdd-px-supply = <&L15B>; + qcom,cdc-vdd-px-voltage = <1800000 1800000>; + qcom,cdc-vdd-px-current = <650000>; + qcom,cdc-vdd-px-lpm-supported = <1>; + /* 0 for digital crosstalk disabled, + * 1 for digital crosstalk with local sensed a-xtalk enabled, and + * 2 for digital crosstalk with remote sensed a-xtalk enabled. + */ + qcom,usbcss-hs-xtalk-config = <2>; + qcom,usbcss-hs-rdson = <600>; + qcom,usbcss-hs-r2 = <7550>; + qcom,usbcss-hs-r3 = <1>; + qcom,usbcss-hs-r4 = <330>; + qcom,usbcss-hs-r5 = <5>; + qcom,usbcss-hs-r6 = <1>; + qcom,usbcss-hs-r7 = <5>; + qcom,usbcss-hs-lin-k-aud = <13>; + qcom,usbcss-hs-lin-k-gnd = <13>; +}; + +&pineapple_snd { + qcom,model = "pineapple-qrd-snd-card"; + + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "HAP_IN", "PCM_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK"; + + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,wcd-disable-legacy-surge; +}; + diff --git a/pineapple-audio-rcm.dts b/pineapple-audio-rcm.dts new file mode 100644 index 00000000..c0570259 --- /dev/null +++ b/pineapple-audio-rcm.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-cdp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Pineapple RCM"; + compatible = "qcom,pineapple-rcm", "qcom,pineapple", "qcom,pineapplep-rcm", "qcom,pineapplep", "qcom,rcm"; + qcom,msm-id = <557 0x10000>, <577 0x10000>, <557 0x20000>, <577 0x20000>; + qcom,board-id = <0x15 0>; +}; diff --git a/pineapple-audio-rumi.dts b/pineapple-audio-rumi.dts new file mode 100644 index 00000000..42453654 --- /dev/null +++ b/pineapple-audio-rumi.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-rumi.dtsi" + / { + model = "Qualcomm Technologies, Inc. Pineapple RUMI"; + compatible = "qcom,pineapple-rumi", "qcom,pineapple", "qcom,rumi"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <15 0>; +}; diff --git a/pineapple-audio-rumi.dtsi b/pineapple-audio-rumi.dtsi new file mode 100644 index 00000000..f427874a --- /dev/null +++ b/pineapple-audio-rumi.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-overlay.dtsi" + +&pineapple_snd { + compatible = "qcom,pineapple-asoc-snd-stub"; + asoc-codec = <&stub_codec>; + asoc-codec-names = "msm-stub-codec.1"; + }; diff --git a/pineapple-audio-wsa883x-cdp.dts b/pineapple-audio-wsa883x-cdp.dts new file mode 100644 index 00000000..136f6f82 --- /dev/null +++ b/pineapple-audio-wsa883x-cdp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-audio-wsa883x-cdp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Pineapple CDP - WSA883X"; + compatible = "qcom,pineapple-cdp", "qcom,pineapple", "qcom,cdp"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x01000001 0>; +}; diff --git a/pineapple-audio-wsa883x-cdp.dtsi b/pineapple-audio-wsa883x-cdp.dtsi new file mode 100644 index 00000000..554239aa --- /dev/null +++ b/pineapple-audio-wsa883x-cdp.dtsi @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-cdp.dtsi" + +&pineapple_snd { + qcom,model = "pineapple-cdp-wsa883x-snd-card"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&swr_haptics>, + <&wsa883x_0221>, <&wsa883x_0222>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "swr-haptics", + "wsa-codec1", "wsa-codec2"; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs= <0>, <0>; +}; + +&wsa884x_0220 { + status = "disabled"; +}; + +&wsa884x_0221 { + status = "disabled"; +}; + +&swr0 { + wsa883x_0221: wsa883x@02170221 { + compatible = "qcom,wsa883x"; + reg = <0x2 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrLeft"; + }; + + wsa883x_0222: wsa883x@02170222 { + compatible = "qcom,wsa883x"; + reg = <0x2 0x2170222>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrRight"; + }; +}; + +&wsa2_macro { + qcom,wsa-bat-cfgs= <0>, <0>; +}; + +&wsa884x_2_0220 { + status = "disabled"; +}; + +&wsa884x_2_0221 { + status = "disabled"; +}; + +&swr3 { + wsa883x_2_0221: wsa883x@02170221 { + compatible = "qcom,wsa883x_2"; + reg = <0x2 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "Spkr2Left"; + }; + + wsa883x_2_0222: wsa883x@02170222 { + compatible = "qcom,wsa883x"; + reg = <0x2 0x2170222>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "Spkr2Right"; + }; +}; diff --git a/pineapple-audio.dts b/pineapple-audio.dts new file mode 100644 index 00000000..a098be3f --- /dev/null +++ b/pineapple-audio.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "pineapple-audio.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Pineapple"; + compatible = "qcom,pineapple"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/pineapple-audio.dtsi b/pineapple-audio.dtsi new file mode 100644 index 00000000..c114fbae --- /dev/null +++ b/pineapple-audio.dtsi @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include "msm-audio-lpass.dtsi" + +&soc { + spf_core_platform: spf_core_platform { + compatible = "qcom,spf-core-platform"; + }; + + lpass_core_hw_vote: vote_lpass_core_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; + + lpass_audio_hw_vote: vote_lpass_audio_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; +}; + +&glink_edge { + audio_gpr: qcom,gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,intents = <0x200 20>; + reg = ; + + spf_core { + compatible = "qcom,spf_core"; + reg = ; + }; + + audio-pkt { + compatible = "qcom,audio-pkt"; + qcom,audiopkt-ch-name = "apr_audio_svc"; + reg = ; + }; + + audio_prm: q6prm { + compatible = "qcom,audio_prm"; + reg = ; + }; + }; +}; + +&spf_core_platform { + + msm_audio_ion: qcom,msm-audio-ion { + compatible = "qcom,msm-audio-ion"; + qcom,smmu-version = <2>; + qcom,smmu-enabled; + iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1061 0x0>; + qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>; + qcom,smmu-sid-mask = /bits/ 64 <0xf>; + dma-coherent; + }; + + msm_audio_ion_cma: qcom,msm-audio-ion-cma { + compatible = "qcom,msm-audio-ion-cma"; + }; + + lpi_tlmm: lpi_pinctrl@6E80000 { + compatible = "qcom,lpi-pinctrl"; + reg = <0x6E80000 0x0>; + qcom,gpios-count = <23>; + qcom,slew-reg = <0x6E80000 0x0>; + gpio-controller; + #gpio-cells = <2>; + qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>, + <0x00002000>, <0x00003000>, + <0x00004000>, <0x00005000>, + <0x00006000>, <0x00007000>, + <0x00008000>, <0x00009000>, + <0x0000A000>, <0x0000B000>, + <0x0000C000>, <0x0000D000>, + <0x0000E000>, <0x0000F000>, + <0x00010000>, <0x00011000>, + <0x00012000>, <0x00013000>, + <0x00014000>, <0x00015000>, + <0x00016000>; + qcom,lpi-slew-offset-tbl = <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>; + + qcom,lpi-slew-base-tbl = <0x6E80000>, <0x6E81000>, + <0x6E82000>, <0x6E83000>, + <0x6E84000>, <0x6E85000>, + <0x6E86000>, <0x6E87000>, + <0x6E88000>, <0x6E89000>, + <0x6E8A000>, <0x6E8B000>, + <0x6E8C000>, <0x6E8D000>, + <0x6E8E000>, <0x6E8F000>, + <0x6E90000>, <0x6E91000>, + <0x6E92000>, <0x6E93000>, + <0x6E94000>, <0x6E95000>, + <0x6E96000>; + + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + }; + + lpass_cdc: lpass-cdc { + compatible = "qcom,lpass-cdc"; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + }; + + va_macro: va-macro@6D44000 { + swr2: va_swr_master { + }; + }; + + tx_macro: tx-macro@6AE0000 { + }; + + rx_macro: rx-macro@6AC0000 { + swr1: rx_swr_master { + }; + }; + + wsa_macro: wsa-macro@6B00000 { + swr0: wsa_swr_master { + }; + }; + + wsa2_macro: wsa2-macro@6AA0000 { + swr3: wsa2_swr_master { + }; + }; + }; + + pineapple_snd: sound { + compatible = "qcom,pineapple-asoc-snd"; + qcom,mi2s-audio-intf = <1>; + qcom,tdm-audio-intf = <0>; + qcom,auxpcm-audio-intf = <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,afe-rxtx-lb = <0>; + + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + wcd939x-i2c-handle = <&wcd_usbss>; + }; +}; + +&aliases { + swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@6D44000/va_swr_master"; + swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master"; +}; + diff --git a/pineapple-lpi.dtsi b/pineapple-lpi.dtsi new file mode 100644 index 00000000..a8c9c24d --- /dev/null +++ b/pineapple-lpi.dtsi @@ -0,0 +1,2549 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&lpi_tlmm { + quat_mi2s_sck { + quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sck_active: quat_mi2s_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_ws { + quat_mi2s_ws_sleep: quat_mi2s_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_ws_active: quat_mi2s_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd0 { + quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd0_active: quat_mi2s_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd1 { + quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd1_active: quat_mi2s_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd2 { + quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd2_active: quat_mi2s_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd3 { + quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd3_active: quat_mi2s_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sck { + lpi_i2s1_sck_sleep: lpi_i2s1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sck_active: lpi_i2s1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_ws { + lpi_i2s1_ws_sleep: lpi_i2s1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_ws_active: lpi_i2s1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd0 { + lpi_i2s1_sd0_sleep: lpi_i2s1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sd0_active: lpi_i2s1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd1 { + lpi_i2s1_sd1_sleep: lpi_i2s1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sd1_active: lpi_i2s1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sck { + lpi_i2s2_sck_sleep: lpi_i2s2_sck_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sck_active: lpi_i2s2_sck_active { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_ws { + lpi_i2s2_ws_sleep: lpi_i2s2_ws_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_ws_active: lpi_i2s2_ws_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sd0 { + lpi_i2s2_sd0_sleep: lpi_i2s2_sd0_sleep { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sd0_active: lpi_i2s2_sd0_active { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sd1 { + lpi_i2s2_sd1_sleep: lpi_i2s2_sd1_sleep { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sd1_active: lpi_i2s2_sd1_active { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s3_sck { + lpi_i2s3_sck_sleep: lpi_i2s3_sck_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s3_sck_active: lpi_i2s3_sck_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s3_ws { + lpi_i2s3_ws_sleep: lpi_i2s3_ws_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s3_ws_active: lpi_i2s3_ws_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s3_sd0 { + lpi_i2s3_sd0_sleep: lpi_i2s3_sd0_sleep { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s3_sd0_active: lpi_i2s3_sd0_active { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s3_sd1 { + lpi_i2s3_sd1_sleep: lpi_i2s3_sd1_sleep { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s3_sd1_active: lpi_i2s3_sd1_active { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s4_sck { + lpi_i2s4_sck_sleep: lpi_i2s4_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s4_sck_active: lpi_i2s4_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s4_ws { + lpi_i2s4_ws_sleep: lpi_i2s4_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s4_ws_active: lpi_i2s4_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s4_sd0 { + lpi_i2s4_sd0_sleep: lpi_i2s4_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s4_sd0_active: lpi_i2s4_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s4_sd1 { + lpi_i2s4_sd1_sleep: lpi_i2s4_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s4_sd1_active: lpi_i2s4_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sck { + quat_tdm_sck_sleep: quat_tdm_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sck_active: quat_tdm_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_ws { + quat_tdm_ws_sleep: quat_tdm_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_ws_active: quat_tdm_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd0 { + quat_tdm_sd0_sleep: quat_tdm_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd0_active: quat_tdm_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd1 { + quat_tdm_sd1_sleep: quat_tdm_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd1_active: quat_tdm_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd2 { + quat_tdm_sd2_sleep: quat_tdm_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd2_active: quat_tdm_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd3 { + quat_tdm_sd3_sleep: quat_tdm_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd3_active: quat_tdm_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sck { + lpi_tdm1_sck_sleep: lpi_tdm1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sck_active: lpi_tdm1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_ws { + lpi_tdm1_ws_sleep: lpi_tdm1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_ws_active: lpi_tdm1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sd0 { + lpi_tdm1_sd0_sleep: lpi_tdm1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd0_active: lpi_tdm1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sd1 { + lpi_tdm1_sd1_sleep: lpi_tdm1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd1_active: lpi_tdm1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sck { + lpi_tdm2_sck_sleep: lpi_tdm2_sck_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sck_active: lpi_tdm2_sck_active { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_ws { + lpi_tdm2_ws_sleep: lpi_tdm2_ws_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_ws_active: lpi_tdm2_ws_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd0 { + lpi_tdm2_sd0_sleep: lpi_tdm2_sd0_sleep { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd0_active: lpi_tdm2_sd0_active { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd1 { + lpi_tdm2_sd1_sleep: lpi_tdm2_sd1_sleep { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd1_active: lpi_tdm2_sd1_active { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sck { + lpi_tdm3_sck_sleep: lpi_tdm3_sck_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sck_active: lpi_tdm3_sck_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_ws { + lpi_tdm3_ws_sleep: lpi_tdm3_ws_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_ws_active: lpi_tdm3_ws_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd0 { + lpi_tdm3_sd0_sleep: lpi_tdm3_sd0_sleep { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd0_active: lpi_tdm3_sd0_active { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd1 { + lpi_tdm3_sd1_sleep: lpi_tdm3_sd1_sleep { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd1_active: lpi_tdm3_sd1_active { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm4_sck { + lpi_tdm4_sck_sleep: lpi_tdm4_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm4_sck_active: lpi_tdm4_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm4_ws { + lpi_tdm4_ws_sleep: lpi_tdm4_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm4_ws_active: lpi_tdm4_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm4_sd0 { + lpi_tdm4_sd0_sleep: lpi_tdm4_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm4_sd0_active: lpi_tdm4_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm4_sd1 { + lpi_tdm4_sd1_sleep: lpi_tdm4_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm4_sd1_active: lpi_tdm4_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sck { + quat_aux_sck_sleep: quat_aux_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sck_active: quat_aux_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_ws { + quat_aux_ws_sleep: quat_aux_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_ws_active: quat_aux_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd0 { + quat_aux_sd0_sleep: quat_aux_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd0_active: quat_aux_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd1 { + quat_aux_sd1_sleep: quat_aux_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd1_active: quat_aux_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd2 { + quat_aux_sd2_sleep: quat_aux_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd2_active: quat_aux_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd3 { + quat_aux_sd3_sleep: quat_aux_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd3_active: quat_aux_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sck { + lpi_aux1_sck_sleep: lpi_aux1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sck_active: lpi_aux1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_ws { + lpi_aux1_ws_sleep: lpi_aux1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_ws_active: lpi_aux1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd0 { + lpi_aux1_sd0_sleep: lpi_aux1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd0_active: lpi_aux1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd1 { + lpi_aux1_sd1_sleep: lpi_aux1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd1_active: lpi_aux1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sck { + lpi_aux2_sck_sleep: lpi_aux2_sck_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sck_active: lpi_aux2_sck_active { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_ws { + lpi_aux2_ws_sleep: lpi_aux2_ws_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_ws_active: lpi_aux2_ws_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd0 { + lpi_aux2_sd0_sleep: lpi_aux2_sd0_sleep { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd0_active: lpi_aux2_sd0_active { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd1 { + lpi_aux2_sd1_sleep: lpi_aux2_sd1_sleep { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd1_active: lpi_aux2_sd1_active { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sck { + lpi_aux3_sck_sleep: lpi_aux3_sck_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sck_active: lpi_aux3_sck_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_ws { + lpi_aux3_ws_sleep: lpi_aux3_ws_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_ws_active: lpi_aux3_ws_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sd0 { + lpi_aux3_sd0_sleep: lpi_aux3_sd0_sleep { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd0_active: lpi_aux3_sd0_active { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sd1 { + lpi_aux3_sd1_sleep: lpi_aux3_sd1_sleep { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd1_active: lpi_aux3_sd1_active { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux4_sck { + lpi_aux4_sck_sleep: lpi_aux4_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux4_sck_active: lpi_aux4_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux4_ws { + lpi_aux4_ws_sleep: lpi_aux4_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux4_ws_active: lpi_aux4_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux4_sd0 { + lpi_aux4_sd0_sleep: lpi_aux4_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux4_sd0_active: lpi_aux4_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux4_sd1 { + lpi_aux4_sd1_sleep: lpi_aux4_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux4_sd1_active: lpi_aux4_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + /* WSA speaker - north reset pins */ + spkr_02_sd_n { + spkr_02_sd_n_sleep: spkr_02_sd_n_sleep { + mux { + pins = "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + spkr_02_sd_n_active: spkr_02_sd_n_active { + mux { + pins = "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio21"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; + + wsa_swr_clk_pin { + wsa_swr_clk_sleep: wsa_swr_clk_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_clk_active: wsa_swr_clk_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + wsa_swr_data_pin { + wsa_swr_data_sleep: wsa_swr_data_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_data_active: wsa_swr_data_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + + wsa2_swr_clk_pin { + wsa2_swr_clk_sleep: wsa2_swr_clk_sleep { + mux { + pins = "gpio15"; + function = "func2"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa2_swr_clk_active: wsa2_swr_clk_active { + mux { + pins = "gpio15"; + function = "func2"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + wsa2_swr_data_pin { + wsa2_swr_data_sleep: wsa2_swr_data_sleep { + mux { + pins = "gpio16"; + function = "func2"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa2_swr_data_active: wsa2_swr_data_active { + mux { + pins = "gpio16"; + function = "func2"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + + tx_swr_clk_sleep: tx_swr_clk_sleep { + mux { + pins = "gpio0"; + function = "func1"; + input-enable; + bias-pull-down; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + }; + }; + + tx_swr_clk_active: tx_swr_clk_active { + mux { + pins = "gpio0"; + function = "func1"; + }; + + config { + pins = "gpio0"; + drive-strength = <4>; + slew-rate = <1>; + bias-disable; + }; + }; + + tx_swr_data0_sleep: tx_swr_data0_sleep { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; + input-enable; + bias-bus-hold; + }; + }; + + tx_swr_data0_active: tx_swr_data0_active { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data1_sleep: tx_swr_data1_sleep { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + tx_swr_data1_active: tx_swr_data1_active { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data2_sleep: tx_swr_data2_sleep { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio14"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + tx_swr_data2_active: tx_swr_data2_active { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio14"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + rx_swr_clk_sleep: rx_swr_clk_sleep { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_clk_active: rx_swr_clk_active { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + + rx_swr_data_sleep: rx_swr_data_sleep { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_data_active: rx_swr_data_active { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + rx_swr_data1_sleep: rx_swr_data1_sleep { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_data1_active: rx_swr_data1_active { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + cdc_dmic01_clk_active: dmic01_clk_active { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic01_clk_sleep: dmic01_clk_sleep { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic01_data_active: dmic01_data_active { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic01_data_sleep: dmic01_data_sleep { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic23_clk_active: dmic23_clk_active { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic23_clk_sleep: dmic23_clk_sleep { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic23_data_active: dmic23_data_active { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic23_data_sleep: dmic23_data_sleep { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_clk_active: dmic45_clk_active { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic45_clk_sleep: dmic45_clk_sleep { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic45_data_active: dmic45_data_active { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_data_sleep: dmic45_data_sleep { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic67_clk_active: dmic67_clk_active { + mux { + pins = "gpio17"; + function = "func1"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic67_clk_sleep: dmic67_clk_sleep { + mux { + pins = "gpio17"; + function = "func1"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic67_data_active: dmic67_data_active { + mux { + pins = "gpio18"; + function = "func1"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic67_data_sleep: dmic67_data_sleep { + mux { + pins = "gpio18"; + function = "func1"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; +}; diff --git a/pineapplep-audio-hdk.dts b/pineapplep-audio-hdk.dts new file mode 100644 index 00000000..96ef9aaf --- /dev/null +++ b/pineapplep-audio-hdk.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapplep-audio-hdk.dtsi" +/ { + model = "Qualcomm Technologies, Inc. PineappleP HDK"; + compatible = "qcom,pineapplep-hdk", "qcom,pineapplep", "qcom,hdk"; + qcom,msm-id = <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x1f 0>; +}; diff --git a/pineapplep-audio-hdk.dtsi b/pineapplep-audio-hdk.dtsi new file mode 100644 index 00000000..eedc7166 --- /dev/null +++ b/pineapplep-audio-hdk.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-audio-qrd.dtsi" + +&pineapple_snd { + qcom,model = "pineapple-qrd-snd-card"; + + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; +}; + diff --git a/sun-audio-atp.dts b/sun-audio-atp.dts new file mode 100644 index 00000000..17bf29ec --- /dev/null +++ b/sun-audio-atp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-atp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Sun ATP"; + compatible = "qcom,sun-atp", "qcom,sun", "qcom,atp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x10021 0>; +}; diff --git a/sun-audio-atp.dtsi b/sun-audio-atp.dtsi new file mode 100644 index 00000000..5d5ca97b --- /dev/null +++ b/sun-audio-atp.dtsi @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-mtp.dtsi" + +&swr_haptics { + status = "disabled"; +}; + +&sun_snd { + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1", "wsa-codec2"; + swr-haptics-unsupported; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs= <4>, <4>; +}; + +&wsa2_macro { + qcom,wsa-bat-cfgs= <4>, <4>; +}; diff --git a/sun-audio-cdp-nfc.dts b/sun-audio-cdp-nfc.dts new file mode 100644 index 00000000..b9b0e235 --- /dev/null +++ b/sun-audio-cdp-nfc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-cdp-nfc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun CDP ST54L NFC"; + compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x50001 0>; +}; \ No newline at end of file diff --git a/sun-audio-cdp-nfc.dtsi b/sun-audio-cdp-nfc.dtsi new file mode 100644 index 00000000..943b3c1c --- /dev/null +++ b/sun-audio-cdp-nfc.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-cdp.dtsi" diff --git a/sun-audio-cdp.dts b/sun-audio-cdp.dts new file mode 100644 index 00000000..fab0bb24 --- /dev/null +++ b/sun-audio-cdp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-cdp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Sun CDP"; + compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <1 0>; +}; diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi new file mode 100644 index 00000000..e467ec4b --- /dev/null +++ b/sun-audio-cdp.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-overlay.dtsi" + +&lpass_cdc { + qcom,num-macros = <4>; +}; + +&wsa2_macro { + status = "disabled"; +}; + +&cdc_pri_mi2s_gpios { + status = "disabled"; +}; + +&fm_i2s1_gpios { + status = "ok"; +}; + +&cdc_tert_mi2s_gpios { + status = "disabled"; +}; + +&cdc_quat_mi2s_gpios { + status = "disabled"; +}; + +&cdc_quin_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sen_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sep_mi2s_gpios { + status = "disabled"; +}; + +&sun_snd { + qcom,model = "sun-cdp-snd-card"; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS1", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS1", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS1", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS1", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "TX DMIC4", "Digital Mic4", + "TX DMIC4", "MIC BIAS3", + "TX DMIC5", "Digital Mic5", + "TX DMIC5", "MIC BIAS3", + "TX DMIC6", "Digital Mic6", + "TX DMIC6", "MIC BIAS4", + "TX DMIC7", "Digital Mic7", + "TX DMIC7", "MIC BIAS4", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "HAP_IN", "PCM_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC4", "Digital Mic4", + "VA DMIC5", "Digital Mic5", + "VA DMIC6", "Digital Mic6", + "VA DMIC7", "Digital Mic7", + "VA DMIC0", "VA MIC BIAS1", + "VA DMIC1", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1", + "VA DMIC4", "VA MIC BIAS3", + "VA DMIC5", "VA MIC BIAS3", + "VA DMIC6", "VA MIC BIAS4", + "VA DMIC7", "VA MIC BIAS4"; + qcom,cdc-dmic67-gpios = <&cdc_dmic67_gpios>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&swr_haptics>, + <&wsa884x_0220>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "swr-haptics", + "wsa-codec1", "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; + qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; + qcom,tert-mi2s-gpios = <&cdc_tert_mi2s_gpios>; + qcom,quat-mi2s-gpios = <&cdc_quat_mi2s_gpios>; + qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>; + qcom,sen-mi2s-gpios = <&cdc_sen_mi2s_gpios>; + qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; + qcom,usbss-hsj-connect-enabled; +}; diff --git a/sun-audio-mtp-nfc.dts b/sun-audio-mtp-nfc.dts new file mode 100644 index 00000000..2ae836e2 --- /dev/null +++ b/sun-audio-mtp-nfc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-mtp-nfc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP ST54L NFC"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x50008 0>; +}; \ No newline at end of file diff --git a/sun-audio-mtp-nfc.dtsi b/sun-audio-mtp-nfc.dtsi new file mode 100644 index 00000000..f05bf979 --- /dev/null +++ b/sun-audio-mtp-nfc.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-overlay.dtsi" diff --git a/sun-audio-mtp.dts b/sun-audio-mtp.dts new file mode 100644 index 00000000..b4617be3 --- /dev/null +++ b/sun-audio-mtp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-mtp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Sun MTP"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <8 0>; +}; diff --git a/sun-audio-mtp.dtsi b/sun-audio-mtp.dtsi new file mode 100644 index 00000000..ed70fc3d --- /dev/null +++ b/sun-audio-mtp.dtsi @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-overlay.dtsi" + +&lpi_tlmm { + spkr_02_sd_n { + lpi_spkr_02_sd_n_sleep: spkr_02_sd_n_sleep { + mux { + pins = "gpio17"; + function = "gpio"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + lpi_spkr_02_sd_n_active: spkr_02_sd_n_active { + mux { + pins = "gpio17"; + function = "gpio"; + }; + + config { + pins = "gpio17"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; + + spkr_13_sd_n { + lpi_spkr_13_sd_n_sleep: spkr_13_sd_n_sleep { + mux { + pins = "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + lpi_spkr_13_sd_n_active: spkr_13_sd_n_active { + mux { + pins = "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio18"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; +}; + +&wsa_spkr_en02 { + pinctrl-0 = <&lpi_spkr_02_sd_n_active>; + pinctrl-1 = <&lpi_spkr_02_sd_n_sleep>; +}; + +&wsa_spkr_en13 { + pinctrl-0 = <&lpi_spkr_13_sd_n_sleep>; + pinctrl-1 = <&lpi_spkr_13_sd_n_active>; +}; + +&fm_i2s1_gpios { + status = "ok"; +}; + +&sun_snd { + qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&swr_haptics>, + <&wsa883x_0221>, <&wsa883x_0222>; +}; + +&wsa884x_0220 { + status = "disabled"; +}; + +&wsa884x_0221 { + status = "disabled"; +}; + +&wsa884x_2_0220 { + status = "disabled"; +}; + +&wsa884x_2_0221 { + status = "disabled"; +}; + +&swr0 { + wsa883x_0221: wsa883x@02170221 { + compatible = "qcom,wsa883x"; + reg = <0x2 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrLeft"; + }; + + wsa883x_0222: wsa883x@02170222 { + compatible = "qcom,wsa883x"; + reg = <0x2 0x2170222>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrRight"; + }; +}; + +&swr3 { + wsa883x_2_0221: wsa883x@02170221 { + compatible = "qcom,wsa883x_2"; + reg = <0x2 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "Spkr2Left"; + }; + + wsa883x_2_0222: wsa883x@02170222 { + compatible = "qcom,wsa883x"; + reg = <0x2 0x2170222>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "Spkr2Right"; + }; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs= <0>, <0>; +}; + +&wsa2_macro { + qcom,wsa-bat-cfgs= <0>, <0>; +}; diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi new file mode 100644 index 00000000..ae188d76 --- /dev/null +++ b/sun-audio-overlay.dtsi @@ -0,0 +1,765 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include "sun-lpi.dtsi" + +&lpass_cdc { + qcom,num-macros = <4>; + qcom,lpass-cdc-version = <7>; + #address-cells = <1>; + #size-cells = <1>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>, + <0x3004 0x3 0x1>, <0x3080 0x2 0x2>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,wsa_mclk_mode_muxsel = <0x06BEA110>; + clock-names = "tx_core_clk", "rx_core_clk", "wsa_core_clk", + "wsa2_core_clk", "rx_tx_core_clk", + "wsa_tx_core_clk", "wsa2_tx_core_clk", "va_core_clk"; + clocks = <&clock_audio_tx_1 0>, <&clock_audio_rx_1 0>, + <&clock_audio_wsa_1 0>, + <&clock_audio_wsa_2 0>, <&clock_audio_rx_tx 0>, + <&clock_audio_wsa_tx 0>, <&clock_audio_wsa2_tx 0>, + <&clock_audio_va_1 0>; + }; + + va_macro: va-macro@7660000 { + compatible = "qcom,lpass-cdc-va-macro"; + reg = <0x7660000 0x0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,va-dmic-sample-rate = <600000>; + qcom,va-clk-mux-select = <1>; + qcom,default-clk-id = ; + qcom,use-clk-id = ; + qcom,is-used-swr-gpio = <1>; + qcom,va-swr-gpios = <&va_swr_gpios>; + swr2: va_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <3>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0x7630000 0x0>; + interrupts = + , + ; + interrupt-names = "swr_master_irq", "swr_wake_irq"; + qcom,swr-wakeup-required = <1>; + qcom,swr-num-ports = <5>; + qcom,swr-port-mapping = <1 SWRM_TX_PCM_OUT 0x3>, + <2 SWRM_TX1_CH1 0x1>, <2 SWRM_TX1_CH2 0x2>, + <2 SWRM_TX1_CH3 0x4>, <2 SWRM_TX1_CH4 0x8>, + <3 SWRM_TX2_CH1 0x1>, <3 SWRM_TX2_CH2 0x2>, + <3 SWRM_TX2_CH3 0x4>, <3 SWRM_TX2_CH4 0x8>, + <4 SWRM_TX3_CH1 0x1>, <4 SWRM_TX3_CH2 0x2>, + <4 SWRM_TX3_CH3 0x4>, <4 SWRM_TX3_CH4 0x8>, + <5 SWRM_TX_PCM_IN 0x3>; + qcom,swr-num-dev = <5>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-mstr-irq-wakeup-capable = <1>; + qcom,is-always-on = <1>; + wcd939x_tx_slave: wcd939x-tx-slave { + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170223>; + }; + }; + }; + + tx_macro: tx-macro@6AE0000 { + compatible = "qcom,lpass-cdc-tx-macro"; + reg = <0x6AE0000 0x0>; + qcom,default-clk-id = ; + qcom,tx-dmic-sample-rate = <2400000>; + qcom,is-used-swr-gpio = <0>; + }; + + rx_macro: rx-macro@6AC0000 { + compatible = "qcom,lpass-cdc-rx-macro"; + reg = <0x6AC0000 0x0>; + qcom,rx-swr-gpios = <&rx_swr_gpios>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + clock-names = "rx_mclk2_2x_clk"; + clocks = <&clock_audio_rx_mclk2_2x_clk 0>; + swr1: rx_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <2>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0x6ad0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <12>; + qcom,swr-port-mapping = <1 HPH_L 0x1>, + <1 HPH_R 0x2>, <2 CLSH 0x3>, + <3 COMP_L 0x1>, <3 COMP_R 0x2>, + <4 LO 0x1>, <5 DSD_L 0x1>, + <5 DSD_R 0x2>, <6 PCM_OUT1 0x01>, + <7 GPPO 0x03>, <8 HAPT 0x03>, + <9 HIFI_PCM_L 0x01>, <9 HIFI_PCM_R 0x2>, + <10 HPTH 0x03>, <11 CMPT 0x03>, <12 IPCM 0x03>; + qcom,swr-num-dev = <2>; + qcom,swr-clock-stop-mode0 = <1>; + swr_haptics: swr_haptics@f0170220 { + compatible = "qcom,pm8550b-swr-haptics"; + reg = <0x02 0xf0170220>; + // Temporarily commented out to avoid compilation error + // swr-slave-supply = <&hap_swr_slave_reg>; + qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; + }; + + wcd939x_rx_slave: wcd939x-rx-slave { + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170224>; + }; + }; + }; + + wsa_macro: wsa-macro@6B00000 { + compatible = "qcom,lpass-cdc-wsa-macro"; + reg = <0x6B00000 0x0>; + wsa_data_fs_ctl_reg = <0x6B6F000>; + qcom,wsa-swr-gpios = <&wsa_swr_gpios>; + qcom,wsa-bat-cfgs= <1>, <1>; + qcom,wsa-rloads= <2>, <2>; + qcom,wsa-system-gains= <0 9>, <0 9>; + qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + qcom,thermal-max-state = <11>; + qcom,noise-gate-mode = <2>; + #cooling-cells = <2>; + swr0: wsa_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <1>; + qcom,mipi-sdw-block-packing-mode = <0>; + swrm-io-base = <0x6b10000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <13>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-port-mapping = <1 SPKR_L 0x1>, + <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, + <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, + <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, + <8 SPKR_HAPT 0x3>, <9 OCPM 0x3>, + <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, + <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; + qcom,swr-num-dev = <2>; + qcom,dynamic-port-map-supported = <0>; + wsa884x_0220: wsa884x@02170220 { + compatible = "qcom,wsa884x"; + reg = <0x4 0x2170220>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , , , , , + , , , , , , + , , , , , , + , , , , , ; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrLeft"; + }; + + wsa884x_0221: wsa884x@02170221 { + compatible = "qcom,wsa884x"; + reg = <0x4 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , , , , , + , , , , , , + , , , , , , + , , , , , ; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrRight"; + }; + }; + }; + + wsa2_macro: wsa2-macro@6AA0000 { + compatible = "qcom,lpass-cdc-wsa2-macro"; + reg = <0x6AA0000 0x0>; + wsa_data_fs_ctl_reg = <0x6B6F000>; + qcom,wsa2-swr-gpios = <&wsa2_swr_gpios>; + qcom,wsa-bat-cfgs= <1>, <1>; + qcom,wsa-rloads= <2>, <2>; + qcom,wsa-system-gains= <0 9>, <0 9>; + qcom,wsa2-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + qcom,thermal-max-state = <11>; + qcom,noise-gate-mode = <2>; + #cooling-cells = <2>; + status = "disabled"; + swr3: wsa2_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <4>; + qcom,mipi-sdw-block-packing-mode = <0>; + swrm-io-base = <0x6ab0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <13>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-port-mapping = <1 SPKR_L 0x1>, + <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, + <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, + <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, + <8 SPKR_HAPT 0x3>, <9 OCPM 0x3>, + <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, + <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; + qcom,swr-num-dev = <2>; + qcom,dynamic-port-map-supported = <0>; + wsa884x_2_0220: wsa884x@02170220 { + compatible = "qcom,wsa884x_2"; + reg = <0x4 0x2170220>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa2_macro>; + qcom,swr-wsa-port-params = + , , , , , , + , , , , , , + , , , , , , + , , , , , ; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "Spkr2Left"; + }; + + wsa884x_2_0221: wsa884x@02170221 { + compatible = "qcom,wsa884x_2"; + reg = <0x4 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa2_macro>; + qcom,swr-wsa-port-params = + , , , , , , + , , , , , , + , , , , , , + , , , , , ; + cdc-vdd-1p8-supply = <&L15B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "Spkr2Right"; + }; + }; + }; + + wcd939x_codec: wcd939x-codec { + compatible = "qcom,wcd939x-codec"; + qcom,split-codec = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>, <5 HIFI_PCM_L 0x1 0 HIFI_PCM_L>, + <5 HIFI_PCM_R 0x2 0 HIFI_PCM_R>; + + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <0 ADC2 0x2 0 SWRM_TX1_CH2>, + <1 ADC3 0x1 0 SWRM_TX1_CH3>, + <1 ADC4 0x2 0 SWRM_TX1_CH4>, + <2 DMIC0 0x1 0 SWRM_TX2_CH1>, + <2 DMIC1 0x2 0 SWRM_TX2_CH2>, + <2 MBHC 0x4 0 SWRM_TX2_CH3>, + <2 DMIC2 0x4 0 SWRM_TX2_CH3>, + <2 DMIC3 0x8 0 SWRM_TX2_CH4>, + <3 DMIC4 0x1 0 SWRM_TX3_CH1>, + <3 DMIC5 0x2 0 SWRM_TX3_CH2>, + <3 DMIC6 0x4 0 SWRM_TX3_CH3>, + <3 DMIC7 0x8 0 SWRM_TX3_CH4>; + + qcom,swr-tx-port-params = + , , , , + , , , , + , , , , + , , , ; + + qcom,wcd-rst-gpio-node = <&wcd939x_rst_gpio>; + qcom,rx-slave = <&wcd939x_rx_slave>; + qcom,tx-slave = <&wcd939x_tx_slave>; + + cdc-vdd-rx-supply = <&L15B>; + qcom,cdc-vdd-rx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rx-current = <30000>; + qcom,cdc-vdd-rx-lpm-supported = <1>; + + cdc-vdd-tx-supply = <&L15B>; + qcom,cdc-vdd-tx-voltage = <1800000 1800000>; + qcom,cdc-vdd-tx-current = <30000>; + qcom,cdc-vdd-tx-lpm-supported = <1>; + + cdc-vdd-buck-supply = <&L15B>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <650000>; + qcom,cdc-vdd-buck-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB1>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <30000>; + + cdc-vdd-px-supply = <&L2I>; + qcom,cdc-vdd-px-voltage = <1200000 1200000>; + qcom,cdc-vdd-px-current = <5000>; + qcom,cdc-vdd-px-lpm-supported = <1>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + qcom,cdc-micbias4-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rx", + "cdc-vdd-tx", + "cdc-vdd-mic-bias", + "cdc-vdd-px"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck"; + }; + +}; + +&spf_core_platform { + sun_snd: sound { + qcom,model = "sun-mtp-snd-card"; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <1>, <0>, <0>; + qcom,wcn-bt = <1>; + qcom,ext-disp-audio-rx = <1>; + qcom,tdm-max-slots = <8>; + qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,audio-core-list = <0>, <1>; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "HAP_IN", "PCM_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; + qcom,cdc-dmic45-gpios = <&cdc_dmic45_gpios>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&swr_haptics>, + <&wsa884x_0220>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "swr-haptics", + "wsa-codec1", "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; + + /* + * ==================== + * UPD backend - WSA + * ==================== + * + * Mute/Unmute the interpolator + * ------------------------------ + * Register: LPASS_WSA_CDC_RX0_RX_PATH_MIX_CTL - 0x6B00418 + * + * Send control commands to the peripheral from the soundwire controller + * ----------------------------------------------------------------------- + * Register: LPASS_WSA_SWR_MSTR_WSA_SWRM_CPUn_CMD_FIFO_WR_CMD - 0x6B14020 + * + * Enable/Disable ear piece + * -------------------------- + * Register: DIG_CTRL0_PA_FSM_EN - 0x3430 + * + */ + qcom,upd_backends_used = "wsa"; + qcom,upd_lpass_reg_addr = <0x6B00418 0x6B14020>; + qcom,upd_ear_pa_reg_addr = <0x3430>; + + /* + * ==================== + * UPD backend - WCD + * ==================== + * + * Mute/Unmute the interpolator + * ------------------------------ + * Register: LPASS_WCD_CDC_RX0_RX_PATH_MIX_CTL - 0x6AC0418 + * + * Send control commands to the wcd from the soundwire controller + * ---------------------------------------------------------------- + * Register: LPASS_WCD_SWR_MSTR_WSA_SWRM_CPUn_CMD_FIFO_WR_CMD - 0x7634020 + * + * Enable/Disable ear piece + * -------------------------- + * Register: DIG_CTRL0_PA_FSM_EN - 0x300A + * + */ + /* + qcom,upd_backends_used = "wcd"; + qcom,upd_lpass_reg_addr = <0x6AC0418 0x7634020>; + qcom,upd_ear_pa_reg_addr = <0x300A>; + */ + }; + + cdc_pri_mi2s_gpios: pri_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active + &i2s0_sd0_active &i2s0_sd1_active>; + pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep + &i2s0_sd0_sleep &i2s0_sd1_sleep>; + #gpio-cells = <0>; + }; + + fm_i2s1_gpios: fm_i2s1_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&i2s1_sck_active &i2s1_ws_active + &i2s1_sd0_active>; + pinctrl-1 = <&i2s1_sck_sleep &i2s1_ws_sleep + &i2s1_sd0_sleep>; + #gpio-cells = <0>; + }; + + cdc_tert_mi2s_gpios: tert_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s4_sck_active &lpi_i2s4_ws_active + &lpi_i2s4_sd0_active &lpi_i2s4_sd1_active>; + pinctrl-1 = <&lpi_i2s4_sck_sleep &lpi_i2s4_ws_sleep + &lpi_i2s4_sd0_sleep &lpi_i2s4_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <185 187>; + #gpio-cells = <0>; + }; + + cdc_quat_mi2s_gpios: quat_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&quat_mi2s_sck_active &quat_mi2s_ws_active + &quat_mi2s_sd0_active &quat_mi2s_sd1_active + &quat_mi2s_sd2_active &quat_mi2s_sd3_active>; + pinctrl-1 = <&quat_mi2s_sck_sleep &quat_mi2s_ws_sleep + &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep + &quat_mi2s_sd2_sleep &quat_mi2s_sd3_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <166 169>; + #gpio-cells = <0>; + }; + + cdc_quin_mi2s_gpios: quin_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s1_sck_active &lpi_i2s1_ws_active + &lpi_i2s1_sd0_active &lpi_i2s1_sd1_active>; + pinctrl-1 = <&lpi_i2s1_sck_sleep &lpi_i2s1_ws_sleep + &lpi_i2s1_sd0_sleep &lpi_i2s1_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <171 172 174>; + #gpio-cells = <0>; + }; + + cdc_sen_mi2s_gpios: sen_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s2_sck_active &lpi_i2s2_ws_active + &lpi_i2s2_sd0_active &lpi_i2s2_sd1_active>; + pinctrl-1 = <&lpi_i2s2_sck_sleep &lpi_i2s2_ws_sleep + &lpi_i2s2_sd0_sleep &lpi_i2s2_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <176 181>; + #gpio-cells = <0>; + }; + + cdc_sep_mi2s_gpios: sep_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s3_sck_active &lpi_i2s3_ws_active + &lpi_i2s3_sd0_active &lpi_i2s3_sd1_active>; + pinctrl-1 = <&lpi_i2s3_sck_sleep &lpi_i2s3_ws_sleep + &lpi_i2s3_sd0_sleep &lpi_i2s3_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <177 182>; + #gpio-cells = <0>; + }; + + wsa_swr_gpios: wsa_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>; + pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <176>; + #gpio-cells = <0>; + }; + + wsa2_swr_gpios: wsa2_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wsa2_swr_clk_active &wsa2_swr_data_active>; + pinctrl-1 = <&wsa2_swr_clk_sleep &wsa2_swr_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <181>; + #gpio-cells = <0>; + }; + + rx_swr_gpios: rx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active + &rx_swr_data1_active>; + pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep + &rx_swr_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <169>; + #gpio-cells = <0>; + }; + + va_swr_gpios: tx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active + &tx_swr_data1_active &tx_swr_data2_active>; + pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep + &tx_swr_data1_sleep &tx_swr_data2_sleep>; + qcom,lpi-gpios; + qcom,chip-wakeup-reg = <0xf1a6008>; + qcom,chip-wakeup-maskbit = <7>; + qcom,chip-wakeup-default-val = <0x1>; + qcom,tlmm-pins = <166>; + #gpio-cells = <0>; + }; + + cdc_dmic01_gpios: cdc_dmic01_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>; + pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <171 172>; + #gpio-cells = <0>; + }; + + cdc_dmic23_gpios: cdc_dmic23_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>; + pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <174>; + #gpio-cells = <0>; + }; + + cdc_dmic45_gpios: cdc_dmic45_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic45_clk_active &cdc_dmic45_data_active>; + pinctrl-1 = <&cdc_dmic45_clk_sleep &cdc_dmic45_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <177>; + #gpio-cells = <0>; + }; + + cdc_dmic67_gpios: cdc_dmic67_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic67_clk_active &cdc_dmic67_data_active>; + pinctrl-1 = <&cdc_dmic67_clk_sleep &cdc_dmic67_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <182>; + #gpio-cells = <0>; + }; +}; + +&soc { + wsa_spkr_en02: wsa_spkr_en1_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_02_sd_n_active>; + pinctrl-1 = <&spkr_02_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wsa_spkr_en13: wsa_spkr_en2_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_13_sd_n_active>; + pinctrl-1 = <&spkr_13_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wcd939x_rst_gpio: msm_cdc_pinctrl@32 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd939x_reset_active>; + pinctrl-1 = <&wcd939x_reset_sleep>; + }; + + clock_audio_va_1: va_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x307>; + #clock-cells = <1>; + }; + + clock_audio_wsa_1: wsa_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x309>; + #clock-cells = <1>; + }; + + clock_audio_wsa_2: wsa2_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x310>; + #clock-cells = <1>; + }; + + clock_audio_rx_1: rx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <22579200>; + qcom,codec-lpass-clk-id = <0x30E>; + #clock-cells = <1>; + }; + + clock_audio_rx_tx: rx_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x312>; + #clock-cells = <1>; + }; + + clock_audio_tx_1: tx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x30C>; + #clock-cells = <1>; + }; + + clock_audio_wsa_tx: wsa_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x314>; + #clock-cells = <1>; + }; + + clock_audio_wsa2_tx: wsa2_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x316>; + #clock-cells = <1>; + }; + + clock_audio_rx_mclk2_2x_clk: rx_mclk2_2x_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x318>; + #clock-cells = <1>; + }; +}; diff --git a/sun-audio-qrd-sku2.dts b/sun-audio-qrd-sku2.dts new file mode 100644 index 00000000..6644d5ad --- /dev/null +++ b/sun-audio-qrd-sku2.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-qrd-sku2.dtsi" + / { + model = "Qualcomm Technologies, Inc. Sun QRD"; + compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x5000B 0>; +}; diff --git a/sun-audio-qrd-sku2.dtsi b/sun-audio-qrd-sku2.dtsi new file mode 100644 index 00000000..48963182 --- /dev/null +++ b/sun-audio-qrd-sku2.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-qrd.dtsi" + +&sun_snd { + qcom,model = "sun-qrd-sku2-snd-card"; +}; diff --git a/sun-audio-qrd.dts b/sun-audio-qrd.dts new file mode 100644 index 00000000..21e5a102 --- /dev/null +++ b/sun-audio-qrd.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-qrd.dtsi" + / { + model = "Qualcomm Technologies, Inc. Sun QRD"; + compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <11 0>; +}; diff --git a/sun-audio-qrd.dtsi b/sun-audio-qrd.dtsi new file mode 100644 index 00000000..3949ab81 --- /dev/null +++ b/sun-audio-qrd.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-overlay.dtsi" +&tx_swr_clk_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data0_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data1_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data2_active { + config { + drive-strength = <2>; + }; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs = <2>, <2>; +}; + +&wsa2_macro { + qcom,wsa-bat-cfgs = <2>, <2>; +}; + +&wcd939x_codec { + cdc-vdd-px-supply = <&L15B>; + qcom,cdc-vdd-px-voltage = <1800000 1800000>; + qcom,cdc-vdd-px-current = <650000>; + qcom,cdc-vdd-px-lpm-supported = <1>; + /* 0 for digital crosstalk disabled, + * 1 for digital crosstalk with local sensed a-xtalk enabled, and + * 2 for digital crosstalk with remote sensed a-xtalk enabled. + */ + qcom,usbcss-hs-xtalk-config = <2>; + qcom,usbcss-hs-rdson = <600>; + qcom,usbcss-hs-r2 = <7550>; + qcom,usbcss-hs-r3 = <1>; + qcom,usbcss-hs-r4 = <330>; + qcom,usbcss-hs-r5 = <5>; + qcom,usbcss-hs-r6 = <1>; + qcom,usbcss-hs-r7 = <5>; + qcom,usbcss-hs-lin-k-aud = <13>; + qcom,usbcss-hs-lin-k-gnd = <13>; +}; + +&sun_snd { + qcom,model = "sun-qrd-snd-card"; + + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "HAP_IN", "PCM_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK"; + + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,wcd-disable-legacy-surge; +}; diff --git a/sun-audio-rcm.dts b/sun-audio-rcm.dts new file mode 100644 index 00000000..342a8b83 --- /dev/null +++ b/sun-audio-rcm.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-cdp.dtsi" + / { + model = "Qualcomm Technologies, Inc. Sun RCM"; + compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x15 0>; +}; diff --git a/sun-audio-rumi.dts b/sun-audio-rumi.dts new file mode 100644 index 00000000..c885f98e --- /dev/null +++ b/sun-audio-rumi.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-rumi.dtsi" + / { + model = "Qualcomm Technologies, Inc. Sun RUMI"; + compatible = "qcom,sun-rumi", "qcom,sun", "qcom,rumi"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <15 0>; +}; diff --git a/sun-audio-rumi.dtsi b/sun-audio-rumi.dtsi new file mode 100644 index 00000000..b488ac34 --- /dev/null +++ b/sun-audio-rumi.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-overlay.dtsi" + +&sun_snd { + compatible = "qcom,sun-asoc-snd-stub"; + asoc-codec = <&stub_codec>; + asoc-codec-names = "msm-stub-codec.1"; + }; diff --git a/sun-audio.dts b/sun-audio.dts new file mode 100644 index 00000000..2c34213e --- /dev/null +++ b/sun-audio.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "sun-audio.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun"; + compatible = "qcom,sun"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/sun-audio.dtsi b/sun-audio.dtsi new file mode 100644 index 00000000..3bb557ce --- /dev/null +++ b/sun-audio.dtsi @@ -0,0 +1,174 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include "msm-audio-lpass.dtsi" + +&soc { + spf_core_platform: spf_core_platform { + compatible = "qcom,spf-core-platform"; + }; + + lpass_core_hw_vote: vote_lpass_core_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; + + lpass_audio_hw_vote: vote_lpass_audio_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; +}; + +&glink_edge { + audio_gpr: qcom,gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,intents = <0x200 20>; + reg = ; + + spf_core { + compatible = "qcom,spf_core"; + reg = ; + }; + + audio-pkt { + compatible = "qcom,audio-pkt"; + qcom,audiopkt-ch-name = "apr_audio_svc"; + reg = ; + }; + + audio_prm: q6prm { + compatible = "qcom,audio_prm"; + reg = ; + }; + }; +}; + +&spf_core_platform { + + msm_audio_ion: qcom,msm-audio-ion { + compatible = "qcom,msm-audio-ion"; + qcom,smmu-version = <2>; + qcom,smmu-enabled; + iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1061 0x0>; + qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>; + qcom,smmu-sid-mask = /bits/ 64 <0xf>; + dma-coherent; + }; + + msm_audio_ion_cma: qcom,msm-audio-ion-cma { + compatible = "qcom,msm-audio-ion-cma"; + }; + + lpi_tlmm: lpi_pinctrl@6E80000 { + compatible = "qcom,lpi-pinctrl"; + reg = <0x6E80000 0x0>; + qcom,gpios-count = <23>; + qcom,slew-reg = <0x6E80000 0x0>; + gpio-controller; + #gpio-cells = <2>; + qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>, + <0x00002000>, <0x00003000>, + <0x00004000>, <0x00005000>, + <0x00006000>, <0x00007000>, + <0x00008000>, <0x00009000>, + <0x0000A000>, <0x0000B000>, + <0x0000C000>, <0x0000D000>, + <0x0000E000>, <0x0000F000>, + <0x00010000>, <0x00011000>, + <0x00012000>, <0x00013000>, + <0x00014000>, <0x00015000>, + <0x00016000>; + qcom,lpi-slew-offset-tbl = <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>; + + qcom,lpi-slew-base-tbl = <0x6E80000>, <0x6E81000>, + <0x6E82000>, <0x6E83000>, + <0x6E84000>, <0x6E85000>, + <0x6E86000>, <0x6E87000>, + <0x6E88000>, <0x6E89000>, + <0x6E8A000>, <0x6E8B000>, + <0x6E8C000>, <0x6E8D000>, + <0x6E8E000>, <0x6E8F000>, + <0x6E90000>, <0x6E91000>, + <0x6E92000>, <0x6E93000>, + <0x6E94000>, <0x6E95000>, + <0x6E96000>; + + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + }; + + lpass_cdc: lpass-cdc { + compatible = "qcom,lpass-cdc"; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + }; + + va_macro: va-macro@6D44000 { + swr2: va_swr_master { + }; + }; + + tx_macro: tx-macro@6AE0000 { + }; + + rx_macro: rx-macro@6AC0000 { + swr1: rx_swr_master { + }; + }; + + wsa_macro: wsa-macro@6B00000 { + swr0: wsa_swr_master { + }; + }; + + wsa2_macro: wsa2-macro@6AA0000 { + swr3: wsa2_swr_master { + }; + }; + }; + + sun_snd: sound { + compatible = "qcom,sun-asoc-snd"; + qcom,mi2s-audio-intf = <1>; + qcom,tdm-audio-intf = <0>; + qcom,auxpcm-audio-intf = <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,afe-rxtx-lb = <0>; + + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + wcd939x-i2c-handle = <&wcd_usbss>; + }; +}; + +&aliases { + swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@6D44000/va_swr_master"; + swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master"; +}; diff --git a/sun-lpi.dtsi b/sun-lpi.dtsi new file mode 100644 index 00000000..672270e4 --- /dev/null +++ b/sun-lpi.dtsi @@ -0,0 +1,2518 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&lpi_tlmm { + quat_mi2s_sck { + quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sck_active: quat_mi2s_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_ws { + quat_mi2s_ws_sleep: quat_mi2s_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_ws_active: quat_mi2s_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd0 { + quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd0_active: quat_mi2s_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd1 { + quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd1_active: quat_mi2s_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd2 { + quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd2_active: quat_mi2s_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd3 { + quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd3_active: quat_mi2s_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sck { + lpi_i2s1_sck_sleep: lpi_i2s1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sck_active: lpi_i2s1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_ws { + lpi_i2s1_ws_sleep: lpi_i2s1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_ws_active: lpi_i2s1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd0 { + lpi_i2s1_sd0_sleep: lpi_i2s1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sd0_active: lpi_i2s1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd1 { + lpi_i2s1_sd1_sleep: lpi_i2s1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sd1_active: lpi_i2s1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sck { + lpi_i2s2_sck_sleep: lpi_i2s2_sck_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sck_active: lpi_i2s2_sck_active { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_ws { + lpi_i2s2_ws_sleep: lpi_i2s2_ws_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_ws_active: lpi_i2s2_ws_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sd0 { + lpi_i2s2_sd0_sleep: lpi_i2s2_sd0_sleep { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sd0_active: lpi_i2s2_sd0_active { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sd1 { + lpi_i2s2_sd1_sleep: lpi_i2s2_sd1_sleep { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sd1_active: lpi_i2s2_sd1_active { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s3_sck { + lpi_i2s3_sck_sleep: lpi_i2s3_sck_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s3_sck_active: lpi_i2s3_sck_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s3_ws { + lpi_i2s3_ws_sleep: lpi_i2s3_ws_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s3_ws_active: lpi_i2s3_ws_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s3_sd0 { + lpi_i2s3_sd0_sleep: lpi_i2s3_sd0_sleep { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s3_sd0_active: lpi_i2s3_sd0_active { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s3_sd1 { + lpi_i2s3_sd1_sleep: lpi_i2s3_sd1_sleep { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s3_sd1_active: lpi_i2s3_sd1_active { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s4_sck { + lpi_i2s4_sck_sleep: lpi_i2s4_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s4_sck_active: lpi_i2s4_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s4_ws { + lpi_i2s4_ws_sleep: lpi_i2s4_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s4_ws_active: lpi_i2s4_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s4_sd0 { + lpi_i2s4_sd0_sleep: lpi_i2s4_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s4_sd0_active: lpi_i2s4_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s4_sd1 { + lpi_i2s4_sd1_sleep: lpi_i2s4_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s4_sd1_active: lpi_i2s4_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sck { + quat_tdm_sck_sleep: quat_tdm_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sck_active: quat_tdm_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_ws { + quat_tdm_ws_sleep: quat_tdm_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_ws_active: quat_tdm_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd0 { + quat_tdm_sd0_sleep: quat_tdm_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd0_active: quat_tdm_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd1 { + quat_tdm_sd1_sleep: quat_tdm_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd1_active: quat_tdm_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd2 { + quat_tdm_sd2_sleep: quat_tdm_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd2_active: quat_tdm_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd3 { + quat_tdm_sd3_sleep: quat_tdm_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd3_active: quat_tdm_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sck { + lpi_tdm1_sck_sleep: lpi_tdm1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sck_active: lpi_tdm1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_ws { + lpi_tdm1_ws_sleep: lpi_tdm1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_ws_active: lpi_tdm1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sd0 { + lpi_tdm1_sd0_sleep: lpi_tdm1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd0_active: lpi_tdm1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sd1 { + lpi_tdm1_sd1_sleep: lpi_tdm1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd1_active: lpi_tdm1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sck { + lpi_tdm2_sck_sleep: lpi_tdm2_sck_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sck_active: lpi_tdm2_sck_active { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_ws { + lpi_tdm2_ws_sleep: lpi_tdm2_ws_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_ws_active: lpi_tdm2_ws_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd0 { + lpi_tdm2_sd0_sleep: lpi_tdm2_sd0_sleep { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd0_active: lpi_tdm2_sd0_active { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd1 { + lpi_tdm2_sd1_sleep: lpi_tdm2_sd1_sleep { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd1_active: lpi_tdm2_sd1_active { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sck { + lpi_tdm3_sck_sleep: lpi_tdm3_sck_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sck_active: lpi_tdm3_sck_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_ws { + lpi_tdm3_ws_sleep: lpi_tdm3_ws_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_ws_active: lpi_tdm3_ws_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd0 { + lpi_tdm3_sd0_sleep: lpi_tdm3_sd0_sleep { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd0_active: lpi_tdm3_sd0_active { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd1 { + lpi_tdm3_sd1_sleep: lpi_tdm3_sd1_sleep { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd1_active: lpi_tdm3_sd1_active { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm4_sck { + lpi_tdm4_sck_sleep: lpi_tdm4_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm4_sck_active: lpi_tdm4_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm4_ws { + lpi_tdm4_ws_sleep: lpi_tdm4_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm4_ws_active: lpi_tdm4_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm4_sd0 { + lpi_tdm4_sd0_sleep: lpi_tdm4_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm4_sd0_active: lpi_tdm4_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm4_sd1 { + lpi_tdm4_sd1_sleep: lpi_tdm4_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm4_sd1_active: lpi_tdm4_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sck { + quat_aux_sck_sleep: quat_aux_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sck_active: quat_aux_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_ws { + quat_aux_ws_sleep: quat_aux_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_ws_active: quat_aux_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd0 { + quat_aux_sd0_sleep: quat_aux_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd0_active: quat_aux_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd1 { + quat_aux_sd1_sleep: quat_aux_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd1_active: quat_aux_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd2 { + quat_aux_sd2_sleep: quat_aux_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd2_active: quat_aux_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd3 { + quat_aux_sd3_sleep: quat_aux_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd3_active: quat_aux_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sck { + lpi_aux1_sck_sleep: lpi_aux1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sck_active: lpi_aux1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_ws { + lpi_aux1_ws_sleep: lpi_aux1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_ws_active: lpi_aux1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd0 { + lpi_aux1_sd0_sleep: lpi_aux1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd0_active: lpi_aux1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd1 { + lpi_aux1_sd1_sleep: lpi_aux1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd1_active: lpi_aux1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sck { + lpi_aux2_sck_sleep: lpi_aux2_sck_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sck_active: lpi_aux2_sck_active { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_ws { + lpi_aux2_ws_sleep: lpi_aux2_ws_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_ws_active: lpi_aux2_ws_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd0 { + lpi_aux2_sd0_sleep: lpi_aux2_sd0_sleep { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd0_active: lpi_aux2_sd0_active { + mux { + pins = "gpio15"; + function = "func1"; + }; + + config { + pins = "gpio15"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd1 { + lpi_aux2_sd1_sleep: lpi_aux2_sd1_sleep { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd1_active: lpi_aux2_sd1_active { + mux { + pins = "gpio16"; + function = "func1"; + }; + + config { + pins = "gpio16"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sck { + lpi_aux3_sck_sleep: lpi_aux3_sck_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sck_active: lpi_aux3_sck_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_ws { + lpi_aux3_ws_sleep: lpi_aux3_ws_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_ws_active: lpi_aux3_ws_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sd0 { + lpi_aux3_sd0_sleep: lpi_aux3_sd0_sleep { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd0_active: lpi_aux3_sd0_active { + mux { + pins = "gpio17"; + function = "func2"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sd1 { + lpi_aux3_sd1_sleep: lpi_aux3_sd1_sleep { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd1_active: lpi_aux3_sd1_active { + mux { + pins = "gpio18"; + function = "func2"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux4_sck { + lpi_aux4_sck_sleep: lpi_aux4_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux4_sck_active: lpi_aux4_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux4_ws { + lpi_aux4_ws_sleep: lpi_aux4_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux4_ws_active: lpi_aux4_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux4_sd0 { + lpi_aux4_sd0_sleep: lpi_aux4_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux4_sd0_active: lpi_aux4_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux4_sd1 { + lpi_aux4_sd1_sleep: lpi_aux4_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux4_sd1_active: lpi_aux4_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + wsa_swr_clk_pin { + wsa_swr_clk_sleep: wsa_swr_clk_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_clk_active: wsa_swr_clk_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + wsa_swr_data_pin { + wsa_swr_data_sleep: wsa_swr_data_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_data_active: wsa_swr_data_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + + wsa2_swr_clk_pin { + wsa2_swr_clk_sleep: wsa2_swr_clk_sleep { + mux { + pins = "gpio15"; + function = "func2"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa2_swr_clk_active: wsa2_swr_clk_active { + mux { + pins = "gpio15"; + function = "func2"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + wsa2_swr_data_pin { + wsa2_swr_data_sleep: wsa2_swr_data_sleep { + mux { + pins = "gpio16"; + function = "func2"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa2_swr_data_active: wsa2_swr_data_active { + mux { + pins = "gpio16"; + function = "func2"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + + tx_swr_clk_sleep: tx_swr_clk_sleep { + mux { + pins = "gpio0"; + function = "func1"; + input-enable; + bias-pull-down; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + }; + }; + + tx_swr_clk_active: tx_swr_clk_active { + mux { + pins = "gpio0"; + function = "func1"; + }; + + config { + pins = "gpio0"; + drive-strength = <4>; + slew-rate = <1>; + bias-disable; + }; + }; + + tx_swr_data0_sleep: tx_swr_data0_sleep { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; + input-enable; + bias-bus-hold; + }; + }; + + tx_swr_data0_active: tx_swr_data0_active { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data1_sleep: tx_swr_data1_sleep { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + tx_swr_data1_active: tx_swr_data1_active { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data2_sleep: tx_swr_data2_sleep { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio14"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + tx_swr_data2_active: tx_swr_data2_active { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio14"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + rx_swr_clk_sleep: rx_swr_clk_sleep { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_clk_active: rx_swr_clk_active { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + + rx_swr_data_sleep: rx_swr_data_sleep { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_data_active: rx_swr_data_active { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + rx_swr_data1_sleep: rx_swr_data1_sleep { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_data1_active: rx_swr_data1_active { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + cdc_dmic01_clk_active: dmic01_clk_active { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic01_clk_sleep: dmic01_clk_sleep { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic01_data_active: dmic01_data_active { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic01_data_sleep: dmic01_data_sleep { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic23_clk_active: dmic23_clk_active { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic23_clk_sleep: dmic23_clk_sleep { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic23_data_active: dmic23_data_active { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic23_data_sleep: dmic23_data_sleep { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_clk_active: dmic45_clk_active { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic45_clk_sleep: dmic45_clk_sleep { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic45_data_active: dmic45_data_active { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_data_sleep: dmic45_data_sleep { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic67_clk_active: dmic67_clk_active { + mux { + pins = "gpio17"; + function = "func1"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic67_clk_sleep: dmic67_clk_sleep { + mux { + pins = "gpio17"; + function = "func1"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic67_data_active: dmic67_data_active { + mux { + pins = "gpio18"; + function = "func1"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic67_data_sleep: dmic67_data_sleep { + mux { + pins = "gpio18"; + function = "func1"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; +}; From 5eb55c7d61b5f05546f110cdd8db2378d937a54c Mon Sep 17 00:00:00 2001 From: Eric Rosas Date: Thu, 14 Sep 2023 14:23:35 -0700 Subject: [PATCH 003/143] dt-bindings: Fix pineapple formatting error Fix an error in the pineapple audio overlay to allow pineapple compilation on dev-sp. Change-Id: Ib423d797b5b4e31caad3cebc6cc7a45a0772d780 Signed-off-by: Eric Rosas --- pineapple-audio-overlay.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/pineapple-audio-overlay.dtsi b/pineapple-audio-overlay.dtsi index 31167d16..69a1abbe 100644 --- a/pineapple-audio-overlay.dtsi +++ b/pineapple-audio-overlay.dtsi @@ -809,4 +809,4 @@ &adsp_loader { status = "ok"; -} \ No newline at end of file +}; \ No newline at end of file From 98683e4d8b9c49cea23136ed580997c243d575a7 Mon Sep 17 00:00:00 2001 From: Eric Rosas Date: Tue, 19 Sep 2023 20:40:15 -0700 Subject: [PATCH 004/143] dt-bindings: Remove sun compilation Sun DT is not currently compilable without some upstream changes; disable DT until those are made available. Change-Id: I845a97c97ebee1c6ed2249446cdbf754e270663b Signed-off-by: Eric Rosas --- Kbuild | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/Kbuild b/Kbuild index 56c8f1c3..a24dc8ce 100644 --- a/Kbuild +++ b/Kbuild @@ -13,19 +13,6 @@ dtbo-y += pineapple-audio.dtbo \ pineapplep-audio-hdk.dtbo endif -ifeq ($(CONFIG_ARCH_SUN), y) -dtbo-y += sun-audio.dtbo \ - sun-audio-cdp.dtbo \ - sun-audio-cdp-nfc.dtbo \ - sun-audio-rumi.dtbo \ - sun-audio-mtp.dtbo \ - sun-audio-mtp-nfc.dtbo \ - sun-audio-qrd.dtbo \ - sun-audio-qrd-sku2.dtbo \ - sun-audio-atp.dtbo \ - sun-audio-rcm.dtbo -endif - always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo From 1d797f8f54cba11a8c4ba6d8ea1fb9bb279fc227 Mon Sep 17 00:00:00 2001 From: Eric Rosas Date: Thu, 21 Sep 2023 13:47:32 -0700 Subject: [PATCH 005/143] dt-bindings: Disable wcd_usbss node While we are waiting for the QUPV3 dt node to be upstreamed, which the wcd_usbss node depends on, disable the wcd_usbss node to prevent compilation errors. Change-Id: Ib92b4efbfd1214bd6d5eba2af5deb3539f59a55c Signed-off-by: Eric Rosas --- sun-audio.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 3bb557ce..b106cf5f 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -162,7 +162,6 @@ clock-names = "lpass_audio_hw_vote"; clocks = <&lpass_audio_hw_vote 0>; - wcd939x-i2c-handle = <&wcd_usbss>; }; }; From f35c7d335e5863e43f78b1236470f385adbca2c8 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Fri, 22 Sep 2023 20:43:22 +0530 Subject: [PATCH 006/143] ARM: dts: msm: add support for bt swr driver nodes Add support for lpass bt soundwire driver nodes. Signed-off-by: Vangala, Amarnath Change-Id: I69c3091f12c41eb9d7d9ae3716c972ab1d492bb0 --- sun-audio-overlay.dtsi | 52 ++++++++++++++++++++++++++++++++++++ sun-audio.dtsi | 7 +++++ sun-lpi.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 119 insertions(+) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index ae188d76..1eb16b28 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -360,6 +360,33 @@ }; +&lpass_bt_swr { + clock-names = "bt_swr_mclk_clk", "bt_swr_mclk_clk_2x", + "lpass_core_hw_vote", "lpass_audio_hw_vote"; + clocks = <&clock_audio_bt_swr_mclk_clk 0>, <&clock_audio_bt_swr_mclk_clk_2x 0>, + <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,bt-swr-gpios = <&bt_swr_gpios>; + + swr4: bt_swr_mstr { + compatible = "qcom,swr-mstr"; + qcom,swr_master_id = <5>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + swrm-io-base = <0x06CA0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <7>; + qcom,swr-port-mapping = <1 BT_AUDIO_RX1 0x3>, + <2 BT_AUDIO_RX2 0x3>, <3 BT_AUDIO_RX3 0x3>, + <5 BT_AUDIO_TX1 0x3>, <6 BT_AUDIO_TX2 0x3>, + <7 BT_AUDIO_TX3 0x3>, <8 FM_AUDIO_TX1 0x3>; + qcom,swr-num-dev = <1>; + qcom,swr-clock-stop-mode0 = <1>; + }; +}; + &spf_core_platform { sun_snd: sound { qcom,model = "sun-mtp-snd-card"; @@ -665,6 +692,15 @@ qcom,tlmm-pins = <182>; #gpio-cells = <0>; }; + + bt_swr_gpios: bt_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&bt_swr_clk_active &bt_swr_data_active>; + pinctrl-1 = <&bt_swr_clk_sleep &bt_swr_data_sleep>; + qcom,lpi-gpios; + #gpio-cells = <0>; + }; }; &soc { @@ -762,4 +798,20 @@ qcom,codec-lpass-clk-id = <0x318>; #clock-cells = <1>; }; + + clock_audio_bt_swr_mclk_clk: bt_swr_mclk_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <24576000>; + qcom,codec-lpass-clk-id = <0x31A>; + #clock-cells = <1>; + }; + + clock_audio_bt_swr_mclk_clk_2x: bt_swr_mclk_clk_2x { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <24576000>; + qcom,codec-lpass-clk-id = <0x31B>; + #clock-cells = <1>; + }; }; diff --git a/sun-audio.dtsi b/sun-audio.dtsi index b106cf5f..bf8bbbf6 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -151,6 +151,12 @@ }; }; + lpass_bt_swr: lpass_bt_swr@6CA0000 { + compatible = "qcom,lpass-bt-swr"; + swr4: bt_swr_mstr { + }; + }; + sun_snd: sound { compatible = "qcom,sun-asoc-snd"; qcom,mi2s-audio-intf = <1>; @@ -170,4 +176,5 @@ swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@6D44000/va_swr_master"; swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master"; + swr4 = "/soc/spf_core_platform/lpass_bt_swr/bt_swr_mstr"; }; diff --git a/sun-lpi.dtsi b/sun-lpi.dtsi index 672270e4..f19749a9 100644 --- a/sun-lpi.dtsi +++ b/sun-lpi.dtsi @@ -1984,6 +1984,66 @@ }; }; + bt_swr_clk_pin { + bt_swr_clk_sleep: bt_swr_clk_sleep { + mux { + pins = "gpio19"; + function = "func3"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + bt_swr_clk_active: bt_swr_clk_active { + mux { + pins = "gpio19"; + function = "func3"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + bt_swr_data_pin { + bt_swr_data_sleep: bt_swr_data_sleep { + mux { + pins = "gpio20"; + function = "func3"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + bt_swr_data_active: bt_swr_data_active { + mux { + pins = "gpio20"; + function = "func3"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + wsa_swr_clk_pin { wsa_swr_clk_sleep: wsa_swr_clk_sleep { mux { From 38aa674d60034bd073923780919f66e5d8f6cc64 Mon Sep 17 00:00:00 2001 From: Phani Kumar Uppalapati Date: Fri, 27 Oct 2023 11:20:21 -0700 Subject: [PATCH 007/143] ARM: dts: msm: update board ids for sun qrd platform Update board ids for sun qrd platform. Change-Id: I9d08f82a9d14edd995917e641209081a32a47e28 Signed-off-by: Phani Kumar Uppalapati --- sun-audio-qrd-sku2.dts | 2 +- sun-audio-qrd.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sun-audio-qrd-sku2.dts b/sun-audio-qrd-sku2.dts index 6644d5ad..0eb73fc3 100644 --- a/sun-audio-qrd-sku2.dts +++ b/sun-audio-qrd-sku2.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Sun QRD"; compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; qcom,msm-id = <618 0x10000>, <618 0x20000>; - qcom,board-id = <0x5000B 0>; + qcom,board-id = <0x2000B 0>; }; diff --git a/sun-audio-qrd.dts b/sun-audio-qrd.dts index 21e5a102..628cec69 100644 --- a/sun-audio-qrd.dts +++ b/sun-audio-qrd.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Sun QRD"; compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; qcom,msm-id = <618 0x10000>, <618 0x20000>; - qcom,board-id = <11 0>; + qcom,board-id = <0x1000B 0>; }; From f2d2de68b8c4ad056b73f94880fdab65ad5bc016 Mon Sep 17 00:00:00 2001 From: Phani Kumar Uppalapati Date: Mon, 30 Oct 2023 16:52:18 -0700 Subject: [PATCH 008/143] Revert "dt-bindings: Remove sun compilation" This reverts commit 98683e4d8b9c49cea23136ed580997c243d575a7. Change-Id: Ia6f3da36efbb2309eda97e3ce7bea37f03c77f8e Signed-off-by: Phani Kumar Uppalapati --- Kbuild | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Kbuild b/Kbuild index a24dc8ce..56c8f1c3 100644 --- a/Kbuild +++ b/Kbuild @@ -13,6 +13,19 @@ dtbo-y += pineapple-audio.dtbo \ pineapplep-audio-hdk.dtbo endif +ifeq ($(CONFIG_ARCH_SUN), y) +dtbo-y += sun-audio.dtbo \ + sun-audio-cdp.dtbo \ + sun-audio-cdp-nfc.dtbo \ + sun-audio-rumi.dtbo \ + sun-audio-mtp.dtbo \ + sun-audio-mtp-nfc.dtbo \ + sun-audio-qrd.dtbo \ + sun-audio-qrd-sku2.dtbo \ + sun-audio-atp.dtbo \ + sun-audio-rcm.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo From e56152b7a85aff222461474db69a795570250386 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Wed, 1 Nov 2023 18:25:25 +0530 Subject: [PATCH 009/143] audio: dts: Update sound card name for Sun Update sound card name for wsa883x variant. Signed-off-by: Vangala, Amarnath Change-Id: I02825d9e0ccacda27987229384347115c9532713 --- sun-audio-mtp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/sun-audio-mtp.dtsi b/sun-audio-mtp.dtsi index ed70fc3d..8dbdce65 100644 --- a/sun-audio-mtp.dtsi +++ b/sun-audio-mtp.dtsi @@ -82,6 +82,7 @@ }; &sun_snd { + qcom,model = "sun-mtp-wsa883x-snd-card"; qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&swr_haptics>, From 6dc714ceda83d3396049fe0bf52fbddf4e492d48 Mon Sep 17 00:00:00 2001 From: Prasad Kumpatla Date: Fri, 3 Nov 2023 21:55:04 +0530 Subject: [PATCH 010/143] dt: sun: add AATC support on MTP for sun add AATC support on MTP for sun. Change-Id: I3dfd710eff60aa726a64ab937ffcbfd5a43feefc Signed-off-by: Prasad Kumpatla --- sun-audio-mtp.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sun-audio-mtp.dtsi b/sun-audio-mtp.dtsi index 8dbdce65..700aa7a1 100644 --- a/sun-audio-mtp.dtsi +++ b/sun-audio-mtp.dtsi @@ -87,6 +87,11 @@ asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&swr_haptics>, <&wsa883x_0221>, <&wsa883x_0222>; + + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,wcd-disable-legacy-surge; }; &wsa884x_0220 { From 95b43bd66d65baa9341475a18deb2429e59862ff Mon Sep 17 00:00:00 2001 From: Faiz Nabi Kuchay Date: Thu, 9 Nov 2023 18:57:16 +0530 Subject: [PATCH 011/143] ARM: dts: qcom: Disable bt, ext disp and haptics on pineapple Disable bt, ext disp and haptics on pineapple. Change-Id: I66dd781abed765f91c83cd9632bea1fc971f51ad --- pineapple-audio-cdp.dtsi | 1 - pineapple-audio-overlay.dtsi | 8 ++++---- pineapple-audio-qrd.dtsi | 1 - 3 files changed, 4 insertions(+), 6 deletions(-) diff --git a/pineapple-audio-cdp.dtsi b/pineapple-audio-cdp.dtsi index e98cf2c9..a41aac27 100644 --- a/pineapple-audio-cdp.dtsi +++ b/pineapple-audio-cdp.dtsi @@ -99,7 +99,6 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", - "HAP_IN", "PCM_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", diff --git a/pineapple-audio-overlay.dtsi b/pineapple-audio-overlay.dtsi index 69a1abbe..9842d780 100644 --- a/pineapple-audio-overlay.dtsi +++ b/pineapple-audio-overlay.dtsi @@ -165,6 +165,7 @@ reg = <0x02 0xf0170220>; swr-slave-supply = <&hap_swr_slave_reg>; qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; + status = "disabled"; }; wcd939x_rx_slave: wcd939x-rx-slave { @@ -408,8 +409,8 @@ qcom,model = "pineapple-mtp-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; - qcom,wcn-bt = <1>; - qcom,ext-disp-audio-rx = <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; @@ -446,7 +447,6 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", - "HAP_IN", "PCM_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -809,4 +809,4 @@ &adsp_loader { status = "ok"; -}; \ No newline at end of file +}; diff --git a/pineapple-audio-qrd.dtsi b/pineapple-audio-qrd.dtsi index c213da43..23137925 100644 --- a/pineapple-audio-qrd.dtsi +++ b/pineapple-audio-qrd.dtsi @@ -84,7 +84,6 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", - "HAP_IN", "PCM_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", From 654525127fd25e4c2c2639d42d396081d757ebfd Mon Sep 17 00:00:00 2001 From: Kunlei Zhang Date: Mon, 13 Nov 2023 10:05:50 +0800 Subject: [PATCH 012/143] ARM: dts: msm: add new board id support for sun qrd sku1 platform Add new board id support for sun qrd sku1 platform. Change-Id: I470e2ca047de3375e854247f1c450bd73f07a22a Signed-off-by: Kunlei Zhang --- sun-audio-qrd.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio-qrd.dts b/sun-audio-qrd.dts index 628cec69..f21a31a7 100644 --- a/sun-audio-qrd.dts +++ b/sun-audio-qrd.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Sun QRD"; compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; qcom,msm-id = <618 0x10000>, <618 0x20000>; - qcom,board-id = <0x1000B 0>; + qcom,board-id = <0x1000B 0>, <0x3000B 0>; }; From 2699bb4a6a36c1325b60a62cb53da4f1179b49ec Mon Sep 17 00:00:00 2001 From: Rohit kumar Date: Fri, 17 Nov 2023 08:42:27 +0530 Subject: [PATCH 013/143] ARM: dts: qcom:: Update reg_addr for va_macro on sun Fix va_macro address to avoid duplicate sysfs node creation. Change-Id: Id454b61a51f794617fbe061ece65efb87b7b5dd5 Signed-off-by: Rohit kumar Signed-off-by: Prasad Kumpatla --- sun-audio.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index bf8bbbf6..68c10ca0 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -127,7 +127,7 @@ compatible = "qcom,lpass-cdc-clk-rsc-mngr"; }; - va_macro: va-macro@6D44000 { + va_macro: va-macro@7660000 { swr2: va_swr_master { }; }; @@ -174,7 +174,7 @@ &aliases { swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; - swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@6D44000/va_swr_master"; + swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master"; swr4 = "/soc/spf_core_platform/lpass_bt_swr/bt_swr_mstr"; }; From 718c331792c5899d337a02264ab451fab2c8d358 Mon Sep 17 00:00:00 2001 From: Prasad Kumpatla Date: Sat, 18 Nov 2023 22:48:57 +0530 Subject: [PATCH 014/143] ARM: dts: qcom: add wcd_usbss handle support for MTP/QRD on sun add wcd_usbss handle support for MTP/QRD on sun. Change-Id: Ibd0236fa791e4f545e56100523658f0e3558e64f Signed-off-by: Prasad Kumpatla --- sun-audio-mtp.dtsi | 5 +++-- sun-audio-qrd.dtsi | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/sun-audio-mtp.dtsi b/sun-audio-mtp.dtsi index 700aa7a1..96907b57 100644 --- a/sun-audio-mtp.dtsi +++ b/sun-audio-mtp.dtsi @@ -73,8 +73,8 @@ }; &wsa_spkr_en13 { - pinctrl-0 = <&lpi_spkr_13_sd_n_sleep>; - pinctrl-1 = <&lpi_spkr_13_sd_n_active>; + pinctrl-0 = <&lpi_spkr_13_sd_n_active>; + pinctrl-1 = <&lpi_spkr_13_sd_n_sleep>; }; &fm_i2s1_gpios { @@ -92,6 +92,7 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,wcd-disable-legacy-surge; + wcd939x-i2c-handle = <&wcd_usbss>; }; &wsa884x_0220 { diff --git a/sun-audio-qrd.dtsi b/sun-audio-qrd.dtsi index 3949ab81..69a953bb 100644 --- a/sun-audio-qrd.dtsi +++ b/sun-audio-qrd.dtsi @@ -105,4 +105,5 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,wcd-disable-legacy-surge; + wcd939x-i2c-handle = <&wcd_usbss>; }; From c3e8c5716cc01d983cbbb6406140a479a2168704 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Fri, 10 Nov 2023 00:07:20 +0530 Subject: [PATCH 015/143] ARM: dts: qcom: presil changes for sun Correct the GIC Interrupt indices for VA soundwire. Disable BT and Display port entries in dt. Disable haptics. Change-Id: I8b4d1dfe1a6f3a7e2a0f5be921023da83747b66d Signed-off-by: Vangala, Amarnath --- sun-audio-cdp.dtsi | 1 - sun-audio-overlay.dtsi | 32 +++++++++++++++++--------------- sun-audio-qrd.dtsi | 1 - 3 files changed, 17 insertions(+), 17 deletions(-) diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index e467ec4b..48619321 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -83,7 +83,6 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", - "HAP_IN", "PCM_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 1eb16b28..360c3236 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -10,7 +10,7 @@ #include "sun-lpi.dtsi" &lpass_cdc { - qcom,num-macros = <4>; + qcom,num-macros = <5>; qcom,lpass-cdc-version = <7>; #address-cells = <1>; #size-cells = <1>; @@ -53,8 +53,8 @@ qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x7630000 0x0>; interrupts = - , - ; + , + ; interrupt-names = "swr_master_irq", "swr_wake_irq"; qcom,swr-wakeup-required = <1>; qcom,swr-num-ports = <5>; @@ -118,14 +118,6 @@ <10 HPTH 0x03>, <11 CMPT 0x03>, <12 IPCM 0x03>; qcom,swr-num-dev = <2>; qcom,swr-clock-stop-mode0 = <1>; - swr_haptics: swr_haptics@f0170220 { - compatible = "qcom,pm8550b-swr-haptics"; - reg = <0x02 0xf0170220>; - // Temporarily commented out to avoid compilation error - // swr-slave-supply = <&hap_swr_slave_reg>; - qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; - }; - wcd939x_rx_slave: wcd939x-rx-slave { compatible = "qcom,wcd939x-slave"; reg = <0x0E 0x01170224>; @@ -223,7 +215,6 @@ qcom,thermal-max-state = <11>; qcom,noise-gate-mode = <2>; #cooling-cells = <2>; - status = "disabled"; swr3: wsa2_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; @@ -249,6 +240,7 @@ qcom,swr-num-dev = <2>; qcom,dynamic-port-map-supported = <0>; wsa884x_2_0220: wsa884x@02170220 { + status = "disabled"; compatible = "qcom,wsa884x_2"; reg = <0x4 0x2170220>; qcom,spkr-sd-n-node = <&wsa_spkr_en02>; @@ -268,6 +260,7 @@ }; wsa884x_2_0221: wsa884x@02170221 { + status = "disabled"; compatible = "qcom,wsa884x_2"; reg = <0x4 0x2170221>; qcom,spkr-sd-n-node = <&wsa_spkr_en13>; @@ -285,6 +278,15 @@ qcom,cdc-static-supplies = "cdc-vdd-1p8"; sound-name-prefix = "Spkr2Right"; }; + + swr_haptics: swr_haptics@f0170220 { + status = "disabled"; + compatible = "qcom,pm8750b-swr-haptics"; + reg = <0x02 0xf0170220>; + // Temporarily commented out to avoid compilation error + // swr-slave-supply = <&hap_swr_slave_reg>; + qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; + }; }; }; @@ -390,10 +392,11 @@ &spf_core_platform { sun_snd: sound { qcom,model = "sun-mtp-snd-card"; + swr-haptics-unsupported; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <1>, <0>, <0>; - qcom,wcn-bt = <1>; - qcom,ext-disp-audio-rx = <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; @@ -430,7 +433,6 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", - "HAP_IN", "PCM_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", diff --git a/sun-audio-qrd.dtsi b/sun-audio-qrd.dtsi index 3949ab81..09b45943 100644 --- a/sun-audio-qrd.dtsi +++ b/sun-audio-qrd.dtsi @@ -84,7 +84,6 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", - "HAP_IN", "PCM_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", From aa3841a23560d0dfb7e52211314dbac992381f02 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 9 Nov 2023 12:17:58 +0530 Subject: [PATCH 016/143] ARM: dts: qcom: Disable WSA nodes which are not needed on sun WSA nodes are not needed. Change-Id: I9423dd6b5be6033fef8cec133304075c3847fe45 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-mtp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sun-audio-mtp.dtsi b/sun-audio-mtp.dtsi index 700aa7a1..b7fa6bc8 100644 --- a/sun-audio-mtp.dtsi +++ b/sun-audio-mtp.dtsi @@ -147,6 +147,7 @@ qcom,cdc-vdd-1p8-current = <20000>; qcom,cdc-static-supplies = "cdc-vdd-1p8"; sound-name-prefix = "Spkr2Left"; + status = "disabled"; }; wsa883x_2_0222: wsa883x@02170222 { @@ -159,6 +160,7 @@ qcom,cdc-vdd-1p8-current = <20000>; qcom,cdc-static-supplies = "cdc-vdd-1p8"; sound-name-prefix = "Spkr2Right"; + status = "disabled"; }; }; From ad3e19dfca74880df4ee5ead46148ef7456abb7e Mon Sep 17 00:00:00 2001 From: Kunlei Zhang Date: Mon, 13 Nov 2023 10:29:05 +0800 Subject: [PATCH 017/143] ARM: dts: msm: update battery cfg for sun qrd sku2 platform Update battery cfg for sun qrd sku2 platform. Change-Id: Ib991cc2b18939fedd0dcb7bb8b2c979f394445f6 Signed-off-by: Kunlei Zhang --- sun-audio-qrd-sku2.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sun-audio-qrd-sku2.dtsi b/sun-audio-qrd-sku2.dtsi index 48963182..46093e90 100644 --- a/sun-audio-qrd-sku2.dtsi +++ b/sun-audio-qrd-sku2.dtsi @@ -4,6 +4,13 @@ */ #include "sun-audio-qrd.dtsi" +&wsa_macro { + qcom,wsa-bat-cfgs = <1>, <1>; +}; + +&wsa2_macro { + qcom,wsa-bat-cfgs = <1>, <1>; +}; &sun_snd { qcom,model = "sun-qrd-sku2-snd-card"; From 68f515b2936a60961c79e42c4ff4d1bcc244adae Mon Sep 17 00:00:00 2001 From: Prasad Kumpatla Date: Fri, 17 Nov 2023 21:06:36 +0530 Subject: [PATCH 018/143] ARM: dts: qcom: update tlmm register base update tlmm register base. Change-Id: Id51fd0044571a080a3e269c5b50ef27f5c5b715e Signed-off-by: Prasad Kumpatla --- sun-audio.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 68c10ca0..9f881e12 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -66,11 +66,11 @@ compatible = "qcom,msm-audio-ion-cma"; }; - lpi_tlmm: lpi_pinctrl@6E80000 { + lpi_tlmm: lpi_pinctrl@07760000 { compatible = "qcom,lpi-pinctrl"; - reg = <0x6E80000 0x0>; + reg = <0x07760000 0x0>; qcom,gpios-count = <23>; - qcom,slew-reg = <0x6E80000 0x0>; + qcom,slew-reg = <0x07760000 0x0>; gpio-controller; #gpio-cells = <2>; qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>, @@ -98,18 +98,18 @@ <0x0000000B>, <0x0000000B>, <0x0000000B>; - qcom,lpi-slew-base-tbl = <0x6E80000>, <0x6E81000>, - <0x6E82000>, <0x6E83000>, - <0x6E84000>, <0x6E85000>, - <0x6E86000>, <0x6E87000>, - <0x6E88000>, <0x6E89000>, - <0x6E8A000>, <0x6E8B000>, - <0x6E8C000>, <0x6E8D000>, - <0x6E8E000>, <0x6E8F000>, - <0x6E90000>, <0x6E91000>, - <0x6E92000>, <0x6E93000>, - <0x6E94000>, <0x6E95000>, - <0x6E96000>; + qcom,lpi-slew-base-tbl = <0x7760000>, <0x7761000>, + <0x7762000>, <0x7763000>, + <0x7764000>, <0x7765000>, + <0x7766000>, <0x7767000>, + <0x7768000>, <0x7769000>, + <0x776A000>, <0x776B000>, + <0x776C000>, <0x776D000>, + <0x776E000>, <0x776F000>, + <0x7770000>, <0x7771000>, + <0x7772000>, <0x7773000>, + <0x7774000>, <0x7775000>, + <0x7776000>; clock-names = "lpass_core_hw_vote", "lpass_audio_hw_vote"; From e928a060d74127fe655528c244b0f9ba636dd061 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Mon, 20 Nov 2023 03:10:32 +0530 Subject: [PATCH 019/143] ARM: dts: qcom: correction to bt swr alias path Make correction to the lpass_bt_swr node's alias path string. Change-Id: I07310df47cc74739777111bd10d79d676fc7afbb Signed-off-by: Vangala, Amarnath --- sun-audio.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index bf8bbbf6..caffca6c 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -176,5 +176,5 @@ swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@6D44000/va_swr_master"; swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master"; - swr4 = "/soc/spf_core_platform/lpass_bt_swr/bt_swr_mstr"; + swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; }; From 976bf56785fdf05b2201b82b699fdc6083ffb681 Mon Sep 17 00:00:00 2001 From: Rohit kumar Date: Thu, 23 Nov 2023 03:45:21 +0530 Subject: [PATCH 020/143] ARM: dts: qcom: Add msm-id for sunp Add msm-id for sunp platform. Change-Id: Ia2afa2a3d37429b69bba54c13c5117e80f2f28ad Signed-off-by: Rohit kumar --- sun-audio.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio.dts b/sun-audio.dts index 2c34213e..fc743327 100644 --- a/sun-audio.dts +++ b/sun-audio.dts @@ -16,6 +16,6 @@ / { model = "Qualcomm Technologies, Inc. Sun"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0 0>; }; From 00630d0d9d9788932d72f096f99476392f6422ac Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 28 Nov 2023 11:58:17 +0530 Subject: [PATCH 021/143] ARM: dts: qcom: Updating correct MIC_BIAS on sun For DMIC2-3 the MIC_BIAS are not correct which causes mute while capture. So Updating them with correct MIC_BIAS. Change-Id: I02a7dbe800bb9c47cf63a6a0e83977b83c269409 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-cdp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index 48619321..4ed55370 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -69,9 +69,9 @@ "TX DMIC1", "Digital Mic1", "TX DMIC1", "MIC BIAS1", "TX DMIC2", "Digital Mic2", - "TX DMIC2", "MIC BIAS1", + "TX DMIC2", "MIC BIAS3", "TX DMIC3", "Digital Mic3", - "TX DMIC3", "MIC BIAS1", + "TX DMIC3", "MIC BIAS3", "TX DMIC4", "Digital Mic4", "TX DMIC4", "MIC BIAS3", "TX DMIC5", "Digital Mic5", From 6134af51ab329158a05374c4fb12509b7e9eddfb Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 28 Nov 2023 12:18:44 +0530 Subject: [PATCH 022/143] ARM: dts: qcom: Enable BT dailinks for sun platform Set qcom,wcn-bt flag to 1 to enable BTFM related dailinks. Change-Id: I22fa3ef515f335ede1b598ec7900c3270033e163 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-overlay.dtsi | 2 +- sun-audio.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 360c3236..f26f37d0 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -395,7 +395,7 @@ swr-haptics-unsupported; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <1>, <0>, <0>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; diff --git a/sun-audio.dtsi b/sun-audio.dtsi index c52f8ccb..a4be2e58 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -162,7 +162,7 @@ qcom,mi2s-audio-intf = <1>; qcom,tdm-audio-intf = <0>; qcom,auxpcm-audio-intf = <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,afe-rxtx-lb = <0>; From 1198cc3017491ccff59712a6fe5d1ed001c37dd9 Mon Sep 17 00:00:00 2001 From: Sairam Peri Date: Fri, 15 Dec 2023 22:27:39 +0530 Subject: [PATCH 023/143] ARM: dts: qcom: Enable DP audio on sun targets Enable ext-disp-audio-rx in audio DT to support audio over DP. Change-Id: I6c63921fb930941dea8b20b23d956891bbcd81e9 Signed-off-by: Sairam Peri --- sun-audio-overlay.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index f26f37d0..ea1d448b 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -396,7 +396,7 @@ qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <1>, <0>, <0>; qcom,wcn-bt = <1>; - qcom,ext-disp-audio-rx = <0>; + qcom,ext-disp-audio-rx = <1>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; From aa5f297a431206ef7f2b0b2669a7ab12e74b5e6c Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 14 Dec 2023 18:52:55 +0530 Subject: [PATCH 024/143] ARM: dts: msm: Add support for Sun SoC + Hamilton and other platforms Add support for Hamilton in device tree files to support Sun SoC + Hamilton and other platforms. Add support for V8 power grid for Ganges. Change-Id: I74217b782435d474e804e84611d33ffdd6279d10 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 4 +++- sun-audio-atp.dts | 2 +- sun-audio-cdp-nfc.dts | 4 ++-- sun-audio-cdp.dts | 4 ++-- sun-audio-hamilton-cdp.dts | 19 +++++++++++++++++++ ...tp-nfc.dtsi => sun-audio-hamilton-cdp.dtsi | 6 +++++- sun-audio-hamilton-mtp.dts | 19 +++++++++++++++++++ sun-audio-hamilton-mtp.dtsi | 15 +++++++++++++++ sun-audio-mtp-nfc.dts | 10 ++++++---- sun-audio-mtp.dts | 2 +- sun-audio-qrd-sku2.dts | 2 +- sun-audio-qrd.dts | 2 +- sun-audio-rcm.dts | 2 +- sun-audio-rumi.dts | 2 +- 14 files changed, 77 insertions(+), 16 deletions(-) create mode 100644 sun-audio-hamilton-cdp.dts rename sun-audio-mtp-nfc.dtsi => sun-audio-hamilton-cdp.dtsi (54%) create mode 100644 sun-audio-hamilton-mtp.dts create mode 100644 sun-audio-hamilton-mtp.dtsi diff --git a/Kbuild b/Kbuild index 56c8f1c3..69722a73 100644 --- a/Kbuild +++ b/Kbuild @@ -23,7 +23,9 @@ dtbo-y += sun-audio.dtbo \ sun-audio-qrd.dtbo \ sun-audio-qrd-sku2.dtbo \ sun-audio-atp.dtbo \ - sun-audio-rcm.dtbo + sun-audio-rcm.dtbo \ + sun-audio-hamilton-cdp.dtbo \ + sun-audio-hamilton-mtp.dtbo endif always-y := $(dtb-y) $(dtbo-y) diff --git a/sun-audio-atp.dts b/sun-audio-atp.dts index 17bf29ec..b498be6b 100644 --- a/sun-audio-atp.dts +++ b/sun-audio-atp.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Sun ATP"; compatible = "qcom,sun-atp", "qcom,sun", "qcom,atp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0x10021 0>; }; diff --git a/sun-audio-cdp-nfc.dts b/sun-audio-cdp-nfc.dts index b9b0e235..c307a023 100644 --- a/sun-audio-cdp-nfc.dts +++ b/sun-audio-cdp-nfc.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Sun CDP ST54L NFC"; compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0x50001 0>; -}; \ No newline at end of file +}; diff --git a/sun-audio-cdp.dts b/sun-audio-cdp.dts index fab0bb24..65782f6a 100644 --- a/sun-audio-cdp.dts +++ b/sun-audio-cdp.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Sun CDP"; compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; - qcom,board-id = <1 0>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <1 0>, <0x50001 0>; }; diff --git a/sun-audio-hamilton-cdp.dts b/sun-audio-hamilton-cdp.dts new file mode 100644 index 00000000..df15e4bd --- /dev/null +++ b/sun-audio-hamilton-cdp.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +/*This is CDP with Hamilton wlan*/ + +#include "sun-audio-hamilton-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun CDP"; + compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x20001 0>, <0x60001 0>; +}; + diff --git a/sun-audio-mtp-nfc.dtsi b/sun-audio-hamilton-cdp.dtsi similarity index 54% rename from sun-audio-mtp-nfc.dtsi rename to sun-audio-hamilton-cdp.dtsi index f05bf979..bbbe89d8 100644 --- a/sun-audio-mtp-nfc.dtsi +++ b/sun-audio-hamilton-cdp.dtsi @@ -3,4 +3,8 @@ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "sun-audio-overlay.dtsi" +/*This is CDP with Hamilton wlan*/ +#include "sun-audio-cdp.dtsi" +&lpass_bt_swr { + status = "disabled"; +}; diff --git a/sun-audio-hamilton-mtp.dts b/sun-audio-hamilton-mtp.dts new file mode 100644 index 00000000..a4db1f54 --- /dev/null +++ b/sun-audio-hamilton-mtp.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +/*This is MTP with Hamilton + V8/V6 wlan*/ + +#include "sun-audio-hamilton-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP ST54L NFC"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x20008 0>, <0x50008 0>; +}; + diff --git a/sun-audio-hamilton-mtp.dtsi b/sun-audio-hamilton-mtp.dtsi new file mode 100644 index 00000000..87fe4155 --- /dev/null +++ b/sun-audio-hamilton-mtp.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-mtp.dtsi" + +&lpass_bt_swr { + status = "disabled"; +}; + +&sun_snd { + qcom,model = "sun-mtp-wsa883x-snd-card"; +}; + diff --git a/sun-audio-mtp-nfc.dts b/sun-audio-mtp-nfc.dts index 2ae836e2..674406b5 100644 --- a/sun-audio-mtp-nfc.dts +++ b/sun-audio-mtp-nfc.dts @@ -6,11 +6,13 @@ /dts-v1/; /plugin/; -#include "sun-audio-mtp-nfc.dtsi" +/*This is MTP with Ganges wlan w/ v8 Power Grid */ + +#include "sun-audio-mtp.dtsi" / { model = "Qualcomm Technologies, Inc. Sun MTP ST54L NFC"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; - qcom,board-id = <0x50008 0>; -}; \ No newline at end of file + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x30008 0>, <0x40008 0>; +}; diff --git a/sun-audio-mtp.dts b/sun-audio-mtp.dts index b4617be3..323b7b9a 100644 --- a/sun-audio-mtp.dts +++ b/sun-audio-mtp.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <8 0>; }; diff --git a/sun-audio-qrd-sku2.dts b/sun-audio-qrd-sku2.dts index 0eb73fc3..914ec927 100644 --- a/sun-audio-qrd-sku2.dts +++ b/sun-audio-qrd-sku2.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Sun QRD"; compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0x2000B 0>; }; diff --git a/sun-audio-qrd.dts b/sun-audio-qrd.dts index f21a31a7..711a5fad 100644 --- a/sun-audio-qrd.dts +++ b/sun-audio-qrd.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Sun QRD"; compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0x1000B 0>, <0x3000B 0>; }; diff --git a/sun-audio-rcm.dts b/sun-audio-rcm.dts index 342a8b83..76412e1b 100644 --- a/sun-audio-rcm.dts +++ b/sun-audio-rcm.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Sun RCM"; compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0x15 0>; }; diff --git a/sun-audio-rumi.dts b/sun-audio-rumi.dts index c885f98e..2db458a0 100644 --- a/sun-audio-rumi.dts +++ b/sun-audio-rumi.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Sun RUMI"; compatible = "qcom,sun-rumi", "qcom,sun", "qcom,rumi"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <15 0>; }; From 282fe44609e8f019e818dd8b3c5941afc5682065 Mon Sep 17 00:00:00 2001 From: Satish Babu Patakokila Date: Wed, 10 Jan 2024 23:19:28 +0530 Subject: [PATCH 025/143] ARM: dts: qcom: sun: Update glink labels as per upstream Update glink labels as per upstream Change-Id: I6b25e89bc012aecaee714a9d6b8eac706e71bd85 Signed-off-by: Satish Babu Patakokila --- sun-audio.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index a4be2e58..a96e4b4e 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -25,7 +25,7 @@ }; }; -&glink_edge { +&remoteproc_adsp_glink { audio_gpr: qcom,gpr { compatible = "qcom,gpr"; qcom,glink-channels = "adsp_apps"; From 06a66940b7d0536892091c9644c5411f4e074ab0 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Wed, 10 Jan 2024 22:35:25 +0530 Subject: [PATCH 026/143] ARM: dts: qcom: disable clock stop mode for bt soundwire Disable the clk stop mode sequence for BT soundwire master. BT soundwire master doesn't have retention policy and hence clock stop mode cannot be implemented. Also the behaviour is consistent with BT Slimbus implementation with clock stop mode disabled. Change-Id: I2417dcba3c679d44e44f157f4ba8b03d7eeb64e2 Signed-off-by: Vangala, Amarnath --- sun-audio-overlay.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index ea1d448b..ec77ede4 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -385,7 +385,6 @@ <5 BT_AUDIO_TX1 0x3>, <6 BT_AUDIO_TX2 0x3>, <7 BT_AUDIO_TX3 0x3>, <8 FM_AUDIO_TX1 0x3>; qcom,swr-num-dev = <1>; - qcom,swr-clock-stop-mode0 = <1>; }; }; From 9f4fefd6bb7ff7afb4713d1ffb9d0357caa72b07 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Fri, 22 Dec 2023 14:47:55 +0530 Subject: [PATCH 027/143] ARM: dts: msm: add ssr and pdr support for bt soundwire Add support for SSR and PDR for BT soundwire. Change-Id: I731b90589030857ab75895c491940f97c02cf794 Signed-off-by: Vangala, Amarnath --- sun-audio-overlay.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index ec77ede4..cd9cf16b 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -470,7 +470,7 @@ "wsa-codec1", "wsa-codec2"; qcom,wsa-max-devs = <2>; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, - <&lpass_cdc>; + <&lpass_cdc>, <&lpass_bt_swr>; /* * ==================== From ecafa819c24ebdcc13b3c128afd5a4ea91b7b08c Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Mon, 29 Jan 2024 19:15:05 +0530 Subject: [PATCH 028/143] ARM: dts: qcom: sun: update mic bias for sun mtp Update mic bias for Sun MTP reworked hardware. Change-Id: I079ad6d2b79b4f278df2f5625e6ed756a4fcc0d2 Signed-off-by: Vangala, Amarnath --- sun-audio-overlay.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index ec77ede4..865e68b7 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -422,11 +422,11 @@ "VA AMIC5", "Analog Mic5", "VA AMIC5", "VA MIC BIAS4", "TX DMIC0", "Digital Mic0", - "TX DMIC0", "MIC BIAS3", + "TX DMIC0", "MIC BIAS1", "TX DMIC1", "Digital Mic1", "TX DMIC1", "MIC BIAS3", "TX DMIC2", "Digital Mic2", - "TX DMIC2", "MIC BIAS1", + "TX DMIC2", "MIC BIAS3", "TX DMIC3", "Digital Mic3", "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", @@ -451,9 +451,9 @@ "VA DMIC1", "Digital Mic1", "VA DMIC2", "Digital Mic2", "VA DMIC3", "Digital Mic3", - "VA DMIC0", "VA MIC BIAS3", + "VA DMIC0", "VA MIC BIAS1", "VA DMIC1", "VA MIC BIAS3", - "VA DMIC2", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS3", "VA DMIC3", "VA MIC BIAS1"; qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; From 183a4a76626bb90fa55ad21be012a5acebfa14b0 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 25 Jan 2024 15:32:36 +0530 Subject: [PATCH 029/143] ARM: dts: msm: Add support for Sun SoC ATP Power Support for SUN ATP variant V8. Change-Id: Iaef2eef0889ee04eb975a8d4465c5bfb2064bccd Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-atp.dts | 5 +-- sun-audio-atp.dtsi | 76 ++++------------------------------------------ 2 files changed, 9 insertions(+), 72 deletions(-) diff --git a/sun-audio-atp.dts b/sun-audio-atp.dts index b498be6b..575dbb4a 100644 --- a/sun-audio-atp.dts +++ b/sun-audio-atp.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -9,7 +9,8 @@ #include "sun-audio-atp.dtsi" / { model = "Qualcomm Technologies, Inc. Sun ATP"; - compatible = "qcom,sun-atp", "qcom,sun", "qcom,atp"; + compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp", + "qcom,atp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0x10021 0>; }; diff --git a/sun-audio-atp.dtsi b/sun-audio-atp.dtsi index 5d5ca97b..bcbfa830 100644 --- a/sun-audio-atp.dtsi +++ b/sun-audio-atp.dtsi @@ -1,77 +1,9 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "sun-audio-mtp.dtsi" - -&swr_haptics { - status = "disabled"; -}; - -&sun_snd { - asoc-codec = <&stub_codec>, <&lpass_cdc>, - <&wcd939x_codec>, <&wsa884x_0220>, - <&wsa884x_0221>; - asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec1", "wsa-codec2"; - swr-haptics-unsupported; - qcom,audio-routing = - "AMIC1", "Analog Mic1", - "AMIC1", "MIC BIAS1", - "AMIC2", "Analog Mic2", - "AMIC2", "MIC BIAS2", - "AMIC3", "Analog Mic3", - "AMIC3", "MIC BIAS3", - "AMIC4", "Analog Mic4", - "AMIC4", "MIC BIAS3", - "AMIC5", "Analog Mic5", - "AMIC5", "MIC BIAS4", - "VA AMIC1", "Analog Mic1", - "VA AMIC1", "VA MIC BIAS1", - "VA AMIC2", "Analog Mic2", - "VA AMIC2", "VA MIC BIAS2", - "VA AMIC3", "Analog Mic3", - "VA AMIC3", "VA MIC BIAS3", - "VA AMIC4", "Analog Mic4", - "VA AMIC4", "VA MIC BIAS3", - "VA AMIC5", "Analog Mic5", - "VA AMIC5", "VA MIC BIAS4", - "TX DMIC0", "Digital Mic0", - "TX DMIC0", "MIC BIAS3", - "TX DMIC1", "Digital Mic1", - "TX DMIC1", "MIC BIAS3", - "TX DMIC2", "Digital Mic2", - "TX DMIC2", "MIC BIAS1", - "TX DMIC3", "Digital Mic3", - "TX DMIC3", "MIC BIAS1", - "IN1_HPHL", "HPHL_OUT", - "IN2_HPHR", "HPHR_OUT", - "IN3_EAR", "AUX_OUT", - "WSA SRC0_INP", "SRC0", - "WSA_TX DEC0_INP", "TX DEC0 MUX", - "WSA_TX DEC1_INP", "TX DEC1 MUX", - "RX_TX DEC0_INP", "TX DEC0 MUX", - "RX_TX DEC1_INP", "TX DEC1 MUX", - "RX_TX DEC2_INP", "TX DEC2 MUX", - "RX_TX DEC3_INP", "TX DEC3 MUX", - "SpkrLeft IN", "WSA_SPK1 OUT", - "SpkrRight IN", "WSA_SPK2 OUT", - "TX SWR_INPUT", "WCD_TX_OUTPUT", - "VA SWR_INPUT", "VA_SWR_CLK", - "VA SWR_INPUT", "WCD_TX_OUTPUT", - "VA_AIF1 CAP", "VA_SWR_CLK", - "VA_AIF2 CAP", "VA_SWR_CLK", - "VA_AIF3 CAP", "VA_SWR_CLK", - "VA DMIC0", "Digital Mic0", - "VA DMIC1", "Digital Mic1", - "VA DMIC2", "Digital Mic2", - "VA DMIC3", "Digital Mic3", - "VA DMIC0", "VA MIC BIAS3", - "VA DMIC1", "VA MIC BIAS3", - "VA DMIC2", "VA MIC BIAS1", - "VA DMIC3", "VA MIC BIAS1"; -}; +#include "sun-audio-cdp.dtsi" &wsa_macro { qcom,wsa-bat-cfgs= <4>, <4>; @@ -80,3 +12,7 @@ &wsa2_macro { qcom,wsa-bat-cfgs= <4>, <4>; }; + +&swr_haptics { + status = "disabled"; +}; From fad4269bdac0d9d49bd126197052fefd4628356b Mon Sep 17 00:00:00 2001 From: Anjelique Melendez Date: Wed, 15 Nov 2023 11:18:36 -0800 Subject: [PATCH 030/143] ARM: dts: msm: Update SWR haptics device-ID for Sun Update the SWR haptics device ID for Sun boards. Change-Id: I8cc38e669e3260c63027954d64ca696528f7bdf8 Signed-off-by: Anjelique Melendez --- sun-audio-overlay.dtsi | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index c87c1a12..6766af98 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -281,10 +281,9 @@ swr_haptics: swr_haptics@f0170220 { status = "disabled"; - compatible = "qcom,pm8750b-swr-haptics"; - reg = <0x02 0xf0170220>; - // Temporarily commented out to avoid compilation error - // swr-slave-supply = <&hap_swr_slave_reg>; + compatible = "qcom,pmih010x-swr-haptics"; + reg = <0x03 0xf0170220>; + swr-slave-supply = <&hap_swr_slave_reg>; qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; }; }; From addae2b4d33fadb50ba2ab67c142ee4f2fe8ede7 Mon Sep 17 00:00:00 2001 From: Deepali Jindal Date: Thu, 7 Dec 2023 19:28:37 +0530 Subject: [PATCH 031/143] ARM: dts: msm: Add support for SWR Haptics through WSA for Sun Add changes to support swr haptics connected to WSA macro. Change-Id: Iddb4fd17f86fb60a48c6828fc004b83ae6787d96 Signed-off-by: Deepali Jindal --- sun-audio-overlay.dtsi | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 6766af98..bb2dc6a5 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -116,7 +116,11 @@ <7 GPPO 0x03>, <8 HAPT 0x03>, <9 HIFI_PCM_L 0x01>, <9 HIFI_PCM_R 0x2>, <10 HPTH 0x03>, <11 CMPT 0x03>, <12 IPCM 0x03>; - qcom,swr-num-dev = <2>; + + /* num-dev is 2 if WCD RX and PMIC SWR Slaves are connected */ + /* num-dev is 1 if only WCD RX slave is connected */ + qcom,swr-num-dev = <1>; + qcom,swr-clock-stop-mode0 = <1>; wcd939x_rx_slave: wcd939x-rx-slave { compatible = "qcom,wcd939x-slave"; @@ -234,10 +238,10 @@ <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, - <8 SPKR_HAPT 0x3>, <9 OCPM 0x3>, + <8 SPKR_HAPT 0x1>, <9 OCPM 0x3>, <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; - qcom,swr-num-dev = <2>; + qcom,swr-num-dev = <3>; qcom,dynamic-port-map-supported = <0>; wsa884x_2_0220: wsa884x@02170220 { status = "disabled"; @@ -280,11 +284,10 @@ }; swr_haptics: swr_haptics@f0170220 { - status = "disabled"; compatible = "qcom,pmih010x-swr-haptics"; reg = <0x03 0xf0170220>; swr-slave-supply = <&hap_swr_slave_reg>; - qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; + qcom,rx_swr_ch_map = <0 0x01 0x01 0 SPKR_HAPT>; }; }; }; @@ -390,7 +393,6 @@ &spf_core_platform { sun_snd: sound { qcom,model = "sun-mtp-snd-card"; - swr-haptics-unsupported; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <1>, <0>, <0>; qcom,wcn-bt = <1>; @@ -431,6 +433,7 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", + "HAP_IN", "WSA_HAPT OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", From 36ebcc2dce7d5f9dd606361dee030d6938972c00 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Mon, 12 Feb 2024 20:52:08 +0530 Subject: [PATCH 032/143] ARM: dts: qcom: sun: update headset threshold voltage Update the headset threshold voltage for sun platform. Change-Id: I034c1a08615663fd712d4eccfe6311256f37a1bb Signed-off-by: Vangala, Amarnath --- sun-audio-cdp.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index 4ed55370..b25f4300 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -130,4 +130,5 @@ qcom,sen-mi2s-gpios = <&cdc_sen_mi2s_gpios>; qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; qcom,usbss-hsj-connect-enabled; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; }; From c746b5d124436643a69958c9adfab4aed3043c0f Mon Sep 17 00:00:00 2001 From: Faiz Nabi Kuchay Date: Tue, 13 Feb 2024 21:02:59 +0530 Subject: [PATCH 033/143] ARM: dts: qcom: Add base dt files for sun MTP with QMP Add audio platform support for sun mtp with qmp. Change-Id: I204cbd549797635ffd549f317da9828af39d90b0 Signed-off-by: Faiz Nabi Kuchay --- sun-audio-mtp-qmp.dts | 15 +++++ sun-audio-mtp-qmp.dtsi | 131 +++++++++++++++++++++++++++++++++++++++++ sun-audio-overlay.dtsi | 16 +++++ 3 files changed, 162 insertions(+) create mode 100644 sun-audio-mtp-qmp.dts create mode 100644 sun-audio-mtp-qmp.dtsi diff --git a/sun-audio-mtp-qmp.dts b/sun-audio-mtp-qmp.dts new file mode 100644 index 00000000..d3a66557 --- /dev/null +++ b/sun-audio-mtp-qmp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-mtp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Sun MTP"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <8 0>; +}; diff --git a/sun-audio-mtp-qmp.dtsi b/sun-audio-mtp-qmp.dtsi new file mode 100644 index 00000000..2a548e31 --- /dev/null +++ b/sun-audio-mtp-qmp.dtsi @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-mtp.dtsi" + +&swr2 { + qmp01: qmp@04170232 { + /* + * reg = ; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC01"; + qcom,codec-name = "qmp-dmic.01"; + qmp-vdd-supply = <&wcd_mb3_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + }; + + qmp02: qmp@04170236 { + reg = <0x0100 0x04170236>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC02"; + qcom,codec-name = "qmp-dmic.02"; + qmp-vdd-supply = <&wcd_mb3_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + }; + + qmp03: qmp@04170230 { + reg = <0x0100 0x04170230>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC03 "; + qcom,codec-name = "qmp-dmic.03"; + qmp-vdd-supply = <&wcd_mb1_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + }; + + qmp04: qmp@04170239 { + reg = <0x0100 0x04170239>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC04"; + qcom,codec-name = "qmp-dmic.04"; + qmp-vdd-supply = <&wcd_mb1_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + }; +}; + +&sun_snd { + qcom,model = "sun-mtp-wsa883x-qmp-snd-card"; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS1", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS3", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "TX SWR_INPUT", "QMP_MIC01 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC02 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC03 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC04 NORMAL_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 LP_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; +}; diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 1eb16b28..1c491b69 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -356,6 +356,22 @@ "cdc-vdd-mic-bias", "cdc-vdd-px"; qcom,cdc-on-demand-supplies = "cdc-vdd-buck"; + + wcd_mb1_reg: qcom,wcd-mb1-reg { + regulator-name = "wcd-mb1-reg"; + }; + + wcd_mb2_reg: qcom,wcd-mb2-reg { + regulator-name = "wcd-mb2-reg"; + }; + + wcd_mb3_reg: qcom,wcd-mb3-reg { + regulator-name = "wcd-mb3-reg"; + }; + + wcd_mb4_reg: qcom,wcd-mb4-reg { + regulator-name = "wcd-mb4-reg"; + }; }; }; From c609eb22e019e1ba93379ad13af689038f4955a5 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 20 Feb 2024 09:16:19 +0530 Subject: [PATCH 034/143] ARM: dts: qcom: Disable haptics for cdp variants Disable haptics on all cdp variants. Change-Id: I9761681b2984aceb208c58a872877a18225c0eb3 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-cdp.dtsi | 4 ++++ sun-audio-hamilton-cdp.dtsi | 2 +- sun-audio-rumi.dtsi | 7 ++++++- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index b25f4300..e76cd14a 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -40,9 +40,13 @@ &cdc_sep_mi2s_gpios { status = "disabled"; }; +&swr_haptics { + status = "disabled"; +}; &sun_snd { qcom,model = "sun-cdp-snd-card"; + swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", diff --git a/sun-audio-hamilton-cdp.dtsi b/sun-audio-hamilton-cdp.dtsi index bbbe89d8..f903de43 100644 --- a/sun-audio-hamilton-cdp.dtsi +++ b/sun-audio-hamilton-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /*This is CDP with Hamilton wlan*/ diff --git a/sun-audio-rumi.dtsi b/sun-audio-rumi.dtsi index b488ac34..474cd810 100644 --- a/sun-audio-rumi.dtsi +++ b/sun-audio-rumi.dtsi @@ -1,10 +1,15 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" +&swr_haptics { + status = "disabled"; +}; + + &sun_snd { compatible = "qcom,sun-asoc-snd-stub"; asoc-codec = <&stub_codec>; From 75762454566b19ae80ce7d852871c3707124966b Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Fri, 9 Feb 2024 16:41:22 +0530 Subject: [PATCH 035/143] ARM: dts: qcom: sun: new board IDs for sun Add new board IDs for sun. Change-Id: I1bb14373a176f8581864609d745c8810da29d6a3 Signed-off-by: Vangala, Amarnath --- Kbuild | 1 + sun-audio-hamilton-rcm.dts | 15 +++++++++++++++ sun-audio-rcm.dts | 2 +- 3 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 sun-audio-hamilton-rcm.dts diff --git a/Kbuild b/Kbuild index 69722a73..d8962c76 100644 --- a/Kbuild +++ b/Kbuild @@ -24,6 +24,7 @@ dtbo-y += sun-audio.dtbo \ sun-audio-qrd-sku2.dtbo \ sun-audio-atp.dtbo \ sun-audio-rcm.dtbo \ + sun-audio-hamilton-rcm.dtbo \ sun-audio-hamilton-cdp.dtbo \ sun-audio-hamilton-mtp.dtbo endif diff --git a/sun-audio-hamilton-rcm.dts b/sun-audio-hamilton-rcm.dts new file mode 100644 index 00000000..c1de3779 --- /dev/null +++ b/sun-audio-hamilton-rcm.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-hamilton-cdp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Sun RCM"; + compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x20015 0>, <0x40015 0>; +}; diff --git a/sun-audio-rcm.dts b/sun-audio-rcm.dts index 76412e1b..e7841ce8 100644 --- a/sun-audio-rcm.dts +++ b/sun-audio-rcm.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Sun RCM"; compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; - qcom,board-id = <0x15 0>; + qcom,board-id = <0x15 0>, <0x30015 0>; }; From 98cab652ca4821934cb81ff15f34b707b5b089c3 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 20 Feb 2024 09:16:19 +0530 Subject: [PATCH 036/143] ARM: dt-bindings: Disable haptics for cdp variants Disable haptics on all cdp variants. Change-Id: I9761681b2984aceb208c58a872877a18225c0eb3 Signed-off-by: Ravulapati Vishnu Vardhan Rao Signed-off-by: Bruce Levy --- sun-audio-cdp.dtsi | 4 ++++ sun-audio-hamilton-cdp.dtsi | 2 +- sun-audio-rumi.dtsi | 5 ++++- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index b25f4300..e76cd14a 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -40,9 +40,13 @@ &cdc_sep_mi2s_gpios { status = "disabled"; }; +&swr_haptics { + status = "disabled"; +}; &sun_snd { qcom,model = "sun-cdp-snd-card"; + swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", diff --git a/sun-audio-hamilton-cdp.dtsi b/sun-audio-hamilton-cdp.dtsi index bbbe89d8..f903de43 100644 --- a/sun-audio-hamilton-cdp.dtsi +++ b/sun-audio-hamilton-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /*This is CDP with Hamilton wlan*/ diff --git a/sun-audio-rumi.dtsi b/sun-audio-rumi.dtsi index b488ac34..093dfa8b 100644 --- a/sun-audio-rumi.dtsi +++ b/sun-audio-rumi.dtsi @@ -1,10 +1,13 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" +&swr_haptics { + status = "disabled"; +}; &sun_snd { compatible = "qcom,sun-asoc-snd-stub"; asoc-codec = <&stub_codec>; From fca4f8125c0714e08cf4f2dae20e914438ccb68a Mon Sep 17 00:00:00 2001 From: Anand Mohan Date: Fri, 22 Dec 2023 12:51:08 +0530 Subject: [PATCH 037/143] ARM: dts: qcom: sun: SMMU CB sharing across LPASS and WCNSS device tree entry to enable use of shared iommu group with WLAN for XPAN. Change-Id: Ib63d95b9e7081ffd43bbb124497b97722285fd67 Signed-off-by: Anand Mohan --- sun-audio.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index a96e4b4e..50e77c5b 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -57,9 +57,15 @@ qcom,smmu-version = <2>; qcom,smmu-enabled; iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1061 0x0>; - qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>; + memory-region = <&audio_cnss_resv_region>; + qcom,iommu-group = <&cnss_audio_iommu_group0>; qcom,smmu-sid-mask = /bits/ 64 <0xf>; dma-coherent; + + audio_cnss_resv_region: audio_cnss_resv_region { + iommu-addresses = <&msm_audio_ion 0x00000000 0x88000000>, + <&msm_audio_ion 0xb0000000 0x50000000>; + }; }; msm_audio_ion_cma: qcom,msm-audio-ion-cma { From 19fa34f7d268428eb5b9c3530bd79da01df1c7db Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Fri, 23 Feb 2024 22:22:35 +0530 Subject: [PATCH 038/143] ARM: dts: qcom: sun: new board ID for 3.5mm headset Add new board ID for 3.5mm Headset for Sun. Change-Id: I9c14efa77c8a616947b0c96b7eb9870d0e0b22a1 Signed-off-by: Vangala, Amarnath --- Kbuild | 1 + sun-audio-mtp-3.5mm.dts | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 sun-audio-mtp-3.5mm.dts diff --git a/Kbuild b/Kbuild index d8962c76..ec9f9945 100644 --- a/Kbuild +++ b/Kbuild @@ -19,6 +19,7 @@ dtbo-y += sun-audio.dtbo \ sun-audio-cdp-nfc.dtbo \ sun-audio-rumi.dtbo \ sun-audio-mtp.dtbo \ + sun-audio-mtp-3.5mm.dtbo \ sun-audio-mtp-nfc.dtbo \ sun-audio-qrd.dtbo \ sun-audio-qrd-sku2.dtbo \ diff --git a/sun-audio-mtp-3.5mm.dts b/sun-audio-mtp-3.5mm.dts new file mode 100644 index 00000000..8148cf7a --- /dev/null +++ b/sun-audio-mtp-3.5mm.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +/*This is MTP with 3.5mm HS. */ + +#include "sun-audio-mtp.dtsi" + +&sun_snd { + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; +}; + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP with 3.5mm"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x60008 0>; +}; From 5be482ab3e0f3ea05b66a3a44c18ec05107b402c Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 28 Feb 2024 12:38:29 +0530 Subject: [PATCH 039/143] ARM: dts: qcom: Add support for sun MTP with QMP Add Audio devicetree support for sun MTP with QMP. Add routes for QMP to TX and VA Macro widgets. Change-Id: I4741d8ba21a22162f9e513c84f8c544339b66c74 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-mtp-qmp.dts | 11 ++++++----- sun-audio-mtp-qmp.dtsi | 41 ++++++++++++++++++++++++++++------------- 2 files changed, 34 insertions(+), 18 deletions(-) diff --git a/sun-audio-mtp-qmp.dts b/sun-audio-mtp-qmp.dts index d3a66557..6bd0e533 100644 --- a/sun-audio-mtp-qmp.dts +++ b/sun-audio-mtp-qmp.dts @@ -1,15 +1,16 @@ // SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; /plugin/; -#include "sun-audio-mtp.dtsi" +#include "sun-audio-mtp-qmp.dtsi" / { - model = "Qualcomm Technologies, Inc. Sun MTP"; - compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; - qcom,board-id = <8 0>; + model = "Qualcomm Technologies, Inc. Sun MTP QMP1000"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp", "qcom,sunp-mtp", "qcom,sunp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x10108 0>, <0x40108 0>; }; diff --git a/sun-audio-mtp-qmp.dtsi b/sun-audio-mtp-qmp.dtsi index 2a548e31..1c2894c5 100644 --- a/sun-audio-mtp-qmp.dtsi +++ b/sun-audio-mtp-qmp.dtsi @@ -30,23 +30,23 @@ qcom,codec-name = "qmp-dmic.02"; qmp-vdd-supply = <&wcd_mb3_reg>; qcom,swr-tx-port-params = - , , - , , - , , - , ; + , , + , , + , , + , ; }; qmp03: qmp@04170230 { reg = <0x0100 0x04170230>; compatible = "qcom,qmp-sdca-dmic"; - sound-name-prefix = "QMP_MIC03 "; + sound-name-prefix = "QMP_MIC03"; qcom,codec-name = "qmp-dmic.03"; qmp-vdd-supply = <&wcd_mb1_reg>; qcom,swr-tx-port-params = - , , - , , - , , - , ; + , , + , , + , , + , ; }; qmp04: qmp@04170239 { @@ -56,15 +56,26 @@ qcom,codec-name = "qmp-dmic.04"; qmp-vdd-supply = <&wcd_mb1_reg>; qcom,swr-tx-port-params = - , , - , , - , , - , ; + , , + , , + , , + , ; }; }; &sun_snd { qcom,model = "sun-mtp-wsa883x-qmp-snd-card"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&swr_haptics>, + <&wsa883x_0221>, <&wsa883x_0222>, + <&qmp01>, <&qmp02>, + <&qmp03>, <&qmp04>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "swr-haptics", + "wsa-codec1", "wsa-codec2", + "qmp-dmic.01", "qmp-dmic.02", + "qmp-dmic.03", "qmp-dmic.04"; + qcom,qmp-mic = <1>; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", @@ -117,6 +128,10 @@ "VA SWR_INPUT", "QMP_MIC02 LP_OUTPUT", "VA SWR_INPUT", "QMP_MIC03 LP_OUTPUT", "VA SWR_INPUT", "QMP_MIC04 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 NORMAL_OUTPUT", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK", From 55c66550b6ad7de54cd430b59c713f4c91e7952e Mon Sep 17 00:00:00 2001 From: Phani Kumar Uppalapati Date: Thu, 7 Mar 2024 14:41:45 -0800 Subject: [PATCH 040/143] ARM: dts: qcom: update routing for QMP VA normal path Update QMP VA normal routing to VA soundwire to enable VA use-case from normal path. Change-Id: Ic29d99eefe65a90bf04fb38f88a29b8accb37e46 Signed-off-by: Phani Kumar Uppalapati --- sun-audio-mtp-qmp.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sun-audio-mtp-qmp.dtsi b/sun-audio-mtp-qmp.dtsi index 1c2894c5..44121ea9 100644 --- a/sun-audio-mtp-qmp.dtsi +++ b/sun-audio-mtp-qmp.dtsi @@ -128,10 +128,10 @@ "VA SWR_INPUT", "QMP_MIC02 LP_OUTPUT", "VA SWR_INPUT", "QMP_MIC03 LP_OUTPUT", "VA SWR_INPUT", "QMP_MIC04 LP_OUTPUT", - "VA SWR_INPUT", "QMP_MIC01 NORMAL_OUTPUT", - "VA SWR_INPUT", "QMP_MIC02 NORMAL_OUTPUT", - "VA SWR_INPUT", "QMP_MIC03 NORMAL_OUTPUT", - "VA SWR_INPUT", "QMP_MIC04 NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 VA_NORMAL_OUTPUT", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK", From a92abffab54c462f59678f1c054d7b91cb23f210 Mon Sep 17 00:00:00 2001 From: Faiz Nabi Kuchay Date: Tue, 12 Mar 2024 16:56:53 +0530 Subject: [PATCH 041/143] ARM: dts: qcom: Enable compilation for Sun MTP with qmp attach Enable compilation for Sun MTP with qmp attach. Use proper snd-card name. Change-Id: Ied5f977985d7e8c3ccfbfa7383bc43c9252beafa Signed-off-by: Faiz Nabi Kuchay --- Kbuild | 1 + sun-audio-mtp-qmp.dtsi | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/Kbuild b/Kbuild index ec9f9945..5ee885bb 100644 --- a/Kbuild +++ b/Kbuild @@ -21,6 +21,7 @@ dtbo-y += sun-audio.dtbo \ sun-audio-mtp.dtbo \ sun-audio-mtp-3.5mm.dtbo \ sun-audio-mtp-nfc.dtbo \ + sun-audio-mtp-qmp.dtbo \ sun-audio-qrd.dtbo \ sun-audio-qrd-sku2.dtbo \ sun-audio-atp.dtbo \ diff --git a/sun-audio-mtp-qmp.dtsi b/sun-audio-mtp-qmp.dtsi index 44121ea9..bf53f3cf 100644 --- a/sun-audio-mtp-qmp.dtsi +++ b/sun-audio-mtp-qmp.dtsi @@ -64,7 +64,7 @@ }; &sun_snd { - qcom,model = "sun-mtp-wsa883x-qmp-snd-card"; + qcom,model = "sun-mtp-wsa883x_qmp-snd-card"; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&swr_haptics>, <&wsa883x_0221>, <&wsa883x_0222>, From fc84ad4eff0f8214d14feaac17aedac54216a2b1 Mon Sep 17 00:00:00 2001 From: Kunlei Zhang Date: Tue, 27 Feb 2024 15:14:43 +0800 Subject: [PATCH 042/143] audio dts: add device tree for sun HDK Add device tree for Sun HDK. Change-Id: Idc87879371447a5e11c10d7a9b52aaf7d651e707 --- Kbuild | 1 + sun-audio-hdk.dts | 15 +++++++++++++++ 2 files changed, 16 insertions(+) create mode 100644 sun-audio-hdk.dts diff --git a/Kbuild b/Kbuild index ec9f9945..a7a740b9 100644 --- a/Kbuild +++ b/Kbuild @@ -22,6 +22,7 @@ dtbo-y += sun-audio.dtbo \ sun-audio-mtp-3.5mm.dtbo \ sun-audio-mtp-nfc.dtbo \ sun-audio-qrd.dtbo \ + sun-audio-hdk.dtbo \ sun-audio-qrd-sku2.dtbo \ sun-audio-atp.dtbo \ sun-audio-rcm.dtbo \ diff --git a/sun-audio-hdk.dts b/sun-audio-hdk.dts new file mode 100644 index 00000000..49502bef --- /dev/null +++ b/sun-audio-hdk.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-audio-qrd.dtsi" + / { + model = "Qualcomm Technologies, Inc. SunP QRD HDK"; + compatible = "qcom,sunp-hdk", "qcom,sunp", "qcom,hdk"; + qcom,msm-id = <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x1001f 0>; +}; From 542c8b16d5b9470ba2babad9f2cc1ae01b21ef24 Mon Sep 17 00:00:00 2001 From: Vaishali Gupta Date: Sun, 17 Mar 2024 23:04:04 -0700 Subject: [PATCH 043/143] Revert "ARM: dt-bindings: Disable haptics for cdp variants" This reverts commit 98cab652ca4821934cb81ff15f34b707b5b089c3. Change-Id: I0c2465e7f4f669b6ab8f3079322e3902c5f094b6 Signed-off-by: Vaishali Gupta --- sun-audio-cdp.dtsi | 4 ---- sun-audio-hamilton-cdp.dtsi | 2 +- sun-audio-rumi.dtsi | 5 +---- 3 files changed, 2 insertions(+), 9 deletions(-) diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index e76cd14a..b25f4300 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -40,13 +40,9 @@ &cdc_sep_mi2s_gpios { status = "disabled"; }; -&swr_haptics { - status = "disabled"; -}; &sun_snd { qcom,model = "sun-cdp-snd-card"; - swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", diff --git a/sun-audio-hamilton-cdp.dtsi b/sun-audio-hamilton-cdp.dtsi index f903de43..bbbe89d8 100644 --- a/sun-audio-hamilton-cdp.dtsi +++ b/sun-audio-hamilton-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ /*This is CDP with Hamilton wlan*/ diff --git a/sun-audio-rumi.dtsi b/sun-audio-rumi.dtsi index 093dfa8b..b488ac34 100644 --- a/sun-audio-rumi.dtsi +++ b/sun-audio-rumi.dtsi @@ -1,13 +1,10 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" -&swr_haptics { - status = "disabled"; -}; &sun_snd { compatible = "qcom,sun-asoc-snd-stub"; asoc-codec = <&stub_codec>; From a08ed244f3ea3a256879f21abefac83bfd7cfbd2 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 20 Mar 2024 11:04:40 +0530 Subject: [PATCH 044/143] ARM: dts: qcom: Add package ID to msm-IDs for sun SoC Add additional msm-IDs to support an additional package ID. Change-Id: If5b8d5c63a0e13c573e76518fe4999b932413e26 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-atp.dts | 4 +++- sun-audio-cdp-nfc.dts | 4 +++- sun-audio-cdp.dts | 4 +++- sun-audio-hamilton-cdp.dts | 4 +++- sun-audio-hamilton-mtp.dts | 4 +++- sun-audio-hamilton-rcm.dts | 4 +++- sun-audio-hdk.dts | 4 +++- sun-audio-mtp-3.5mm.dts | 4 +++- sun-audio-mtp-nfc.dts | 4 +++- sun-audio-mtp-qmp.dts | 4 +++- sun-audio-mtp.dts | 4 +++- sun-audio-qrd-sku2.dts | 4 +++- sun-audio-qrd.dts | 4 +++- sun-audio-rcm.dts | 4 +++- sun-audio-rumi.dts | 4 +++- sun-audio.dts | 4 +++- 16 files changed, 48 insertions(+), 16 deletions(-) diff --git a/sun-audio-atp.dts b/sun-audio-atp.dts index 575dbb4a..37f3e975 100644 --- a/sun-audio-atp.dts +++ b/sun-audio-atp.dts @@ -11,6 +11,8 @@ model = "Qualcomm Technologies, Inc. Sun ATP"; compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp", "qcom,atp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x10021 0>; }; diff --git a/sun-audio-cdp-nfc.dts b/sun-audio-cdp-nfc.dts index c307a023..80d5e254 100644 --- a/sun-audio-cdp-nfc.dts +++ b/sun-audio-cdp-nfc.dts @@ -11,6 +11,8 @@ / { model = "Qualcomm Technologies, Inc. Sun CDP ST54L NFC"; compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x50001 0>; }; diff --git a/sun-audio-cdp.dts b/sun-audio-cdp.dts index 65782f6a..f3960ba9 100644 --- a/sun-audio-cdp.dts +++ b/sun-audio-cdp.dts @@ -10,6 +10,8 @@ / { model = "Qualcomm Technologies, Inc. Sun CDP"; compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <1 0>, <0x50001 0>; }; diff --git a/sun-audio-hamilton-cdp.dts b/sun-audio-hamilton-cdp.dts index df15e4bd..392b4a19 100644 --- a/sun-audio-hamilton-cdp.dts +++ b/sun-audio-hamilton-cdp.dts @@ -13,7 +13,9 @@ / { model = "Qualcomm Technologies, Inc. Sun CDP"; compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x20001 0>, <0x60001 0>; }; diff --git a/sun-audio-hamilton-mtp.dts b/sun-audio-hamilton-mtp.dts index a4db1f54..56cdbfea 100644 --- a/sun-audio-hamilton-mtp.dts +++ b/sun-audio-hamilton-mtp.dts @@ -13,7 +13,9 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP ST54L NFC"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x20008 0>, <0x50008 0>; }; diff --git a/sun-audio-hamilton-rcm.dts b/sun-audio-hamilton-rcm.dts index c1de3779..b36404fd 100644 --- a/sun-audio-hamilton-rcm.dts +++ b/sun-audio-hamilton-rcm.dts @@ -10,6 +10,8 @@ / { model = "Qualcomm Technologies, Inc. Sun RCM"; compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x20015 0>, <0x40015 0>; }; diff --git a/sun-audio-hdk.dts b/sun-audio-hdk.dts index 49502bef..1d1de25b 100644 --- a/sun-audio-hdk.dts +++ b/sun-audio-hdk.dts @@ -10,6 +10,8 @@ / { model = "Qualcomm Technologies, Inc. SunP QRD HDK"; compatible = "qcom,sunp-hdk", "qcom,sunp", "qcom,hdk"; - qcom,msm-id = <639 0x10000>, <639 0x20000>; + qcom,msm-id = <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x1001f 0>; }; diff --git a/sun-audio-mtp-3.5mm.dts b/sun-audio-mtp-3.5mm.dts index 8148cf7a..00c8b934 100644 --- a/sun-audio-mtp-3.5mm.dts +++ b/sun-audio-mtp-3.5mm.dts @@ -19,6 +19,8 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP with 3.5mm"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x60008 0>; }; diff --git a/sun-audio-mtp-nfc.dts b/sun-audio-mtp-nfc.dts index 674406b5..de023590 100644 --- a/sun-audio-mtp-nfc.dts +++ b/sun-audio-mtp-nfc.dts @@ -13,6 +13,8 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP ST54L NFC"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x30008 0>, <0x40008 0>; }; diff --git a/sun-audio-mtp-qmp.dts b/sun-audio-mtp-qmp.dts index 6bd0e533..ef00d6c8 100644 --- a/sun-audio-mtp-qmp.dts +++ b/sun-audio-mtp-qmp.dts @@ -11,6 +11,8 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP QMP1000"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp", "qcom,sunp-mtp", "qcom,sunp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x10108 0>, <0x40108 0>; }; diff --git a/sun-audio-mtp.dts b/sun-audio-mtp.dts index 323b7b9a..80e2f9be 100644 --- a/sun-audio-mtp.dts +++ b/sun-audio-mtp.dts @@ -10,6 +10,8 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <8 0>; }; diff --git a/sun-audio-qrd-sku2.dts b/sun-audio-qrd-sku2.dts index 914ec927..af418d34 100644 --- a/sun-audio-qrd-sku2.dts +++ b/sun-audio-qrd-sku2.dts @@ -10,6 +10,8 @@ / { model = "Qualcomm Technologies, Inc. Sun QRD"; compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x2000B 0>; }; diff --git a/sun-audio-qrd.dts b/sun-audio-qrd.dts index 711a5fad..8d0b0a20 100644 --- a/sun-audio-qrd.dts +++ b/sun-audio-qrd.dts @@ -10,6 +10,8 @@ / { model = "Qualcomm Technologies, Inc. Sun QRD"; compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x1000B 0>, <0x3000B 0>; }; diff --git a/sun-audio-rcm.dts b/sun-audio-rcm.dts index e7841ce8..d4d47c70 100644 --- a/sun-audio-rcm.dts +++ b/sun-audio-rcm.dts @@ -10,6 +10,8 @@ / { model = "Qualcomm Technologies, Inc. Sun RCM"; compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0x15 0>, <0x30015 0>; }; diff --git a/sun-audio-rumi.dts b/sun-audio-rumi.dts index 2db458a0..9a1b2107 100644 --- a/sun-audio-rumi.dts +++ b/sun-audio-rumi.dts @@ -10,6 +10,8 @@ / { model = "Qualcomm Technologies, Inc. Sun RUMI"; compatible = "qcom,sun-rumi", "qcom,sun", "qcom,rumi"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <15 0>; }; diff --git a/sun-audio.dts b/sun-audio.dts index fc743327..e9362b0b 100644 --- a/sun-audio.dts +++ b/sun-audio.dts @@ -16,6 +16,8 @@ / { model = "Qualcomm Technologies, Inc. Sun"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; qcom,board-id = <0 0>; }; From 5476140d1f8b191687a09d4926b5850725b6827e Mon Sep 17 00:00:00 2001 From: Faiz Nabi Kuchay Date: Thu, 28 Mar 2024 15:26:23 +0530 Subject: [PATCH 045/143] ARM: dts: qcom: Use proper board-id for mtp with qmp Use proper board-id for Sun MTP with qmp attach. Change-Id: I1143c67e78c164fd83b330f9a8d2618433c33293 Signed-off-by: Faiz Nabi Kuchay --- sun-audio-mtp-qmp.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio-mtp-qmp.dts b/sun-audio-mtp-qmp.dts index ef00d6c8..35111fb1 100644 --- a/sun-audio-mtp-qmp.dts +++ b/sun-audio-mtp-qmp.dts @@ -14,5 +14,5 @@ qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, <0x100027f 0x10000>, <0x100027f 0x20000>; - qcom,board-id = <0x10108 0>, <0x40108 0>; + qcom,board-id = <0x108 0>, <0x40108 0>; }; From 74eb22dad0580a7e0cca1e57c5f69be590c47080 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Fri, 22 Mar 2024 14:55:29 +0530 Subject: [PATCH 046/143] ARM: dts: qcom: enable lpm mode for wsa883x supplies Enable low power mode vote for wsa883x supplies. Change-Id: If86407095e35918a7235d3051e121393bb1521fc Signed-off-by: Vangala, Amarnath --- sun-audio-mtp.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sun-audio-mtp.dtsi b/sun-audio-mtp.dtsi index 4b08fb38..82af8e21 100644 --- a/sun-audio-mtp.dtsi +++ b/sun-audio-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -120,6 +120,7 @@ cdc-vdd-1p8-supply = <&L15B>; qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; qcom,cdc-static-supplies = "cdc-vdd-1p8"; sound-name-prefix = "SpkrLeft"; }; @@ -132,6 +133,7 @@ cdc-vdd-1p8-supply = <&L15B>; qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; qcom,cdc-static-supplies = "cdc-vdd-1p8"; sound-name-prefix = "SpkrRight"; }; @@ -146,6 +148,7 @@ cdc-vdd-1p8-supply = <&L15B>; qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; qcom,cdc-static-supplies = "cdc-vdd-1p8"; sound-name-prefix = "Spkr2Left"; status = "disabled"; @@ -159,6 +162,7 @@ cdc-vdd-1p8-supply = <&L15B>; qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; qcom,cdc-static-supplies = "cdc-vdd-1p8"; sound-name-prefix = "Spkr2Right"; status = "disabled"; From ed2e451318db2ec63b206a297f871c4898bb4eb0 Mon Sep 17 00:00:00 2001 From: Prasad Kumpatla Date: Thu, 28 Mar 2024 23:42:23 +0530 Subject: [PATCH 047/143] ARM: dts: qcom: enable WCN BT for pineapple Enable BT on pineapple. Change-Id: Id83b9593379f6046cd9e37164ba89ae170614217 Signed-off-by: Prasad Kumpatla --- pineapple-audio-overlay.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/pineapple-audio-overlay.dtsi b/pineapple-audio-overlay.dtsi index 9842d780..42e31c80 100644 --- a/pineapple-audio-overlay.dtsi +++ b/pineapple-audio-overlay.dtsi @@ -409,7 +409,7 @@ qcom,model = "pineapple-mtp-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; From 96eadb60982736fd2a1431102164095871befa4e Mon Sep 17 00:00:00 2001 From: Kunlei Zhang Date: Fri, 29 Mar 2024 10:56:21 +0800 Subject: [PATCH 048/143] ARM: dts: qcom: add msm id support for sun HDK Add msm id support for sun HDK. Change-Id: I01caed1ccfe565abd5c4ef51f464f4438c08d756 Signed-off-by: Kunlei Zhang --- sun-audio-hdk.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sun-audio-hdk.dts b/sun-audio-hdk.dts index 1d1de25b..d78bb014 100644 --- a/sun-audio-hdk.dts +++ b/sun-audio-hdk.dts @@ -12,6 +12,7 @@ compatible = "qcom,sunp-hdk", "qcom,sunp", "qcom,hdk"; qcom,msm-id = <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <618 0x10000>, <618 0x20000>; qcom,board-id = <0x1001f 0>; }; From bd9838ea24e2c292e9c1f4b2f34c2023b259705c Mon Sep 17 00:00:00 2001 From: Deepali Jindal Date: Thu, 21 Mar 2024 10:01:23 +0530 Subject: [PATCH 049/143] dt-bindings: Add support for OPCM port for swr haptics Add support for OPCM port for swr haptics. Change-Id: I96837390282aefb7c2f2542c8e194d9a9954b1df Signed-off-by: Deepali Jindal --- sun-audio-overlay.dtsi | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 0f0cc03e..4b193856 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -238,7 +238,7 @@ <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, - <8 SPKR_HAPT 0x1>, <9 OCPM 0x3>, + <8 SPKR_HAPT 0x1>, <9 OCPM 0x1>, <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; qcom,swr-num-dev = <3>; @@ -287,7 +287,7 @@ compatible = "qcom,pmih010x-swr-haptics"; reg = <0x03 0xf0170220>; swr-slave-supply = <&hap_swr_slave_reg>; - qcom,rx_swr_ch_map = <0 0x01 0x01 0 SPKR_HAPT>; + qcom,rx_swr_ch_map = <0 0x01 0x01 0 OCPM>; }; }; }; @@ -417,6 +417,12 @@ qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; qcom,audio-core-list = <0>, <1>; + /* + * Add this property, + * To Enable swr haptics through OPCM port. + * This will include wsa2 dailinks. + */ + qcom,dedicated-wsa2; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", @@ -449,7 +455,7 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", - "HAP_IN", "WSA_HAPT OUT", + "HAP_IN", "WSA2_HAPT OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", From f3270eec97a70c7bc12dcaa980cad63595ee3b7d Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 8 Apr 2024 22:46:08 +0530 Subject: [PATCH 050/143] ARM: dts: qcom: add dt property for low power resource API for SUN add dt property for low power resource API for SUN. Change-Id: I7a0ebfb64fbd9fb80d1f181cd36c64fb06d7a747 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 50e77c5b..4890caf6 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -45,6 +45,7 @@ audio_prm: q6prm { compatible = "qcom,audio_prm"; + qcom,sleep-api-supported = <1>; reg = ; }; }; From 697e4fb563683c7f04bc8199c7d875942725bbb7 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 10 Apr 2024 13:52:02 +0530 Subject: [PATCH 051/143] ARM: dts: qcom: update dt property for usb xtalk In SUN QRD usb xtalk should be a-talk by default. Change-Id: Ie9142a4ac6266162f87145dd6d74396ec4de332a Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-qrd.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio-qrd.dtsi b/sun-audio-qrd.dtsi index d09a730f..45dc7497 100644 --- a/sun-audio-qrd.dtsi +++ b/sun-audio-qrd.dtsi @@ -45,7 +45,7 @@ * 1 for digital crosstalk with local sensed a-xtalk enabled, and * 2 for digital crosstalk with remote sensed a-xtalk enabled. */ - qcom,usbcss-hs-xtalk-config = <2>; + qcom,usbcss-hs-xtalk-config = <0>; qcom,usbcss-hs-rdson = <600>; qcom,usbcss-hs-r2 = <7550>; qcom,usbcss-hs-r3 = <1>; From 5bde2adf64f9d1e50dc43d3c972f6f7d5c77d8b5 Mon Sep 17 00:00:00 2001 From: Prasad Kumpatla Date: Tue, 9 Apr 2024 00:03:43 +0530 Subject: [PATCH 052/143] ARM: dts: qcom: enable hw vote for all interfaces of mi2s/tdm HW vote is required for all interfaces of mi2s and tdm for sun target. Change-Id: I35c8f6d19aafeaa593a372a28de6912dc5d7713a Signed-off-by: Prasad Kumpatla --- sun-audio-overlay.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 4b193856..766ac533 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -410,7 +410,7 @@ sun_snd: sound { qcom,model = "sun-mtp-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; - qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <1>, <0>, <0>; + qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <1>; qcom,tdm-max-slots = <8>; From 9fd8411a0a21b540ac0f84b6ea840a8480bef0c6 Mon Sep 17 00:00:00 2001 From: Phani Kumar Uppalapati Date: Fri, 12 Apr 2024 00:12:16 -0700 Subject: [PATCH 053/143] ARM: dts: qcom: add initialization blob for qmp node Add register initialization blob for qmp node on sun platform. Change-Id: I8e76edd726179b059bfc037d09298efc301145aa Signed-off-by: Phani Kumar Uppalapati --- sun-audio-mtp-qmp.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/sun-audio-mtp-qmp.dtsi b/sun-audio-mtp-qmp.dtsi index bf53f3cf..df85e70b 100644 --- a/sun-audio-mtp-qmp.dtsi +++ b/sun-audio-mtp-qmp.dtsi @@ -21,6 +21,11 @@ , , , , , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; }; qmp02: qmp@04170236 { @@ -34,6 +39,11 @@ , , , , , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; }; qmp03: qmp@04170230 { @@ -47,6 +57,11 @@ , , , , , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; }; qmp04: qmp@04170239 { @@ -60,6 +75,11 @@ , , , , , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; }; }; From ef3e38aff7a14b22860cdc4a8fe7219d97fae807 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 16 Apr 2024 21:57:09 +0530 Subject: [PATCH 054/143] ARM: dts: qcom: remove lpass_bt_swr in hamilton V8 Remove lpass_bt_swr in ssr devs as it is not supported. Change-Id: Ide27c877d1e7e298338585a52bd4143596c4000d Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-hamilton-mtp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sun-audio-hamilton-mtp.dtsi b/sun-audio-hamilton-mtp.dtsi index 87fe4155..0137bc09 100644 --- a/sun-audio-hamilton-mtp.dtsi +++ b/sun-audio-hamilton-mtp.dtsi @@ -11,5 +11,7 @@ &sun_snd { qcom,model = "sun-mtp-wsa883x-snd-card"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; }; From fbc4869f6d39d49e1c1caac5d391d75a7f326c9f Mon Sep 17 00:00:00 2001 From: Deepali Jindal Date: Wed, 13 Mar 2024 15:46:23 +0530 Subject: [PATCH 055/143] ARM: dts: qcom: Add new property to enable haptics vi sense Add new property to enable haptics vi sense. Change-Id: Ia6f0291eb73a97964ee0c4f7da6f8ac27fd1d4a6 Signed-off-by: Deepali Jindal --- sun-audio-overlay.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 4b193856..52512757 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -288,6 +288,7 @@ reg = <0x03 0xf0170220>; swr-slave-supply = <&hap_swr_slave_reg>; qcom,rx_swr_ch_map = <0 0x01 0x01 0 OCPM>; + qcom,rx_swr_vi_ch_map = <2 0x02 0x03 1200000 SPKR_L_VI>; }; }; }; From 9674752df69e07ffa4f0bef1df57895c1c1bcb89 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 8 Apr 2024 22:46:08 +0530 Subject: [PATCH 056/143] ARM: dts: qcom: add dt property for low power resource API for SUN add dt property for low power resource API for SUN. Change-Id: I7a0ebfb64fbd9fb80d1f181cd36c64fb06d7a747 Signed-off-by: Ravulapati Vishnu Vardhan Rao Signed-off-by: Bruce Levy --- sun-audio.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 50e77c5b..4890caf6 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -45,6 +45,7 @@ audio_prm: q6prm { compatible = "qcom,audio_prm"; + qcom,sleep-api-supported = <1>; reg = ; }; }; From e9156d4e4420e8697f0ba1b4f352e85b3b12f8a7 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 16 Apr 2024 21:57:09 +0530 Subject: [PATCH 057/143] ARM: dts: qcom: remove lpass_bt_swr in hamilton V8 Remove lpass_bt_swr in ssr devs as it is not supported. Change-Id: Ide27c877d1e7e298338585a52bd4143596c4000d Signed-off-by: Ravulapati Vishnu Vardhan Rao Signed-off-by: Bruce Levy --- sun-audio-hamilton-mtp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sun-audio-hamilton-mtp.dtsi b/sun-audio-hamilton-mtp.dtsi index 87fe4155..0137bc09 100644 --- a/sun-audio-hamilton-mtp.dtsi +++ b/sun-audio-hamilton-mtp.dtsi @@ -11,5 +11,7 @@ &sun_snd { qcom,model = "sun-mtp-wsa883x-snd-card"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; }; From fed98aeb1e89e305f16f8b690c715f0b9958f364 Mon Sep 17 00:00:00 2001 From: Kunlei Zhang Date: Wed, 8 May 2024 15:21:09 +0800 Subject: [PATCH 058/143] ARM: dts: msm: disable AATC on Pakala HDK device Disable AATC on Pakala HDK device. Change-Id: I32af8c3e44d3259700cefad32d824ece4b4c10f4 Signed-off-by: Kunlei Zhang --- sun-audio-hdk.dts | 2 +- sun-audio-hdk.dtsi | 14 ++++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) create mode 100644 sun-audio-hdk.dtsi diff --git a/sun-audio-hdk.dts b/sun-audio-hdk.dts index d78bb014..a8ce2b7e 100644 --- a/sun-audio-hdk.dts +++ b/sun-audio-hdk.dts @@ -6,7 +6,7 @@ /dts-v1/; /plugin/; -#include "sun-audio-qrd.dtsi" +#include "sun-audio-hdk.dtsi" / { model = "Qualcomm Technologies, Inc. SunP QRD HDK"; compatible = "qcom,sunp-hdk", "qcom,sunp", "qcom,hdk"; diff --git a/sun-audio-hdk.dtsi b/sun-audio-hdk.dtsi new file mode 100644 index 00000000..0a46c1af --- /dev/null +++ b/sun-audio-hdk.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-qrd.dtsi" + +&sun_snd { + qcom,model = "sun-qrd-snd-card"; + + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; +}; From a00da5833f74fc5a92130129d3293b61624f2162 Mon Sep 17 00:00:00 2001 From: Zhou Song Date: Wed, 24 Apr 2024 17:23:07 +0800 Subject: [PATCH 059/143] ARM: dts: qcom: enable adsp loader Enables adsp loader to trigger adsp ssr through /sys/kernel/boot_adsp/ssr. Remove property qcom,adsp-state to skip loading adsp through /sys/kernel/boot_adsp/boot. Change-Id: I298166bc079e60937247b2c130114e8d107b69c0 Signed-off-by: Zhou Song --- sun-audio-overlay.dtsi | 4 ++++ sun-audio.dtsi | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 62c4968a..81475d47 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -841,3 +841,7 @@ #clock-cells = <1>; }; }; + +&adsp_loader { + status = "ok"; +}; diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 4890caf6..00498bcb 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -185,3 +185,7 @@ swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master"; swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; }; + +&adsp_loader { + /delete-property/ qcom,adsp-state; +}; From 2127cca6b02f1857684450b764efd2f8acfcfd47 Mon Sep 17 00:00:00 2001 From: Linux Image Build Automation Date: Tue, 14 May 2024 01:58:00 -0700 Subject: [PATCH 060/143] Revert "ARM: dts: qcom: remove lpass_bt_swr in hamilton V8" This reverts commit e9156d4e4420e8697f0ba1b4f352e85b3b12f8a7. Change-Id: I0553d955a2f331e78148d72f6f9b45dea709c659 Signed-off-by: Linux Image Build Automation --- sun-audio-hamilton-mtp.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/sun-audio-hamilton-mtp.dtsi b/sun-audio-hamilton-mtp.dtsi index 0137bc09..87fe4155 100644 --- a/sun-audio-hamilton-mtp.dtsi +++ b/sun-audio-hamilton-mtp.dtsi @@ -11,7 +11,5 @@ &sun_snd { qcom,model = "sun-mtp-wsa883x-snd-card"; - qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, - <&lpass_cdc>; }; From 5cf827c9c2c36262ad4f82ed12f62d13e06c5de0 Mon Sep 17 00:00:00 2001 From: Linux Image Build Automation Date: Tue, 14 May 2024 01:58:13 -0700 Subject: [PATCH 061/143] Revert "ARM: dts: qcom: add dt property for low power resource API for SUN" This reverts commit 9674752df69e07ffa4f0bef1df57895c1c1bcb89. Change-Id: Ic892ff74eca1e045dab2698ee824788a25f037bc Signed-off-by: Linux Image Build Automation --- sun-audio.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 4890caf6..50e77c5b 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -45,7 +45,6 @@ audio_prm: q6prm { compatible = "qcom,audio_prm"; - qcom,sleep-api-supported = <1>; reg = ; }; }; From 700aa71919aad14c864e5b42eee712b4e45ce3a0 Mon Sep 17 00:00:00 2001 From: Manikantan R Date: Fri, 19 Apr 2024 15:21:07 +0530 Subject: [PATCH 062/143] ARM: dts: qcom: add/update DT entried for vdd-px on sun Update/propgate dt properties to sun. Change-Id: I46251f6a954f1ff67f74fe189684d0ad03f0dbb5 Signed-off-by: Manikantan R --- sun-audio-overlay.dtsi | 8 +++++--- sun-audio.dtsi | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 4b193856..3770fc82 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -350,6 +350,8 @@ qcom,cdc-vdd-px-current = <5000>; qcom,cdc-vdd-px-lpm-supported = <1>; + qcom,cdc-vdd-px-rem-supported = <1>; + qcom,cdc-micbias1-mv = <1800>; qcom,cdc-micbias2-mv = <1800>; qcom,cdc-micbias3-mv = <1800>; @@ -357,9 +359,9 @@ qcom,cdc-static-supplies = "cdc-vdd-rx", "cdc-vdd-tx", - "cdc-vdd-mic-bias", - "cdc-vdd-px"; - qcom,cdc-on-demand-supplies = "cdc-vdd-buck"; + "cdc-vdd-mic-bias"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck", + "cdc-vdd-px"; wcd_mb1_reg: qcom,wcd-mb1-reg { regulator-name = "wcd-mb1-reg"; diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 50e77c5b..4890caf6 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -45,6 +45,7 @@ audio_prm: q6prm { compatible = "qcom,audio_prm"; + qcom,sleep-api-supported = <1>; reg = ; }; }; From b7514701c98664ad47a3f64f5bf24a30a1210bb1 Mon Sep 17 00:00:00 2001 From: Zhou Song Date: Wed, 24 Apr 2024 17:23:07 +0800 Subject: [PATCH 063/143] ARM: dts: qcom: enable adsp loader Enables adsp loader to trigger adsp ssr through /sys/kernel/boot_adsp/ssr. Remove property qcom,adsp-state to skip loading adsp through /sys/kernel/boot_adsp/boot. Change-Id: I298166bc079e60937247b2c130114e8d107b69c0 Signed-off-by: Zhou Song (cherry picked from commit a00da5833f74fc5a92130129d3293b61624f2162) --- sun-audio-overlay.dtsi | 4 ++++ sun-audio.dtsi | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 62c4968a..81475d47 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -841,3 +841,7 @@ #clock-cells = <1>; }; }; + +&adsp_loader { + status = "ok"; +}; diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 4890caf6..00498bcb 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -185,3 +185,7 @@ swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master"; swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; }; + +&adsp_loader { + /delete-property/ qcom,adsp-state; +}; From 1e6cd78751657f38422f969b276a7819519fd550 Mon Sep 17 00:00:00 2001 From: Linux Image Build Automation Date: Mon, 3 Jun 2024 16:23:36 -0700 Subject: [PATCH 064/143] Revert "ARM: dts: qcom: enable adsp loader" This reverts commit b7514701c98664ad47a3f64f5bf24a30a1210bb1. Change-Id: I491393dc44d2d1b3ee691e989dfc41d8868d92f2 Signed-off-by: Linux Image Build Automation --- sun-audio-overlay.dtsi | 4 ---- sun-audio.dtsi | 4 ---- 2 files changed, 8 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 81475d47..62c4968a 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -841,7 +841,3 @@ #clock-cells = <1>; }; }; - -&adsp_loader { - status = "ok"; -}; diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 00498bcb..4890caf6 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -185,7 +185,3 @@ swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master"; swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; }; - -&adsp_loader { - /delete-property/ qcom,adsp-state; -}; From c4cd4fae9d8e59d2c9a11f95de714f7eb6c53c6d Mon Sep 17 00:00:00 2001 From: Phani Kumar Uppalapati Date: Tue, 14 May 2024 18:38:11 -0700 Subject: [PATCH 065/143] ARM: dts: qcom: Add QMP support for sun r2 devices Add support for QMP mic on Sun r2 hamilton MTP variants. Change-Id: I71a33aa6955d54645ce9d6a5d9f7b4247a9eecef Signed-off-by: Phani Kumar Uppalapati --- Kbuild | 1 + sun-audio-hamilton-mtp-v2.dts | 21 +++++++++++++++++++++ sun-audio-hamilton-mtp.dts | 6 +++--- sun-audio-hamilton-qmp-mtp.dtsi | 17 +++++++++++++++++ 4 files changed, 42 insertions(+), 3 deletions(-) create mode 100644 sun-audio-hamilton-mtp-v2.dts create mode 100644 sun-audio-hamilton-qmp-mtp.dtsi diff --git a/Kbuild b/Kbuild index 1ba1bdcd..2f34da17 100644 --- a/Kbuild +++ b/Kbuild @@ -29,6 +29,7 @@ dtbo-y += sun-audio.dtbo \ sun-audio-rcm.dtbo \ sun-audio-hamilton-rcm.dtbo \ sun-audio-hamilton-cdp.dtbo \ + sun-audio-hamilton-mtp-v2.dtbo \ sun-audio-hamilton-mtp.dtbo endif diff --git a/sun-audio-hamilton-mtp-v2.dts b/sun-audio-hamilton-mtp-v2.dts new file mode 100644 index 00000000..9e0e074a --- /dev/null +++ b/sun-audio-hamilton-mtp-v2.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +/*This is MTP v2 with Hamilton + V8/V6 wlan*/ + +#include "sun-audio-hamilton-qmp-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP ST54L NFC"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x20000>, <639 0x20000>, + <0x100026a 0x20000>, + <0x100027f 0x20000>; + qcom,board-id = <0x20008 0>, <0x50008 0>; +}; + diff --git a/sun-audio-hamilton-mtp.dts b/sun-audio-hamilton-mtp.dts index 56cdbfea..7cafb7e8 100644 --- a/sun-audio-hamilton-mtp.dts +++ b/sun-audio-hamilton-mtp.dts @@ -13,9 +13,9 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP ST54L NFC"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, - <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + qcom,msm-id = <618 0x10000>, <639 0x10000>, + <0x100026a 0x10000>, + <0x100027f 0x10000>; qcom,board-id = <0x20008 0>, <0x50008 0>; }; diff --git a/sun-audio-hamilton-qmp-mtp.dtsi b/sun-audio-hamilton-qmp-mtp.dtsi new file mode 100644 index 00000000..d5f99035 --- /dev/null +++ b/sun-audio-hamilton-qmp-mtp.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-audio-mtp-qmp.dtsi" + +&lpass_bt_swr { + status = "disabled"; +}; + +&sun_snd { + qcom,model = "sun-mtp-wsa883x_qmp-snd-card"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; +}; + From 4c3afa7eb952011fd211d372945535f44f662c01 Mon Sep 17 00:00:00 2001 From: Vidyakumar Athota Date: Wed, 12 Jun 2024 13:34:23 -0700 Subject: [PATCH 066/143] ARM: dts: qcom: update SID for eNPU access eNPU HW schedular access is denied for audio usecases . Update right SID to get eNPU access. Change-Id: Ic8884eca7873c07fec11cc00ce59dd408aa190c4 Signed-off-by: Vidyakumar Athota --- sun-audio.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index 00498bcb..d4147b83 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -57,7 +57,7 @@ compatible = "qcom,msm-audio-ion"; qcom,smmu-version = <2>; qcom,smmu-enabled; - iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1061 0x0>; + iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1041 0x20>; memory-region = <&audio_cnss_resv_region>; qcom,iommu-group = <&cnss_audio_iommu_group0>; qcom,smmu-sid-mask = /bits/ 64 <0xf>; From 3843c38173fda43367324d8ca7cecde7b0283b6b Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 26 Jun 2024 09:28:16 +0530 Subject: [PATCH 067/143] ARM: dts: msm: Add support for Sun SoC + Hamilton with 3.5mm support Add 3.5mm support for Hamilton V8 power grid for MTP platform on Sun. Change-Id: Ieac5d60a7da391906844da1a5b254a10a72f4a8d Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 3 ++- sun-audio-hamilton-mtp-3.5mm.dts | 22 ++++++++++++++++++++++ sun-audio-hamilton-mtp-3.5mm.dtsi | 16 ++++++++++++++++ 3 files changed, 40 insertions(+), 1 deletion(-) create mode 100644 sun-audio-hamilton-mtp-3.5mm.dts create mode 100644 sun-audio-hamilton-mtp-3.5mm.dtsi diff --git a/Kbuild b/Kbuild index 2f34da17..53fab063 100644 --- a/Kbuild +++ b/Kbuild @@ -30,7 +30,8 @@ dtbo-y += sun-audio.dtbo \ sun-audio-hamilton-rcm.dtbo \ sun-audio-hamilton-cdp.dtbo \ sun-audio-hamilton-mtp-v2.dtbo \ - sun-audio-hamilton-mtp.dtbo + sun-audio-hamilton-mtp.dtbo \ + sun-audio-hamilton-mtp-3.5mm.dtbo endif always-y := $(dtb-y) $(dtbo-y) diff --git a/sun-audio-hamilton-mtp-3.5mm.dts b/sun-audio-hamilton-mtp-3.5mm.dts new file mode 100644 index 00000000..6f084758 --- /dev/null +++ b/sun-audio-hamilton-mtp-3.5mm.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +/*This is MTP with Hamilton + V8 + 3.5mm support*/ + +#include "sun-audio-hamilton-mtp-3.5mm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP Hamilton with 3.5mm"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", + "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, + <0x100026a 0x10000>, <0x100026a 0x20000>, + <0x100027f 0x10000>, <0x100027f 0x20000>; + qcom,board-id = <0x60108 0>; +}; + diff --git a/sun-audio-hamilton-mtp-3.5mm.dtsi b/sun-audio-hamilton-mtp-3.5mm.dtsi new file mode 100644 index 00000000..d1b51c57 --- /dev/null +++ b/sun-audio-hamilton-mtp-3.5mm.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +/*This is MTP with Hamilton + V8 +3.5mm*/ +#include "sun-audio-hamilton-mtp.dtsi" + +&sun_snd { + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; +}; From a4b14bc6f1a998c087ceb48fe5c85b2cb4aad55a Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 12 Jul 2024 17:07:45 +0530 Subject: [PATCH 068/143] ARM: dts: msm: Add usb threshold for special HS Add USB HS threshold which is needed by Special category HeadSets to get detected. Change-Id: I9ab8dce79778d14f85ca73bfd0a03de1ade39f4c Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio-qrd.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/sun-audio-qrd.dtsi b/sun-audio-qrd.dtsi index 45dc7497..40fce6ca 100644 --- a/sun-audio-qrd.dtsi +++ b/sun-audio-qrd.dtsi @@ -103,6 +103,7 @@ qcom,msm-mbhc-usbc-audio-supported = <1>; qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; }; From 5e002d626dc3e209e615ebbbbc4bc6d05a30c68b Mon Sep 17 00:00:00 2001 From: Satish Babu Patakokila Date: Mon, 29 Jul 2024 17:23:54 +0530 Subject: [PATCH 069/143] ARM: dts: msm: update iommu address as per CNSS changes Update iommu address as per CNSS changes as audio and CNSS share same address space. Change-Id: I3f31a7d2bd0c3324051bedf9b733081f7cfa7879 Signed-off-by: Satish Babu Patakokila --- sun-audio.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index d4147b83..a6a18ab3 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -64,7 +64,7 @@ dma-coherent; audio_cnss_resv_region: audio_cnss_resv_region { - iommu-addresses = <&msm_audio_ion 0x00000000 0x88000000>, + iommu-addresses = <&msm_audio_ion 0x00000000 0x18000000>, <&msm_audio_ion 0xb0000000 0x50000000>; }; }; From cdc05ed8bf5cc45fb09c178e6d7aef82471daa87 Mon Sep 17 00:00:00 2001 From: Faiz Nabi Kuchay Date: Wed, 14 Aug 2024 14:12:50 +0530 Subject: [PATCH 070/143] ARM: dts: qcom: remove duplicate declaration of swr4 dt node on sun Remove duplicate declaration of swr4 dt node on sun. Change-Id: I6467786a864674d8fbe17aa7131ccb05e0903215 Signed-off-by: Faiz Nabi Kuchay --- sun-audio-overlay.dtsi | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index 9407fe9d..dc9c7340 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -389,24 +389,24 @@ clocks = <&clock_audio_bt_swr_mclk_clk 0>, <&clock_audio_bt_swr_mclk_clk_2x 0>, <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; qcom,bt-swr-gpios = <&bt_swr_gpios>; +}; - swr4: bt_swr_mstr { - compatible = "qcom,swr-mstr"; - qcom,swr_master_id = <5>; - clock-names = "lpass_core_hw_vote", - "lpass_audio_hw_vote"; - clocks = <&lpass_core_hw_vote 0>, - <&lpass_audio_hw_vote 0>; - swrm-io-base = <0x06CA0000 0x0>; - interrupts = ; - interrupt-names = "swr_master_irq"; - qcom,swr-num-ports = <7>; - qcom,swr-port-mapping = <1 BT_AUDIO_RX1 0x3>, - <2 BT_AUDIO_RX2 0x3>, <3 BT_AUDIO_RX3 0x3>, - <5 BT_AUDIO_TX1 0x3>, <6 BT_AUDIO_TX2 0x3>, - <7 BT_AUDIO_TX3 0x3>, <8 FM_AUDIO_TX1 0x3>; - qcom,swr-num-dev = <1>; - }; +&swr4 { + compatible = "qcom,swr-mstr"; + qcom,swr_master_id = <5>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + swrm-io-base = <0x06CA0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <7>; + qcom,swr-port-mapping = <1 BT_AUDIO_RX1 0x3>, + <2 BT_AUDIO_RX2 0x3>, <3 BT_AUDIO_RX3 0x3>, + <5 BT_AUDIO_TX1 0x3>, <6 BT_AUDIO_TX2 0x3>, + <7 BT_AUDIO_TX3 0x3>, <8 FM_AUDIO_TX1 0x3>; + qcom,swr-num-dev = <1>; }; &spf_core_platform { From b8bf654e0943518039bebdc0f757b4273490cab1 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 28 Aug 2024 12:32:59 +0530 Subject: [PATCH 071/143] ARM: dts: msm: Configuration to set thread priority In LL use-case GPR callback thread was in unable state. In normal thread and not in RT thread. Which causes pop noise issue. It needs to set glink-adsp_apps thread priority to be RT. This Configuration enables Client to set the configuration thread to be in RT. Change-Id: I2b6512ad06353cbcae30706fa27326210661dc0c Signed-off-by: Ravulapati Vishnu Vardhan Rao --- sun-audio.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/sun-audio.dtsi b/sun-audio.dtsi index a6a18ab3..b55cb8cb 100644 --- a/sun-audio.dtsi +++ b/sun-audio.dtsi @@ -30,6 +30,7 @@ compatible = "qcom,gpr"; qcom,glink-channels = "adsp_apps"; qcom,intents = <0x200 20>; + qcom,ch-sched-rt; reg = ; spf_core { From da99ab8300b9169751817465c4700695d16d9110 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Mon, 2 Sep 2024 23:19:10 +0530 Subject: [PATCH 072/143] ARM: dts: qcom: update clk div factor entry for TX and VA macros Update clk div factor entries for TX and VA macros to reflect proper HW configuration. Change-Id: I29d5d4fb0fbbae4b2bd3c121f1b6f7a6d34e9cd2 Signed-off-by: Vangala, Amarnath --- sun-audio-overlay.dtsi | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index dc9c7340..ed513359 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -35,7 +35,19 @@ reg = <0x7660000 0x0>; clock-names = "lpass_audio_hw_vote"; clocks = <&lpass_audio_hw_vote 0>; - qcom,va-dmic-sample-rate = <600000>; + /* + * Clk divding factors for each DMIC pair. + * Valid entries for each DMIC pair: + * 2, 3, 4, 6, 8, 16 + * + * These factors are translated to corresponding config values + * for the following registers, + * -- LPASS_VA_TOP_CSR_DMIC0_CTL, + * -- LPASS_VA_TOP_CSR_DMIC1_CTL, + * -- LPASS_VA_TOP_CSR_DMIC2_CTL, + * -- LPASS_VA_TOP_CSR_DMIC3_CTL, + */ + qcom,va-dmic-clk-div-factor = <16 16 16 16>; qcom,va-clk-mux-select = <1>; qcom,default-clk-id = ; qcom,use-clk-id = ; @@ -81,7 +93,19 @@ compatible = "qcom,lpass-cdc-tx-macro"; reg = <0x6AE0000 0x0>; qcom,default-clk-id = ; - qcom,tx-dmic-sample-rate = <2400000>; + /* + * Clk divding factors for each DMIC pair. + * Valid entries for each DMIC pair: + * 2, 3, 4, 6, 8, 16 + * + * These factors are translated to corresponding config values + * for the following registers, + * -- LPASS_VA_TOP_CSR_DMIC0_CTL, + * -- LPASS_VA_TOP_CSR_DMIC1_CTL, + * -- LPASS_VA_TOP_CSR_DMIC2_CTL, + * -- LPASS_VA_TOP_CSR_DMIC3_CTL, + */ + qcom,tx-dmic-clk-div-factor = <4 4 4 4>; qcom,is-used-swr-gpio = <0>; }; From 17f498180422404cf3cc011cac8b41fdd73abb00 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 14 Oct 2024 09:48:28 +0530 Subject: [PATCH 073/143] ARM: dts: msm: compilation support Add Kbuild support for dts files for tuna platforms. Change-Id: I2f4343937c8f3fda21dfa752674f8a8c6eb8cc42 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/Kbuild b/Kbuild index 53fab063..b50df40c 100644 --- a/Kbuild +++ b/Kbuild @@ -31,7 +31,15 @@ dtbo-y += sun-audio.dtbo \ sun-audio-hamilton-cdp.dtbo \ sun-audio-hamilton-mtp-v2.dtbo \ sun-audio-hamilton-mtp.dtbo \ - sun-audio-hamilton-mtp-3.5mm.dtbo + sun-audio-hamilton-mtp-3.5mm.dtbo \ + tuna-audio-atp.dtbo \ + tuna-audio-cdp.dtbo \ + tuna-audio-hamilton-mtp.dtbo \ + tuna-audio-hamilton-rcm.dtbo \ + tuna-audio-mtp.dtbo \ + tuna-audio-mtp-qmp1000.dtbo \ + tuna-audio-qrd.dtbo \ + tuna-audio-rcm.dtbo endif always-y := $(dtb-y) $(dtbo-y) From b804d3c941dfcf176df9f0838a05f9e6f4ac63d9 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Thu, 10 Oct 2024 22:22:17 +0530 Subject: [PATCH 074/143] ARM: dts: msm: Add support for Tuna audio Add support for tuna audio device tree entree. Change-Id: Ic85de2ab888e4c4b9874775492e0650fdcc72d8f Signed-off-by: Vangala, Amarnath --- tuna-audio.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 tuna-audio.dts diff --git a/tuna-audio.dts b/tuna-audio.dts new file mode 100644 index 00000000..3291558f --- /dev/null +++ b/tuna-audio.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "tuna-audio.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. tuna"; + compatible = "qcom,tuna"; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <0 0>; +}; From 5bf5777f50e7491b56fcfef034f3dc965522ae4d Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 13 Sep 2024 20:36:15 +0530 Subject: [PATCH 075/143] ARM: dts: msm: Add support for platforms for Tuna Add audio device tree support for ATP, CDP, MTP, QRD, RCM platforms for Tuna SoC. Change-Id: I628e153ab1420e37e9692ae67e26db2e11f37302 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-atp.dts | 17 + tuna-audio-atp.dtsi | 47 + tuna-audio-cdp.dts | 18 + tuna-audio-cdp.dtsi | 123 ++ tuna-audio-hamilton-mtp.dts | 17 + tuna-audio-hamilton-mtp.dtsi | 17 + tuna-audio-hamilton-rcm.dts | 17 + tuna-audio-hamilton-rcm.dtsi | 16 + tuna-audio-mtp-qmp1000.dts | 18 + tuna-audio-mtp-qmp1000.dtsi | 166 +++ tuna-audio-mtp.dts | 18 + tuna-audio-mtp.dtsi | 16 + tuna-audio-overlay.dtsi | 767 ++++++++++++ tuna-audio-qrd.dts | 17 + tuna-audio-qrd.dtsi | 125 ++ tuna-audio-rcm.dts | 16 + tuna-audio.dtsi | 186 +++ tuna-lpi.dtsi | 2189 ++++++++++++++++++++++++++++++++++ 18 files changed, 3790 insertions(+) create mode 100644 tuna-audio-atp.dts create mode 100644 tuna-audio-atp.dtsi create mode 100644 tuna-audio-cdp.dts create mode 100644 tuna-audio-cdp.dtsi create mode 100644 tuna-audio-hamilton-mtp.dts create mode 100644 tuna-audio-hamilton-mtp.dtsi create mode 100644 tuna-audio-hamilton-rcm.dts create mode 100644 tuna-audio-hamilton-rcm.dtsi create mode 100644 tuna-audio-mtp-qmp1000.dts create mode 100644 tuna-audio-mtp-qmp1000.dtsi create mode 100644 tuna-audio-mtp.dts create mode 100644 tuna-audio-mtp.dtsi create mode 100644 tuna-audio-overlay.dtsi create mode 100644 tuna-audio-qrd.dts create mode 100644 tuna-audio-qrd.dtsi create mode 100644 tuna-audio-rcm.dts create mode 100644 tuna-audio.dtsi create mode 100644 tuna-lpi.dtsi diff --git a/tuna-audio-atp.dts b/tuna-audio-atp.dts new file mode 100644 index 00000000..35f93660 --- /dev/null +++ b/tuna-audio-atp.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-audio-atp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Tuna ATP"; + compatible = "qcom,tuna-atp", "qcom,tuna", "qcom,tunap-atp", "qcom,tunap", + "qcom,atp"; + + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <33 0>; +}; diff --git a/tuna-audio-atp.dtsi b/tuna-audio-atp.dtsi new file mode 100644 index 00000000..6ff94058 --- /dev/null +++ b/tuna-audio-atp.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "tuna-audio-cdp.dtsi" + +&tuna_snd { + qcom,wcn-btfm = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,wcd-disabled =<1>; + qcom,audio-routing = + "TX DMIC0", "Digital Mic0", + "TX DMIC1", "Digital Mic1", + "TX DMIC2", "Digital Mic2", + "TX DMIC3", "Digital Mic3"; + qcom,wsa-max-devs = <0>; +}; + +&swr0 { + qcom,swr-num-dev = <0>; + wsa884x_0220: wsa884x@02170220 { + status = "disabled"; + }; + + wsa884x_0221: wsa884x@02170221 { + status = "disabled"; + }; +}; + +&wcd939x_codec { + status = "disabled"; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + + +&wsa_macro { + qcom,wsa-bat-cfgs= <4>, <4>; +}; + diff --git a/tuna-audio-cdp.dts b/tuna-audio-cdp.dts new file mode 100644 index 00000000..8acd92ac --- /dev/null +++ b/tuna-audio-cdp.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-audio-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna CDP"; + compatible = "qcom,tuna-cdp", "qcom,tuna", "qcom,tunap-cdp", "qcom,tunap", + "qcom,cdp"; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <1 0>; +}; + diff --git a/tuna-audio-cdp.dtsi b/tuna-audio-cdp.dtsi new file mode 100644 index 00000000..1f254184 --- /dev/null +++ b/tuna-audio-cdp.dtsi @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "tuna-audio-overlay.dtsi" + +&cdc_pri_mi2s_gpios { + status = "disabled"; +}; + +&fm_i2s1_gpios { + status = "ok"; +}; + +&cdc_quat_mi2s_gpios { + status = "disabled"; +}; + +&cdc_quin_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sen_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sep_mi2s_gpios { + status = "disabled"; +}; + +&wcd9378_codec { + status = "disabled"; +}; + +&wcd939x_codec { + status = "okay"; +}; + +&swr0 { + wsa884x_0220: wsa884x@02170220 { + status = "okay"; + }; + + wsa884x_0221: wsa884x@02170221 { + status = "okay"; + }; +}; + +&tuna_snd { + qcom,model = "tuna-cdp-snd-card"; + swr-haptics-unsupported; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS1", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS1", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS3", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS3", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS1", + "VA DMIC1", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS3", + "VA DMIC3", "VA MIC BIAS3"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, + <&wsa884x_0220>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", + "wsa-codec1", "wsa-codec2"; + qcom,wsa-max-devs = <2>; + wcd939x-i2c-handle = <&wcd_usbss>; + qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; + qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; + qcom,quat-mi2s-gpios = <&cdc_quat_mi2s_gpios>; + qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>; + qcom,sen-mi2s-gpios = <&cdc_sen_mi2s_gpios>; + qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; + qcom,usbss-hsj-connect-enabled; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; +}; diff --git a/tuna-audio-hamilton-mtp.dts b/tuna-audio-hamilton-mtp.dts new file mode 100644 index 00000000..ca0b2fa9 --- /dev/null +++ b/tuna-audio-hamilton-mtp.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-audio-hamilton-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", + "qcom,mtp"; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <8 2>; +}; diff --git a/tuna-audio-hamilton-mtp.dtsi b/tuna-audio-hamilton-mtp.dtsi new file mode 100644 index 00000000..4bb1631c --- /dev/null +++ b/tuna-audio-hamilton-mtp.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "tuna-audio-mtp.dtsi" + + +&lpass_bt_swr { + status = "disabled"; +}; + +&tuna_snd { + qcom,model = "tuna-mtp-snd-card"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; +}; diff --git a/tuna-audio-hamilton-rcm.dts b/tuna-audio-hamilton-rcm.dts new file mode 100644 index 00000000..abce2d58 --- /dev/null +++ b/tuna-audio-hamilton-rcm.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-audio-hamilton-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna RCM + kiwi WLAN"; + compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap", + "qcom,rcm"; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <21 1>; +}; diff --git a/tuna-audio-hamilton-rcm.dtsi b/tuna-audio-hamilton-rcm.dtsi new file mode 100644 index 00000000..b7694596 --- /dev/null +++ b/tuna-audio-hamilton-rcm.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "tuna-audio-cdp.dtsi" + +&lpass_bt_swr { + status = "disabled"; +}; + +&tuna_snd { + qcom,model = "tuna-cdp-snd-card"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; +}; diff --git a/tuna-audio-mtp-qmp1000.dts b/tuna-audio-mtp-qmp1000.dts new file mode 100644 index 00000000..87ffd4b6 --- /dev/null +++ b/tuna-audio-mtp-qmp1000.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-audio-mtp-qmp1000.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna MTP QMP1000"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", + "qcom,mtp"; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <8 1>; +}; + diff --git a/tuna-audio-mtp-qmp1000.dtsi b/tuna-audio-mtp-qmp1000.dtsi new file mode 100644 index 00000000..164a1dcb --- /dev/null +++ b/tuna-audio-mtp-qmp1000.dtsi @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "tuna-audio-mtp.dtsi" + +&swr2 { + qmp01: qmp@04170232 { + /* + * reg = ; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC01"; + qcom,codec-name = "qmp-dmic.01"; + qmp-vdd-supply = <&wcd_mb3_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp02: qmp@04170236 { + reg = <0x0100 0x04170236>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC02"; + qcom,codec-name = "qmp-dmic.02"; + qmp-vdd-supply = <&wcd_mb3_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp03: qmp@04170230 { + reg = <0x0100 0x04170230>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC03"; + qcom,codec-name = "qmp-dmic.03"; + qmp-vdd-supply = <&wcd_mb1_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp04: qmp@04170239 { + reg = <0x0100 0x04170239>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC04"; + qcom,codec-name = "qmp-dmic.04"; + qmp-vdd-supply = <&wcd_mb1_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; +}; + +&sun_snd { + qcom,model = "tuna-mtp-qmp-snd-card"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, + <&wsa884x_0221>, <&wsa884x_0222>, + <&qmp01>, <&qmp02>, + <&qmp03>, <&qmp04>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", + "wsa-codec1", "wsa-codec2", + "qmp-dmic.01", "qmp-dmic.02", + "qmp-dmic.03", "qmp-dmic.04"; + qcom,qmp-mic = <1>; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS1", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS3", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "TX SWR_INPUT", "QMP_MIC01 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC02 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC03 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC04 NORMAL_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 VA_NORMAL_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; +}; diff --git a/tuna-audio-mtp.dts b/tuna-audio-mtp.dts new file mode 100644 index 00000000..ac99ba4b --- /dev/null +++ b/tuna-audio-mtp.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-audio-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna MTP"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", + "qcom,mtp"; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <8 0>; +}; + diff --git a/tuna-audio-mtp.dtsi b/tuna-audio-mtp.dtsi new file mode 100644 index 00000000..996187eb --- /dev/null +++ b/tuna-audio-mtp.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "tuna-audio-overlay.dtsi" + +&wsa_macro { + qcom,wsa-bat-cfgs= <1>, <1>; +}; + +&tuna_snd { + qcom,model = "tuna-mtp-snd-card"; + swr-haptics-unsupported; + qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; +}; diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi new file mode 100644 index 00000000..f691bcd1 --- /dev/null +++ b/tuna-audio-overlay.dtsi @@ -0,0 +1,767 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include "tuna-lpi.dtsi" + +&lpass_cdc { + qcom,num-macros = <4>; + qcom,lpass-cdc-version = <7>; + #address-cells = <1>; + #size-cells = <1>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>, + <0x3004 0x3 0x1>, <0x3080 0x2 0x2>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,wsa_mclk_mode_muxsel = <0x06BEA110>; + clock-names = "tx_core_clk", "rx_core_clk", "wsa_core_clk", + "rx_tx_core_clk", "wsa_tx_core_clk", "va_core_clk"; + clocks = <&clock_audio_tx_1 0>, <&clock_audio_rx_1 0>, + <&clock_audio_wsa_1 0>, <&clock_audio_rx_tx 0>, + <&clock_audio_wsa_tx 0>, <&clock_audio_va_1 0>; + }; + + va_macro: va-macro@7660000 { + compatible = "qcom,lpass-cdc-va-macro"; + reg = <0x7660000 0x0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,va-dmic-sample-rate = <600000>; + qcom,va-clk-mux-select = <1>; + qcom,default-clk-id = ; + qcom,use-clk-id = ; + qcom,is-used-swr-gpio = <1>; + qcom,va-swr-gpios = <&va_swr_gpios>; + swr2: va_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <3>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0x7630000 0x0>; + interrupts = + , + ; + interrupt-names = "swr_master_irq", "swr_wake_irq"; + qcom,swr-wakeup-required = <1>; + qcom,swr-num-ports = <5>; + qcom,swr-port-mapping = <1 SWRM_TX_PCM_OUT 0x3>, + <2 SWRM_TX1_CH1 0x1>, <2 SWRM_TX1_CH2 0x2>, + <2 SWRM_TX1_CH3 0x4>, <2 SWRM_TX1_CH4 0x8>, + <3 SWRM_TX2_CH1 0x1>, <3 SWRM_TX2_CH2 0x2>, + <3 SWRM_TX2_CH3 0x4>, <3 SWRM_TX2_CH4 0x8>, + <4 SWRM_TX3_CH1 0x1>, <4 SWRM_TX3_CH2 0x2>, + <4 SWRM_TX3_CH3 0x4>, <4 SWRM_TX3_CH4 0x8>, + <5 SWRM_TX_PCM_IN 0x3>; + qcom,swr-num-dev = <5>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-mstr-irq-wakeup-capable = <1>; + qcom,is-always-on = <1>; + wcd9378_tx_slave: wcd9378-tx-slave { + compatible = "qcom,wcd9378-slave"; + reg = <0x10 0x01170223>; + }; + + wcd939x_tx_slave: wcd939x-tx-slave { + status = "disabled"; + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170223>; + }; + }; + }; + + tx_macro: tx-macro@6AE0000 { + compatible = "qcom,lpass-cdc-tx-macro"; + reg = <0x6AE0000 0x0>; + qcom,default-clk-id = ; + qcom,tx-dmic-sample-rate = <2400000>; + qcom,is-used-swr-gpio = <0>; + }; + + rx_macro: rx-macro@6AC0000 { + compatible = "qcom,lpass-cdc-rx-macro"; + reg = <0x6AC0000 0x0>; + qcom,rx-swr-gpios = <&rx_swr_gpios>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + clock-names = "rx_mclk2_2x_clk"; + clocks = <&clock_audio_rx_mclk2_2x_clk 0>; + swr1: rx_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <2>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0x6ad0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <12>; + qcom,swr-port-mapping = <1 HPH_L 0x1>, + <1 HPH_R 0x2>, <2 CLSH 0x3>, + <3 COMP_L 0x1>, <3 COMP_R 0x2>, + <4 LO 0x1>, <5 DSD_L 0x1>, + <5 DSD_R 0x2>, <6 PCM_OUT1 0x01>, + <7 GPPO 0x03>, <8 HAPT 0x03>, + <9 HIFI_PCM_L 0x01>, <9 HIFI_PCM_R 0x2>, + <10 HPTH 0x03>, <11 CMPT 0x03>, <12 IPCM 0x03>; + + /* num-dev is 2 if WCD RX and PMIC SWR Slaves are connected */ + /* num-dev is 1 if only WCD RX slave is connected */ + qcom,swr-num-dev = <2>; + qcom,swr-clock-stop-mode0 = <1>; + swr_haptics: swr_haptics@f0170220 { + compatible = "qcom,pmih010x-swr-haptics"; + reg = <0x03 0xf0170220>; + swr-slave-supply = <&hap_swr_slave_reg>; + qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; + status = "disabled"; + }; + + wcd9378_rx_slave: wcd9378-rx-slave { + compatible = "qcom,wcd9378-slave"; + reg = <0x10 0x01170224>; + status = "okay"; + }; + + wcd939x_rx_slave: wcd939x-rx-slave { + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170224>; + status = "disabled"; + }; + }; + }; + + wsa_macro: wsa-macro@6B00000 { + compatible = "qcom,lpass-cdc-wsa-macro"; + reg = <0x6B00000 0x0>; + wsa_data_fs_ctl_reg = <0x6B6F000>; + qcom,wsa-swr-gpios = <&wsa_swr_gpios>; + qcom,wsa-bat-cfgs= <1>, <1>; + qcom,wsa-rloads= <2>, <2>; + qcom,wsa-system-gains= <0 9>, <0 9>; + qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + qcom,thermal-max-state = <11>; + qcom,noise-gate-mode = <2>; + #cooling-cells = <2>; + swr0: wsa_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <1>; + qcom,mipi-sdw-block-packing-mode = <0>; + swrm-io-base = <0x6b10000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <13>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-port-mapping = <1 SPKR_L 0x1>, + <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, + <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, + <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, + <8 SPKR_HAPT 0x3>, <9 OCPM 0x3>, + <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, + <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; + qcom,swr-num-dev = <2>; + qcom,dynamic-port-map-supported = <0>; + wsa884x_0220: wsa884x@02170220 { + compatible = "qcom,wsa884x"; + reg = <0x4 0x2170220>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , ; + cdc-vdd-1p8-supply = <&L7B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrLeft"; + }; + + wsa884x_0221: wsa884x@02170221 { + compatible = "qcom,wsa884x"; + reg = <0x4 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , ; + cdc-vdd-1p8-supply = <&L7B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrRight"; + }; + }; + }; + + wcd939x_codec: wcd939x-codec { + compatible = "qcom,wcd939x-codec"; + status = "disabled"; + qcom,split-codec = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>, <5 HIFI_PCM_L 0x1 0 HIFI_PCM_L>, + <5 HIFI_PCM_R 0x2 0 HIFI_PCM_R>; + + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <0 ADC2 0x2 0 SWRM_TX1_CH2>, + <1 ADC3 0x1 0 SWRM_TX1_CH3>, + <1 ADC4 0x2 0 SWRM_TX1_CH4>, + <2 DMIC0 0x1 0 SWRM_TX2_CH1>, + <2 DMIC1 0x2 0 SWRM_TX2_CH2>, + <2 MBHC 0x4 0 SWRM_TX2_CH3>, + <2 DMIC2 0x4 0 SWRM_TX2_CH3>, + <2 DMIC3 0x8 0 SWRM_TX2_CH4>, + <3 DMIC4 0x1 0 SWRM_TX3_CH1>, + <3 DMIC5 0x2 0 SWRM_TX3_CH2>, + <3 DMIC6 0x4 0 SWRM_TX3_CH3>, + <3 DMIC7 0x8 0 SWRM_TX3_CH4>; + + qcom,swr-tx-port-params = + , , + , , + , , + , , + , , + , , + , , + , ; + qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; + qcom,rx-slave = <&wcd939x_rx_slave>; + qcom,tx-slave = <&wcd939x_tx_slave>; + + cdc-vdd-rx-supply = <&L7B>; + qcom,cdc-vdd-rx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rx-current = <45000>; + qcom,cdc-vdd-rx-lpm-supported = <1>; + + cdc-vdd-tx-supply = <&L7B>; + qcom,cdc-vdd-tx-voltage = <1800000 1800000>; + qcom,cdc-vdd-tx-current = <45000>; + qcom,cdc-vdd-tx-lpm-supported = <1>; + + cdc-vdd-buck-supply = <&L7B>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <650000>; + qcom,cdc-vdd-buck-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <30000>; + + cdc-vdd-px-supply = <&L5B>; + qcom,cdc-vdd-px-voltage = <1200000 1200000>; + qcom,cdc-vdd-px-current = <15000>; + qcom,cdc-vdd-px-lpm-supported = <1>; + + qcom,cdc-vdd-px-rem-supported = <1>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + qcom,cdc-micbias4-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rx", + "cdc-vdd-tx", + "cdc-vdd-mic-bias"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck", + "cdc-vdd-px"; + + wcd_mb1_reg: qcom,wcd-mb1-reg { + regulator-name = "wcd-mb1-reg"; + }; + + wcd_mb2_reg: qcom,wcd-mb2-reg { + regulator-name = "wcd-mb2-reg"; + }; + + wcd_mb3_reg: qcom,wcd-mb3-reg { + regulator-name = "wcd-mb3-reg"; + }; + + wcd_mb4_reg: qcom,wcd-mb4-reg { + regulator-name = "wcd-mb4-reg"; + }; + }; + + wcd9378_codec: wcd9378-codec { + compatible = "qcom,wcd9378-codec"; + qcom,split-codec = <1>; + qcom,wcd-mode = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>; + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <1 ADC2 0x1 0 SWRM_TX1_CH2>, + <2 ADC3 0x1 0 SWRM_TX1_CH3>, + <3 DMIC0 0x4 0 SWRM_TX2_CH1>, + <3 DMIC1 0x8 0 SWRM_TX2_CH2>, + <3 MBHC 0x1 0 SWRM_TX2_CH3>, + <4 DMIC2 0x1 0 SWRM_TX2_CH3>, + <4 DMIC3 0x2 0 SWRM_TX2_CH4>, + <4 DMIC4 0x3 0 SWRM_TX3_CH1>, + <4 DMIC5 0x4 0 SWRM_TX3_CH2>; + qcom,swr-tx-port-params = + , , + , , + , , + , , + , , + , , + , , + , ; + qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; + qcom,rx-slave = <&wcd9378_rx_slave>; + qcom,tx-slave = <&wcd9378_tx_slave>; + + cdc-vdd-rxtx-supply = <&L7B>; + qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rxtx-current = <30000>; + qcom,cdc-vdd-rxtx-lpm-supported = <1>; + + cdc-vdd-io-supply = <&L5B>; + qcom,cdc-vdd-io-voltage = <1200000 1200000>; + qcom,cdc-vdd-io-current = <20000>; + qcom,cdc-vdd-io-lpm-supported = <1>; + + cdc-vdd-buck-supply = <&L7B>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <650000>; + qcom,cdc-vdd-buck-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <40055>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rxtx", + "cdc-vdd-io"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck"; + }; +}; + +&lpass_bt_swr { + clock-names = "bt_swr_mclk_clk", "bt_swr_mclk_clk_2x", + "lpass_core_hw_vote", "lpass_audio_hw_vote"; + clocks = <&clock_audio_bt_swr_mclk_clk 0>, + <&clock_audio_bt_swr_mclk_clk_2x 0>, + <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,bt-swr-gpios = <&bt_swr_gpios>; +}; + +&swr4 { + compatible = "qcom,swr-mstr"; + qcom,swr_master_id = <5>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + swrm-io-base = <0x06CA0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <7>; + qcom,swr-port-mapping = <1 BT_AUDIO_RX1 0x3>, + <2 BT_AUDIO_RX2 0x3>, <3 BT_AUDIO_RX3 0x3>, + <5 BT_AUDIO_TX1 0x3>, <6 BT_AUDIO_TX2 0x3>, + <7 BT_AUDIO_TX3 0x3>, <8 FM_AUDIO_TX1 0x3>; + qcom,swr-num-dev = <1>; +}; + +&spf_core_platform { + tuna_snd: sound { + qcom,model = "tuna-mtp-snd-card"; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,tdm-max-slots = <8>; + qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,audio-core-list = <0>, <1>; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", "wsa-codec1", + "wsa-codec2"; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,wsa-max-devs = <2>; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>, <&lpass_bt_swr>; + + }; + + cdc_pri_mi2s_gpios: pri_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active + &i2s0_sd0_active &i2s0_sd1_active>; + pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep + &i2s0_sd0_sleep &i2s0_sd1_sleep>; + #gpio-cells = <0>; + }; + + fm_i2s1_gpios: fm_i2s1_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&i2s1_sck_active &i2s1_ws_active + &i2s1_sd0_active>; + pinctrl-1 = <&i2s1_sck_sleep &i2s1_ws_sleep + &i2s1_sd0_sleep>; + #gpio-cells = <0>; + }; + + cdc_quat_mi2s_gpios: quat_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&quat_mi2s_sck_active &quat_mi2s_ws_active + &quat_mi2s_sd0_active &quat_mi2s_sd1_active + &quat_mi2s_sd2_active &quat_mi2s_sd3_active>; + pinctrl-1 = <&quat_mi2s_sck_sleep &quat_mi2s_ws_sleep + &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep + &quat_mi2s_sd2_sleep &quat_mi2s_sd3_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <138 143>; + #gpio-cells = <0>; + }; + + cdc_quin_mi2s_gpios: quin_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s1_sck_active &lpi_i2s1_ws_active + &lpi_i2s1_sd0_active &lpi_i2s1_sd1_active>; + pinctrl-1 = <&lpi_i2s1_sck_sleep &lpi_i2s1_ws_sleep + &lpi_i2s1_sd0_sleep &lpi_i2s1_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <144 147>; + #gpio-cells = <0>; + }; + + cdc_sen_mi2s_gpios: sen_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s2_sck_active &lpi_i2s2_ws_active + &lpi_i2s2_sd0_active &lpi_i2s2_sd1_active>; + pinctrl-1 = <&lpi_i2s2_sck_sleep &lpi_i2s2_ws_sleep + &lpi_i2s2_sd0_sleep &lpi_i2s2_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <148 151>; + #gpio-cells = <0>; + }; + + cdc_sep_mi2s_gpios: sep_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s3_sck_active &lpi_i2s3_ws_active + &lpi_i2s3_sd0_active &lpi_i2s3_sd1_active>; + pinctrl-1 = <&lpi_i2s3_sck_sleep &lpi_i2s3_ws_sleep + &lpi_i2s3_sd0_sleep &lpi_i2s3_sd1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <153 156>; + #gpio-cells = <0>; + }; + + wsa_swr_gpios: wsa_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>; + pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <149>; + #gpio-cells = <0>; + }; + + rx_swr_gpios: rx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active + &rx_swr_data1_active>; + pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep + &rx_swr_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <142>; + #gpio-cells = <0>; + }; + + va_swr_gpios: tx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active + &tx_swr_data1_active &tx_swr_data2_active>; + pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep + &tx_swr_data1_sleep &tx_swr_data2_sleep>; + qcom,lpi-gpios; + qcom,chip-wakeup-reg = <0xf18b008>; + qcom,chip-wakeup-maskbit = <7>; + qcom,chip-wakeup-default-val = <0x1>; + qcom,tlmm-pins = <139>; + #gpio-cells = <0>; + }; + + cdc_dmic01_gpios: cdc_dmic01_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>; + pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <144 145>; + #gpio-cells = <0>; + }; + + cdc_dmic23_gpios: cdc_dmic23_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>; + pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <146 147>; + #gpio-cells = <0>; + }; + + cdc_dmic45_gpios: cdc_dmic45_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic45_clk_active &cdc_dmic45_data_active>; + pinctrl-1 = <&cdc_dmic45_clk_sleep &cdc_dmic45_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <150 151>; + #gpio-cells = <0>; + }; + + cdc_dmic67_gpios: cdc_dmic67_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic67_clk_active &cdc_dmic67_data_active>; + pinctrl-1 = <&cdc_dmic67_clk_sleep &cdc_dmic67_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <155 156>; + #gpio-cells = <0>; + }; + + bt_swr_gpios: bt_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&bt_swr_clk_active &bt_swr_data_active>; + pinctrl-1 = <&bt_swr_clk_sleep &bt_swr_data_sleep>; + qcom,lpi-gpios; + #gpio-cells = <0>; + }; +}; + +&soc { + wsa_spkr_en02: wsa_spkr_en1_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_1_sd_n_active>; + pinctrl-1 = <&spkr_1_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wsa_spkr_en13: wsa_spkr_en2_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_2_sd_n_active>; + pinctrl-1 = <&spkr_2_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wcd_rst_gpio: msm_cdc_pinctrl@32 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_reset_active>; + pinctrl-1 = <&wcd_reset_sleep>; + }; + + clock_audio_va_1: va_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x307>; + #clock-cells = <1>; + }; + + clock_audio_wsa_1: wsa_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x309>; + #clock-cells = <1>; + }; + + clock_audio_rx_1: rx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <22579200>; + qcom,codec-lpass-clk-id = <0x30E>; + #clock-cells = <1>; + }; + + clock_audio_rx_tx: rx_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x312>; + #clock-cells = <1>; + }; + + clock_audio_tx_1: tx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x30C>; + #clock-cells = <1>; + }; + + clock_audio_wsa_tx: wsa_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x314>; + #clock-cells = <1>; + }; + + clock_audio_rx_mclk2_2x_clk: rx_mclk2_2x_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x318>; + #clock-cells = <1>; + }; + + clock_audio_bt_swr_mclk_clk: bt_swr_mclk_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <24576000>; + qcom,codec-lpass-clk-id = <0x31A>; + #clock-cells = <1>; + }; + + clock_audio_bt_swr_mclk_clk_2x: bt_swr_mclk_clk_2x { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <24576000>; + qcom,codec-lpass-clk-id = <0x31B>; + #clock-cells = <1>; + }; +}; + +&adsp_loader { + status = "ok"; +}; diff --git a/tuna-audio-qrd.dts b/tuna-audio-qrd.dts new file mode 100644 index 00000000..b637f501 --- /dev/null +++ b/tuna-audio-qrd.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-audio-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna QRD"; + compatible = "qcom,tuna-qrd", "qcom,tuna", "qcom,tunap-qrd", "qcom,tunap", + "qcom,qrd"; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <11 0>; +}; diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi new file mode 100644 index 00000000..2faaff61 --- /dev/null +++ b/tuna-audio-qrd.dtsi @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +#include "tuna-audio-overlay.dtsi" +&tx_swr_clk_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data0_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data1_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data2_active { + config { + drive-strength = <2>; + }; +}; + +&swr0 { + wsa884x_0220: wsa884x@02170220 { + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + sound-name-prefix = "SpkrRight"; + status = "okay"; + }; + + wsa884x_0221: wsa884x@02170221 { + status = "disabled"; + }; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs = <1>, <1>; +}; + +&wcd9378_codec { + status = "disabled"; +}; + +&wcd939x_codec { + status = "okay"; + /* 0 for digital crosstalk disabled, + * 1 for digital crosstalk with local sensed a-xtalk enabled, and + * 2 for digital crosstalk with remote sensed a-xtalk enabled. + */ + qcom,usbcss-hs-xtalk-config = <0>; + qcom,usbcss-hs-rdson = <600>; + qcom,usbcss-hs-r2 = <7550>; + qcom,usbcss-hs-r3 = <1>; + qcom,usbcss-hs-r4 = <330>; + qcom,usbcss-hs-r5 = <5>; + qcom,usbcss-hs-r6 = <1>; + qcom,usbcss-hs-r7 = <5>; + qcom,usbcss-hs-lin-k-aud = <13>; + qcom,usbcss-hs-lin-k-gnd = <13>; +}; + +&cdc_dmic01_gpios { + status = "disabled"; +}; + +&cdc_dmic23_gpios { + status = "disabled"; +}; + +&tuna_snd { + qcom,model = "tuna-qrd-snd-card"; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS4", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1"; + qcom,wsa-max-devs = <1>; + qcom,wcd-disable-legacy-surge; + wcd939x-i2c-handle = <&wcd_usbss>; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; +}; + + diff --git a/tuna-audio-rcm.dts b/tuna-audio-rcm.dts new file mode 100644 index 00000000..39c04ad1 --- /dev/null +++ b/tuna-audio-rcm.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-audio-cdp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Tuna RCM"; + compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap", + "qcom,rcm"; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <21 0>; +}; diff --git a/tuna-audio.dtsi b/tuna-audio.dtsi new file mode 100644 index 00000000..be4356bc --- /dev/null +++ b/tuna-audio.dtsi @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include "msm-audio-lpass.dtsi" + +&soc { + spf_core_platform: spf_core_platform { + compatible = "qcom,spf-core-platform"; + }; + + lpass_core_hw_vote: vote_lpass_core_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; + + lpass_audio_hw_vote: vote_lpass_audio_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; +}; + +&remoteproc_adsp_glink { + audio_gpr: qcom,gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,intents = <0x200 20>; + reg = ; + + spf_core { + compatible = "qcom,spf_core"; + reg = ; + }; + + audio-pkt { + compatible = "qcom,audio-pkt"; + qcom,audiopkt-ch-name = "apr_audio_svc"; + reg = ; + }; + + audio_prm: q6prm { + compatible = "qcom,audio_prm"; + qcom,sleep-api-supported = <1>; + reg = ; + }; + }; +}; + +&spf_core_platform { + + msm_audio_ion: qcom,msm-audio-ion { + compatible = "qcom,msm-audio-ion"; + qcom,smmu-version = <2>; + qcom,smmu-enabled; + iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1041 0x20>; + memory-region = <&audio_cnss_resv_region>; + qcom,iommu-group = <&cnss_audio_iommu_group0>; + qcom,smmu-sid-mask = /bits/ 64 <0xf>; + dma-coherent; + + audio_cnss_resv_region: audio_cnss_resv_region { + iommu-addresses = <&msm_audio_ion 0x00000000 0x18000000>, + <&msm_audio_ion 0xb0000000 0x50000000>; + }; + }; + + msm_audio_ion_cma: qcom,msm-audio-ion-cma { + compatible = "qcom,msm-audio-ion-cma"; + }; + + lpi_tlmm: lpi_pinctrl@07760000 { + compatible = "qcom,lpi-pinctrl"; + reg = <0x07760000 0x0>; + qcom,gpios-count = <23>; + qcom,slew-reg = <0x07760000 0x0>; + gpio-controller; + #gpio-cells = <2>; + qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>, + <0x00002000>, <0x00003000>, + <0x00004000>, <0x00005000>, + <0x00006000>, <0x00007000>, + <0x00008000>, <0x00009000>, + <0x0000A000>, <0x0000B000>, + <0x0000C000>, <0x0000D000>, + <0x0000E000>, <0x0000F000>, + <0x00010000>, <0x00011000>, + <0x00012000>, <0x00013000>, + <0x00014000>, <0x00015000>, + <0x00016000>; + qcom,lpi-slew-offset-tbl = <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>; + + qcom,lpi-slew-base-tbl = <0x7760000>, <0x7761000>, + <0x7762000>, <0x7763000>, + <0x7764000>, <0x7765000>, + <0x7766000>, <0x7767000>, + <0x7768000>, <0x7769000>, + <0x776A000>, <0x776B000>, + <0x776C000>, <0x776D000>, + <0x776E000>, <0x776F000>, + <0x7770000>, <0x7771000>, + <0x7772000>, <0x7773000>, + <0x7774000>, <0x7775000>, + <0x7776000>; + + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + }; + + lpass_cdc: lpass-cdc { + compatible = "qcom,lpass-cdc"; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + }; + + va_macro: va-macro@7660000 { + swr2: va_swr_master { + }; + }; + + tx_macro: tx-macro@6AE0000 { + }; + + rx_macro: rx-macro@6AC0000 { + swr1: rx_swr_master { + }; + }; + + wsa_macro: wsa-macro@6B00000 { + swr0: wsa_swr_master { + }; + }; + + }; + + lpass_bt_swr: lpass_bt_swr@6CA0000 { + compatible = "qcom,lpass-bt-swr"; + swr4: bt_swr_mstr { + }; + }; + + tuna_snd: sound { + compatible = "qcom,sun-asoc-snd"; + qcom,mi2s-audio-intf = <1>; + qcom,tdm-audio-intf = <0>; + qcom,auxpcm-audio-intf = <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,afe-rxtx-lb = <0>; + + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + }; +}; + +&aliases { + swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; + swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; +}; + +&adsp_loader { + /delete-property/ qcom,adsp-state; +}; diff --git a/tuna-lpi.dtsi b/tuna-lpi.dtsi new file mode 100644 index 00000000..e8a8f2c6 --- /dev/null +++ b/tuna-lpi.dtsi @@ -0,0 +1,2189 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&lpi_tlmm { + quat_mi2s_sck { + quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sck_active: quat_mi2s_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_ws { + quat_mi2s_ws_sleep: quat_mi2s_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_ws_active: quat_mi2s_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd0 { + quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd0_active: quat_mi2s_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd1 { + quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd1_active: quat_mi2s_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd2 { + quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd2_active: quat_mi2s_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd3 { + quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd3_active: quat_mi2s_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sck { + lpi_i2s1_sck_sleep: lpi_i2s1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sck_active: lpi_i2s1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_ws { + lpi_i2s1_ws_sleep: lpi_i2s1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_ws_active: lpi_i2s1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd0 { + lpi_i2s1_sd0_sleep: lpi_i2s1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sd0_active: lpi_i2s1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + + lpi_i2s1_sd1 { + lpi_i2s1_data1_active: lpi_i2s1_data1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s1_data1_sleep: lpi_i2s1_data1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + lpi_i2s2_sck { + lpi_i2s2_sck_active: lpi_i2s2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + + lpi_i2s2_sck_sleep: lpi_i2s2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s2_ws { + lpi_i2s2_ws_active: lpi_i2s2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s2_ws_sleep: lpi_i2s2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + }; + + + lpi_i2s2_sd0 { + lpi_i2s2_data0_active: lpi_i2s2_data0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + + lpi_i2s2_data0_sleep: lpi_i2s2_data0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + }; + + + lpi_i2s2_sd1 { + lpi_i2s2_data1_active: lpi_i2s2_data1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s2_data1_sleep: lpi_i2s2_data1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sck { + lpi_i2s3_sck_active: lpi_i2s3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_sck_sleep: lpi_i2s3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_ws { + lpi_i2s3_ws_active: lpi_i2s3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_ws_sleep: lpi_i2s3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sd0 { + lpi_i2s3_data0_active: lpi_i2s3_data0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_data0_sleep: lpi_i2s3_data0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sd1 { + lpi_i2s3_data1_active: lpi_i2s3_data1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_data1_sleep: lpi_i2s3_data1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + quat_tdm_ws { + quat_tdm_ws_sleep: quat_tdm_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_ws_active: quat_tdm_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd0 { + quat_tdm_sd0_sleep: quat_tdm_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd0_active: quat_tdm_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd1 { + quat_tdm_sd1_sleep: quat_tdm_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd1_active: quat_tdm_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd2 { + quat_tdm_sd2_sleep: quat_tdm_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd2_active: quat_tdm_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd3 { + quat_tdm_sd3_sleep: quat_tdm_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd3_active: quat_tdm_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sck { + lpi_tdm1_sck_sleep: lpi_tdm1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sck_active: lpi_tdm1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_ws { + lpi_tdm1_ws_sleep: lpi_tdm1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_ws_active: lpi_tdm1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sd0 { + lpi_tdm1_sd0_sleep: lpi_tdm1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd0_active: lpi_tdm1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sd1 { + lpi_tdm1_sd1_sleep: lpi_tdm1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd1_active: lpi_tdm1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm2_sck { + lpi_tdm2_sck_sleep: lpi_tdm2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sck_active: lpi_tdm2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_ws { + lpi_tdm2_ws_sleep: lpi_tdm2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_ws_active: lpi_tdm2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd0 { + lpi_tdm2_sd0_sleep: lpi_tdm2_sd0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd0_active: lpi_tdm2_sd0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm2_sd1 { + lpi_tdm2_sd1_sleep: lpi_tdm2_sd1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd1_active: lpi_tdm2_sd1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sck { + lpi_tdm3_sck_sleep: lpi_tdm3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sck_active: lpi_tdm3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_ws { + lpi_tdm3_ws_sleep: lpi_tdm3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_ws_active: lpi_tdm3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd0 { + lpi_tdm3_sd0_sleep: lpi_tdm3_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd0_active: lpi_tdm3_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd1 { + lpi_tdm3_sd1_sleep: lpi_tdm3_sd3_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd1_active: lpi_tdm3_sd1_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sck { + quat_aux_sck_sleep: quat_aux_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sck_active: quat_aux_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_ws { + quat_aux_ws_sleep: quat_aux_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_ws_active: quat_aux_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd0 { + quat_aux_sd0_sleep: quat_aux_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd0_active: quat_aux_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd1 { + quat_aux_sd1_sleep: quat_aux_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd1_active: quat_aux_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd2 { + quat_aux_sd2_sleep: quat_aux_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd2_active: quat_aux_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd3 { + quat_aux_sd3_sleep: quat_aux_sd3_sleep { + mux { + pins = "gpio5"; + function = "func2"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd3_active: quat_aux_sd3_active { + mux { + pins = "gpio5"; + function = "func2"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sck { + lpi_aux1_sck_sleep: lpi_aux1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sck_active: lpi_aux1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_ws { + lpi_aux1_ws_sleep: lpi_aux1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_ws_active: lpi_aux1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd0 { + lpi_aux1_sd0_sleep: lpi_aux1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd0_active: lpi_aux1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd1 { + lpi_aux1_sd1_sleep: lpi_aux1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd1_active: lpi_aux1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux2_sck { + lpi_aux2_sck_sleep: lpi_aux2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sck_active: lpi_aux2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_ws { + lpi_aux2_ws_sleep: lpi_aux2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_ws_active: lpi_aux2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd0 { + lpi_aux2_sd0_sleep: lpi_aux2_sd0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd0_active: lpi_aux2_sd0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux2_sd1 { + lpi_aux2_sd1_sleep: lpi_aux2_sd1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd1_active: lpi_aux2_sd1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_sck { + lpi_aux3_sck_sleep: lpi_aux3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sck_active: lpi_aux3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_ws { + lpi_aux3_ws_sleep: lpi_aux3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_ws_active: lpi_aux3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sd0 { + lpi_aux3_sd0_sleep: lpi_aux3_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd0_active: lpi_aux3_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_sd1 { + lpi_aux3_sd1_sleep: lpi_aux3_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd1_active: lpi_aux3_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + bt_swr_clk_pin { + bt_swr_clk_sleep: bt_swr_clk_sleep { + mux { + pins = "gpio19"; + function = "func3"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + bt_swr_clk_active: bt_swr_clk_active { + mux { + pins = "gpio19"; + function = "func3"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + bt_swr_data_pin { + bt_swr_data_sleep: bt_swr_data_sleep { + mux { + pins = "gpio20"; + function = "func3"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + bt_swr_data_active: bt_swr_data_active { + mux { + pins = "gpio20"; + function = "func3"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + + tx_swr_clk_active: tx_swr_clk_active { + mux { + pins = "gpio0"; + function = "func1"; + + }; + + config { + pins = "gpio0"; + drive-strength = <4>; + slew-rate = <1>; + bias-disable; + }; + }; + + tx_swr_clk_sleep: tx_swr_clk_sleep { + mux { + pins = "gpio0"; + function = "func1"; + input-enable; + bias-pull-down; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + + }; + }; + + tx_swr_data0_active: tx_swr_data0_active { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <4>; + slew-rate = <1>; + bias-disable; + + }; + }; + + tx_swr_data0_sleep: tx_swr_data0_sleep { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; + input-enable; + bias-bus-hold; + + }; + }; + + tx_swr_data1_active: tx_swr_data1_active { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data1_sleep: tx_swr_data1_sleep { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + tx_swr_data2_active: tx_swr_data2_active { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio14"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data2_sleep: tx_swr_data2_sleep { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_clk_active: rx_swr_clk_active { + mux { + pins = "gpio3"; + function = "func1"; + + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + + rx_swr_clk_sleep: rx_swr_clk_sleep { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + rx_swr_data_active: rx_swr_data_active { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + rx_swr_data_sleep: rx_swr_data_sleep { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + rx_swr_data1_active: rx_swr_data1_active { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + rx_swr_data1_sleep: rx_swr_data1_sleep { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + cdc_dmic01_clk_active: dmic01_clk_active { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic01_clk_sleep: dmic01_clk_sleep { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic01_data_active: dmic01_data_active { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic01_data_sleep: dmic01_data_sleep { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic23_clk_active: dmic23_clk_active { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic23_clk_sleep: dmic23_clk_sleep { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic23_data_active: dmic23_data_active { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic23_data_sleep: dmic23_data_sleep { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_clk_active: cdc_dmic45_clk_active { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_clk_sleep: lpi_dmic45_clk_sleep { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_data_active: cdc_dmic45_data_active { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins ="gpio13"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_data_sleep: cdc_dmic45_data_sleep { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + cdc_dmic67_clk_active: cdc_dmic67_clk_active { + mux { + pins = "gpio21"; + function = "func2"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; + input-enable; + + }; + }; + + cdc_dmic67_clk_sleep: lpi_dmic67_clk_sleep { + mux { + pins = "gpio21"; + function = "func2"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + cdc_dmic67_data_active: cdc_dmic67_data_active { + mux { + pins = "gpio22"; + function = "func2"; + }; + + config { + pins ="gpio22"; + drive-strength = <8>; + input-enable; + + + }; + }; + + cdc_dmic67_data_sleep: cdc_dmic67_data_sleep { + mux { + pins = "gpio22"; + function = "func2"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + + wsa_swr_clk_pin { + wsa_swr_clk_sleep: wsa_swr_clk_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_clk_active: wsa_swr_clk_active { + mux { + pins = "gpio10"; + function = "func1"; + + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + wsa_swr_data_pin { + wsa_swr_data_active: wsa_swr_data_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + wsa_swr_data_sleep: wsa_swr_data_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + }; + +}; From d2a2d0eb0bc5acbdcaca0ef6b39b427ee39d4a38 Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Fri, 11 Oct 2024 20:12:36 +0530 Subject: [PATCH 076/143] ARM: dts: msm: Add support for Tuna7 - Add support for Tuna7 Change-Id: I681cdb385c23b589a7db8a457bbc12374af14337 Signed-off-by: Kisan Yadav --- tuna7-audio-mtp.dts | 17 ++++++++ tuna7-audio-mtp.dtsi | 96 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 113 insertions(+) create mode 100644 tuna7-audio-mtp.dts create mode 100644 tuna7-audio-mtp.dtsi diff --git a/tuna7-audio-mtp.dts b/tuna7-audio-mtp.dts new file mode 100644 index 00000000..6d8fad89 --- /dev/null +++ b/tuna7-audio-mtp.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna7-audio-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna 7"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", + "qcom,mtp"; + qcom,msm-id = <681 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi new file mode 100644 index 00000000..a8e30ed0 --- /dev/null +++ b/tuna7-audio-mtp.dtsi @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "tuna-audio-mtp.dtsi" + +&lpass_bt_swr { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd9378_codec { + status = "disabled"; +}; + +&wcd939x_codec { + status = "okay"; +}; + +&tuna_snd { + qcom,model = "tuna7-mtp-snd-card"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1", + "wsa-codec2"; + + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; +}; From 911a93d2fe95b3abd820b30b35b7bd9565d5fb7e Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 17 Oct 2024 14:20:03 +0530 Subject: [PATCH 077/143] ARM: dts: msm: Correction of i2s nodes in overlay Correction of i2s nodes in overlay and lpi files in Tuna platform. Change-Id: I4195ce95a8d871f4a5bc5e8ab6ddf0286d14aec4 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 1 + tuna-audio-mtp-qmp1000.dtsi | 4 ++-- tuna-audio-overlay.dtsi | 14 +++++++------- tuna-audio.dts | 4 ++-- tuna-audio.dtsi | 1 - tuna-lpi.dtsi | 4 ++-- 6 files changed, 14 insertions(+), 14 deletions(-) diff --git a/Kbuild b/Kbuild index b50df40c..4dee0ac9 100644 --- a/Kbuild +++ b/Kbuild @@ -33,6 +33,7 @@ dtbo-y += sun-audio.dtbo \ sun-audio-hamilton-mtp.dtbo \ sun-audio-hamilton-mtp-3.5mm.dtbo \ tuna-audio-atp.dtbo \ + tuna-audio.dtbo \ tuna-audio-cdp.dtbo \ tuna-audio-hamilton-mtp.dtbo \ tuna-audio-hamilton-rcm.dtbo \ diff --git a/tuna-audio-mtp-qmp1000.dtsi b/tuna-audio-mtp-qmp1000.dtsi index 164a1dcb..0535db34 100644 --- a/tuna-audio-mtp-qmp1000.dtsi +++ b/tuna-audio-mtp-qmp1000.dtsi @@ -83,11 +83,11 @@ }; }; -&sun_snd { +&tuna_snd { qcom,model = "tuna-mtp-qmp-snd-card"; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd9378_codec>, - <&wsa884x_0221>, <&wsa884x_0222>, + <&wsa884x_0220>, <&wsa884x_0221>, <&qmp01>, <&qmp02>, <&qmp03>, <&qmp04>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index f691bcd1..1d146e13 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -127,7 +127,7 @@ swr_haptics: swr_haptics@f0170220 { compatible = "qcom,pmih010x-swr-haptics"; reg = <0x03 0xf0170220>; - swr-slave-supply = <&hap_swr_slave_reg>; + //swr-slave-supply = <&hap_swr_slave_reg>; qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; status = "disabled"; }; @@ -542,9 +542,9 @@ compatible = "qcom,msm-cdc-pinctrl"; pinctrl-names = "aud_active", "aud_sleep"; pinctrl-0 = <&lpi_i2s1_sck_active &lpi_i2s1_ws_active - &lpi_i2s1_sd0_active &lpi_i2s1_sd1_active>; + &lpi_i2s1_data0_active &lpi_i2s1_data1_active>; pinctrl-1 = <&lpi_i2s1_sck_sleep &lpi_i2s1_ws_sleep - &lpi_i2s1_sd0_sleep &lpi_i2s1_sd1_sleep>; + &lpi_i2s1_data0_sleep &lpi_i2s1_data1_sleep>; qcom,lpi-gpios; qcom,tlmm-pins = <144 147>; #gpio-cells = <0>; @@ -555,9 +555,9 @@ compatible = "qcom,msm-cdc-pinctrl"; pinctrl-names = "aud_active", "aud_sleep"; pinctrl-0 = <&lpi_i2s2_sck_active &lpi_i2s2_ws_active - &lpi_i2s2_sd0_active &lpi_i2s2_sd1_active>; + &lpi_i2s2_data0_active &lpi_i2s2_data1_active>; pinctrl-1 = <&lpi_i2s2_sck_sleep &lpi_i2s2_ws_sleep - &lpi_i2s2_sd0_sleep &lpi_i2s2_sd1_sleep>; + &lpi_i2s2_data0_sleep &lpi_i2s2_data1_sleep>; qcom,lpi-gpios; qcom,tlmm-pins = <148 151>; #gpio-cells = <0>; @@ -568,9 +568,9 @@ compatible = "qcom,msm-cdc-pinctrl"; pinctrl-names = "aud_active", "aud_sleep"; pinctrl-0 = <&lpi_i2s3_sck_active &lpi_i2s3_ws_active - &lpi_i2s3_sd0_active &lpi_i2s3_sd1_active>; + &lpi_i2s3_data0_active &lpi_i2s3_data1_active>; pinctrl-1 = <&lpi_i2s3_sck_sleep &lpi_i2s3_ws_sleep - &lpi_i2s3_sd0_sleep &lpi_i2s3_sd1_sleep>; + &lpi_i2s3_data0_sleep &lpi_i2s3_data1_sleep>; qcom,lpi-gpios; qcom,tlmm-pins = <153 156>; #gpio-cells = <0>; diff --git a/tuna-audio.dts b/tuna-audio.dts index 3291558f..a56067d5 100644 --- a/tuna-audio.dts +++ b/tuna-audio.dts @@ -6,9 +6,9 @@ /dts-v1/; /plugin/; -#include +#include #include -#include +#include #include #include "tuna-audio.dtsi" diff --git a/tuna-audio.dtsi b/tuna-audio.dtsi index be4356bc..dfe2a8b0 100644 --- a/tuna-audio.dtsi +++ b/tuna-audio.dtsi @@ -59,7 +59,6 @@ qcom,smmu-enabled; iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1041 0x20>; memory-region = <&audio_cnss_resv_region>; - qcom,iommu-group = <&cnss_audio_iommu_group0>; qcom,smmu-sid-mask = /bits/ 64 <0xf>; dma-coherent; diff --git a/tuna-lpi.dtsi b/tuna-lpi.dtsi index e8a8f2c6..ebf2e7b9 100644 --- a/tuna-lpi.dtsi +++ b/tuna-lpi.dtsi @@ -245,7 +245,7 @@ }; lpi_i2s1_sd0 { - lpi_i2s1_sd0_sleep: lpi_i2s1_sd0_sleep { + lpi_i2s1_data0_sleep: lpi_i2s1_data0_sleep { mux { pins = "gpio8"; function = "func2"; @@ -259,7 +259,7 @@ }; }; - lpi_i2s1_sd0_active: lpi_i2s1_sd0_active { + lpi_i2s1_data0_active: lpi_i2s1_data0_active { mux { pins = "gpio8"; function = "func2"; From a82edd51205c048fc8b1dc45d4301df59ee4aecf Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 18 Oct 2024 16:01:49 +0530 Subject: [PATCH 078/143] ARM: dts: msm:update the bcs signal port for tuna Update the bcs signal port for Tuna, the bcs is on DP4 CH3. Change-Id: Icaf2239a0da5f332124a726db0edde05aa67bb1e Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-overlay.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index f691bcd1..9d6de312 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -345,7 +345,7 @@ <2 ADC3 0x1 0 SWRM_TX1_CH3>, <3 DMIC0 0x4 0 SWRM_TX2_CH1>, <3 DMIC1 0x8 0 SWRM_TX2_CH2>, - <3 MBHC 0x1 0 SWRM_TX2_CH3>, + <3 MBHC 0x4 0 SWRM_TX2_CH3>, <4 DMIC2 0x1 0 SWRM_TX2_CH3>, <4 DMIC3 0x2 0 SWRM_TX2_CH4>, <4 DMIC4 0x3 0 SWRM_TX3_CH1>, From ce266d114be7eb2491b7fb22a53c4cc1cbc28c6c Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 29 Oct 2024 11:59:38 +0530 Subject: [PATCH 079/143] ARM: dts: msm: Add support for TunaP -Add and update MSM_ID for TunaP. Change-Id: I8d5c4b306e11b594e466ce749e788061123977b0 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-atp.dts | 2 +- tuna-audio-cdp.dts | 2 +- tuna-audio-hamilton-mtp.dts | 2 +- tuna-audio-hamilton-rcm.dts | 2 +- tuna-audio-mtp-qmp1000.dts | 2 +- tuna-audio-mtp.dts | 2 +- tuna-audio-qrd.dts | 2 +- tuna-audio-rcm.dts | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/tuna-audio-atp.dts b/tuna-audio-atp.dts index 35f93660..5ba54dc9 100644 --- a/tuna-audio-atp.dts +++ b/tuna-audio-atp.dts @@ -12,6 +12,6 @@ compatible = "qcom,tuna-atp", "qcom,tuna", "qcom,tunap-atp", "qcom,tunap", "qcom,atp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <33 0>; }; diff --git a/tuna-audio-cdp.dts b/tuna-audio-cdp.dts index 8acd92ac..32bc79b4 100644 --- a/tuna-audio-cdp.dts +++ b/tuna-audio-cdp.dts @@ -12,7 +12,7 @@ model = "Qualcomm Technologies, Inc. Tuna CDP"; compatible = "qcom,tuna-cdp", "qcom,tuna", "qcom,tunap-cdp", "qcom,tunap", "qcom,cdp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <1 0>; }; diff --git a/tuna-audio-hamilton-mtp.dts b/tuna-audio-hamilton-mtp.dts index ca0b2fa9..2307e397 100644 --- a/tuna-audio-hamilton-mtp.dts +++ b/tuna-audio-hamilton-mtp.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <8 2>; }; diff --git a/tuna-audio-hamilton-rcm.dts b/tuna-audio-hamilton-rcm.dts index abce2d58..b622dd09 100644 --- a/tuna-audio-hamilton-rcm.dts +++ b/tuna-audio-hamilton-rcm.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna RCM + kiwi WLAN"; compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap", "qcom,rcm"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <21 1>; }; diff --git a/tuna-audio-mtp-qmp1000.dts b/tuna-audio-mtp-qmp1000.dts index 87ffd4b6..b2722bcd 100644 --- a/tuna-audio-mtp-qmp1000.dts +++ b/tuna-audio-mtp-qmp1000.dts @@ -12,7 +12,7 @@ model = "Qualcomm Technologies, Inc. Tuna MTP QMP1000"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <8 1>; }; diff --git a/tuna-audio-mtp.dts b/tuna-audio-mtp.dts index ac99ba4b..fef29692 100644 --- a/tuna-audio-mtp.dts +++ b/tuna-audio-mtp.dts @@ -12,7 +12,7 @@ model = "Qualcomm Technologies, Inc. Tuna MTP"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <8 0>; }; diff --git a/tuna-audio-qrd.dts b/tuna-audio-qrd.dts index b637f501..616e5aa1 100644 --- a/tuna-audio-qrd.dts +++ b/tuna-audio-qrd.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna QRD"; compatible = "qcom,tuna-qrd", "qcom,tuna", "qcom,tunap-qrd", "qcom,tunap", "qcom,qrd"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <11 0>; }; diff --git a/tuna-audio-rcm.dts b/tuna-audio-rcm.dts index 39c04ad1..1b532e17 100644 --- a/tuna-audio-rcm.dts +++ b/tuna-audio-rcm.dts @@ -11,6 +11,6 @@ model = "Qualcomm Technologies, Inc. Tuna RCM"; compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap", "qcom,rcm"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <21 0>; }; From 412366391332cbe1b6afab92523f6b18787ab328 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 22 Oct 2024 15:28:23 +0530 Subject: [PATCH 080/143] ARM: dts: msm: Add support for WCD939x in tuna7 -Add and update MSM_ID for tuna7. -Add Board_Id for tuna7. -Add AATC support for tuna7 platform. Change-Id: I7f470c0150ec95b556087ab6797787b9754e8464 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 1 + tuna7-audio-mtp.dts | 4 ++-- tuna7-audio-mtp.dtsi | 43 ++++++++++++++++++++++++++++++++++--------- 3 files changed, 37 insertions(+), 11 deletions(-) diff --git a/Kbuild b/Kbuild index 4dee0ac9..41df44be 100644 --- a/Kbuild +++ b/Kbuild @@ -38,6 +38,7 @@ dtbo-y += sun-audio.dtbo \ tuna-audio-hamilton-mtp.dtbo \ tuna-audio-hamilton-rcm.dtbo \ tuna-audio-mtp.dtbo \ + tuna7-audio-mtp.dtbo \ tuna-audio-mtp-qmp1000.dtbo \ tuna-audio-qrd.dtbo \ tuna-audio-rcm.dtbo diff --git a/tuna7-audio-mtp.dts b/tuna7-audio-mtp.dts index 6d8fad89..746c8187 100644 --- a/tuna7-audio-mtp.dts +++ b/tuna7-audio-mtp.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna 7"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>; - qcom,board-id = <0 0>; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <8 3>, <8 4>; }; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index a8e30ed0..74de7073 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -21,24 +21,34 @@ status = "okay"; }; +&wcd939x_rx_slave { + status = "okay"; +}; + &wcd9378_codec { status = "disabled"; }; &wcd939x_codec { status = "okay"; + /* 0 for digital crosstalk disabled, + * 1 for digital crosstalk with local sensed a-xtalk enabled, and + * 2 for digital crosstalk with remote sensed a-xtalk enabled. + */ + qcom,usbcss-hs-xtalk-config = <0>; + qcom,usbcss-hs-rdson = <600>; + qcom,usbcss-hs-r2 = <7550>; + qcom,usbcss-hs-r3 = <1>; + qcom,usbcss-hs-r4 = <330>; + qcom,usbcss-hs-r5 = <5>; + qcom,usbcss-hs-r6 = <1>; + qcom,usbcss-hs-r7 = <5>; + qcom,usbcss-hs-lin-k-aud = <13>; + qcom,usbcss-hs-lin-k-gnd = <13>; }; &tuna_snd { qcom,model = "tuna7-mtp-snd-card"; - qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, - <&lpass_cdc>; - asoc-codec = <&stub_codec>, <&lpass_cdc>, - <&wcd939x_codec>, <&wsa884x_0220>, - <&wsa884x_0221>; - asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec1", - "wsa-codec2"; qcom,audio-routing = "AMIC1", "Analog Mic1", @@ -71,7 +81,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_AUX", "AUX_OUT", + "IN3_EAR", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -93,4 +103,19 @@ "VA DMIC1", "VA MIC BIAS3", "VA DMIC2", "VA MIC BIAS1", "VA DMIC3", "VA MIC BIAS1"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1", + "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,wcd-disable-legacy-surge; + wcd939x-i2c-handle = <&wcd_usbss>; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; }; From 3d9ce00821ffee8c195de324e3dc91a85baac387 Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Wed, 23 Oct 2024 14:50:34 +0530 Subject: [PATCH 081/143] ARM: dts: msm: Update correct wsa codec - Update correct wsa codec for monospeaker usecase. Change-Id: Id064bd37758235161bbb4cadacfaf4368393e951 Signed-off-by: Kisan Yadav --- tuna-audio-qrd.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 2faaff61..5cb9ac46 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -112,7 +112,7 @@ asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec1"; + "wcd939x_codec", "wsa-codec2"; qcom,wsa-max-devs = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; From efe96d7aa4f0ddcbbecf6693c74f79c9673d68df Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 28 Oct 2024 10:25:13 +0530 Subject: [PATCH 082/143] ARM: dts: msm: Add support for platforms for Kera Add audio device tree support for ATP, CDP, MTP, QRD, RCM platforms for Kera SoC. Change-Id: I902e8704d07cafe118047b152d83979f57cbf334 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 12 + kera-audio-atp.dts | 17 + kera-audio-atp.dtsi | 63 + kera-audio-cdp.dts | 19 + kera-audio-cdp.dtsi | 141 +++ kera-audio-lpass-reg.dtsi | 37 + kera-audio-mtp-qmp1000.dts | 18 + kera-audio-mtp-qmp1000.dtsi | 194 ++++ kera-audio-mtp.dts | 18 + kera-audio-mtp.dtsi | 164 +++ kera-audio-overlay.dtsi | 740 ++++++++++++ kera-audio-qrd.dts | 17 + kera-audio-qrd.dtsi | 85 ++ kera-audio-rcm.dts | 17 + kera-audio.dts | 21 + kera-audio.dtsi | 186 +++ kera-lpi.dtsi | 2189 +++++++++++++++++++++++++++++++++++ 17 files changed, 3938 insertions(+) create mode 100644 kera-audio-atp.dts create mode 100644 kera-audio-atp.dtsi create mode 100644 kera-audio-cdp.dts create mode 100644 kera-audio-cdp.dtsi create mode 100644 kera-audio-lpass-reg.dtsi create mode 100644 kera-audio-mtp-qmp1000.dts create mode 100644 kera-audio-mtp-qmp1000.dtsi create mode 100644 kera-audio-mtp.dts create mode 100644 kera-audio-mtp.dtsi create mode 100644 kera-audio-overlay.dtsi create mode 100644 kera-audio-qrd.dts create mode 100644 kera-audio-qrd.dtsi create mode 100644 kera-audio-rcm.dts create mode 100644 kera-audio.dts create mode 100644 kera-audio.dtsi create mode 100644 kera-lpi.dtsi diff --git a/Kbuild b/Kbuild index 41df44be..7f2413b5 100644 --- a/Kbuild +++ b/Kbuild @@ -44,6 +44,18 @@ dtbo-y += sun-audio.dtbo \ tuna-audio-rcm.dtbo endif + +ifeq ($(CONFIG_ARCH_KERA), y) +dtbo-y += kera-audio.dtbo \ + kera-audio-atp.dtbo \ + kera-audio-cdp.dtbo \ + kera-audio-mtp.dtbo \ + kera-audio-mtp-qmp1000.dtbo \ + kera-audio-qrd.dtbo \ + kera-audio-rcm.dtbo + +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/kera-audio-atp.dts b/kera-audio-atp.dts new file mode 100644 index 00000000..aff7ea8d --- /dev/null +++ b/kera-audio-atp.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-atp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kera ATP"; + compatible = "qcom,kera-atp", "qcom,kera", "qcom,kerap-atp", "qcom,kerap", + "qcom,atp"; + + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <33 0>; +}; diff --git a/kera-audio-atp.dtsi b/kera-audio-atp.dtsi new file mode 100644 index 00000000..3d2cee82 --- /dev/null +++ b/kera-audio-atp.dtsi @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-mtp.dtsi" + +&lpass_bt_swr { + status = "disabled"; +}; + +&kera_snd { + qcom,wcn-btfm = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,wcd-disabled =<1>; + qcom,audio-routing = + "TX DMIC0", "Digital Mic0", + "TX DMIC1", "Digital Mic1", + "TX DMIC2", "Digital Mic2", + "TX DMIC3", "Digital Mic3"; + qcom,wsa-max-devs = <0>; +}; + +&wsa_swr { + qcom,swr-num-dev = <0>; +}; + +&wsa884x_0220 { + status = "disabled"; +}; + +&wsa884x_0221 { + status = "disabled"; +}; + +&wcd939x_codec { + status = "disabled"; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd9378_codec { + status = "disabled"; +}; + +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs= <4>, <4>; +}; + diff --git a/kera-audio-cdp.dts b/kera-audio-cdp.dts new file mode 100644 index 00000000..179f0f45 --- /dev/null +++ b/kera-audio-cdp.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera CDP"; + compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap", + "qcom,cdp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x10001 0>, <0x20001 0>, + <0x30001 0>, <0x40001 0>; +}; + diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi new file mode 100644 index 00000000..b14dcf5d --- /dev/null +++ b/kera-audio-cdp.dtsi @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-overlay.dtsi" +#include "kera-audio-lpass-reg.dtsi" + +&cdc_pri_mi2s_gpios { + status = "ok"; +}; + +&cdc_quat_mi2s_gpios { + status = "disabled"; +}; + +&cdc_quin_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sen_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sep_mi2s_gpios { + status = "disabled"; +}; + +&lpass_bt_swr { + status = "disabled"; +}; + +&wcd9378_codec { + status = "okay"; + cdc-vdd-io-supply = <&L7B>; + qcom,cdc-vdd-io-voltage = <1800000 1800000>; + qcom,cdc-vdd-io-current = <20000>; + qcom,cdc-vdd-io-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>; + qcom,cdc-vdd-mic-bias-current = <40550>; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd9378_rx_slave { + status = "okay"; +}; + +&wcd9378_tx_slave { + status = "okay"; +}; + +&wsa_swr { + wsa884x_0220: wsa884x@02170220 { + status = "okay"; + }; + + wsa884x_0221: wsa884x@02170221 { + status = "okay"; + }; +}; + +&kera_snd { + qcom,model = "kera-cdp-snd-card"; + swr-haptics-unsupported; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS1", + "VA DMIC1", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS3", + "VA DMIC3", "VA MIC BIAS3"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, + <&wsa884x_0220>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", + "wsa-codec1", "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; + qcom,quat-mi2s-gpios = <&cdc_quat_mi2s_gpios>; + qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>; + qcom,sen-mi2s-gpios = <&cdc_sen_mi2s_gpios>; + qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; +}; diff --git a/kera-audio-lpass-reg.dtsi b/kera-audio-lpass-reg.dtsi new file mode 100644 index 00000000..d42a3289 --- /dev/null +++ b/kera-audio-lpass-reg.dtsi @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +&rx_macro { + reg = <0x6AC0000 0x0>; +}; + +&rx_swr { + swrm-io-base = <0x6AD0000 0x0>; + interrupts = ; +}; + +&tx_macro { + reg = <0x6AE0000 0x0>; +}; + +&wsa_macro { + reg = <0x6B00000 0x0>; +}; + +&wsa_swr { + swrm-io-base = <0x6B10000 0x0>; + interrupts = ; +}; + +&tx_swr { + reg = <0x7630000 0x0>; +}; + +&va_macro { + reg = <0x7660000 0x0>; +}; + +&tlmm { + reg = <0x7760000 0x0>; +}; diff --git a/kera-audio-mtp-qmp1000.dts b/kera-audio-mtp-qmp1000.dts new file mode 100644 index 00000000..dc1b558a --- /dev/null +++ b/kera-audio-mtp-qmp1000.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-mtp-qmp1000.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera MTP QMP1000"; + compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap", + "qcom,mtp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x30008 0>, <0x30008 1>; +}; + diff --git a/kera-audio-mtp-qmp1000.dtsi b/kera-audio-mtp-qmp1000.dtsi new file mode 100644 index 00000000..4d803fc7 --- /dev/null +++ b/kera-audio-mtp-qmp1000.dtsi @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-mtp.dtsi" + +&rx_swr { + qcom,swr-num-dev = <2>; +}; + +&wcd9378_rx_slave { + status = "okay"; +}; + +&wcd9378_tx_slave { + status = "okay"; +}; + +&wcd9378_codec { + status = "okay"; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd939x_codec { + status = "disabled"; +}; + +&tx_swr { + qmp01: qmp@04170232 { + /* + * reg = ; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC01"; + qcom,codec-name = "qmp-dmic.01"; + qmp-vdd-supply = <&wcd_mb3_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp02: qmp@04170236 { + reg = <0x0100 0x04170236>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC02"; + qcom,codec-name = "qmp-dmic.02"; + qmp-vdd-supply = <&wcd_mb3_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp03: qmp@04170230 { + reg = <0x0100 0x04170230>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC03"; + qcom,codec-name = "qmp-dmic.03"; + qmp-vdd-supply = <&wcd_mb1_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp04: qmp@04170239 { + reg = <0x0100 0x04170239>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC04"; + qcom,codec-name = "qmp-dmic.04"; + qmp-vdd-supply = <&wcd_mb1_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; +}; + +&kera_snd { + qcom,model = "kera-mtp-qmp-snd-card"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, + <&wsa884x_0220>, <&wsa884x_0221>, + <&qmp01>, <&qmp02>, + <&qmp03>, <&qmp04>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", + "wsa-codec1", "wsa-codec2", + "qmp-dmic.01", "qmp-dmic.02", + "qmp-dmic.03", "qmp-dmic.04"; + qcom,qmp-mic = <1>; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "TX SWR_INPUT", "QMP_MIC01 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC02 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC03 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC04 NORMAL_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 VA_NORMAL_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; +}; diff --git a/kera-audio-mtp.dts b/kera-audio-mtp.dts new file mode 100644 index 00000000..778c442d --- /dev/null +++ b/kera-audio-mtp.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera MTP"; + compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap", + "qcom,mtp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x10008 0>, <0x20008 0>, <0x10008 1>, <0x20008 1>; +}; + diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi new file mode 100644 index 00000000..0c0647b0 --- /dev/null +++ b/kera-audio-mtp.dtsi @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-overlay.dtsi" +#include "kera-audio-lpass-reg.dtsi" + +&tx_swr_clk_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data0_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data1_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data2_active { + config { + drive-strength = <2>; + }; +}; + +&rx_swr { + qcom,swr-num-dev = <2>; +}; + +&wsa_swr { + qcom,swr-num-dev = <2>; +}; + +&wsa884x_0220 { + status = "okay"; +}; + +&wsa884x_0221 { + status = "okay"; +}; + +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + +&wcd9378_codec { + status = "disabled"; +}; + +&lpass_bt_swr { + status = "disabled"; +}; + +&wcd939x_rx_slave { + status = "okay"; +}; + +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd939x_codec { + status = "okay"; + /* 0 for digital crosstalk disabled, + * 1 for digital crosstalk with local sensed a-xtalk enabled, and + * 2 for digital crosstalk with remote sensed a-xtalk enabled. + */ + qcom,usbcss-hs-xtalk-config = <0>; + qcom,usbcss-hs-rdson = <600>; + qcom,usbcss-hs-r2 = <7550>; + qcom,usbcss-hs-r3 = <1>; + qcom,usbcss-hs-r4 = <330>; + qcom,usbcss-hs-r5 = <5>; + qcom,usbcss-hs-r6 = <1>; + qcom,usbcss-hs-r7 = <5>; + qcom,usbcss-hs-lin-k-aud = <13>; + qcom,usbcss-hs-lin-k-gnd = <13>; +}; + + +&kera_snd { + qcom,model = "kera-mtp-snd-card"; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS1", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS1", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1", + "wsa-codec2"; + qcom,wsa-max-devs = <2>; + swr-haptics-unsupported; + qcom,pri_mi2s_gpios = <&cdc_pri_mi2s_gpios>; + qcom,wcd-disable-legacy-surge; + wcd939x-i2c-handle = <&wcd_usbss>; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; +}; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi new file mode 100644 index 00000000..e71a94f5 --- /dev/null +++ b/kera-audio-overlay.dtsi @@ -0,0 +1,740 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include "kera-lpi.dtsi" + +&lpass_cdc { + qcom,num-macros = <4>; + qcom,lpass-cdc-version = <7>; + #address-cells = <1>; + #size-cells = <1>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>, + <0x3004 0x3 0x1>, <0x3080 0x2 0x2>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,wsa_mclk_mode_muxsel = <0x06BEA110>; + clock-names = "tx_core_clk", "rx_core_clk", "wsa_core_clk", + "rx_tx_core_clk", "wsa_tx_core_clk", "va_core_clk"; + clocks = <&clock_audio_tx_1 0>, <&clock_audio_rx_1 0>, + <&clock_audio_wsa_1 0>, <&clock_audio_rx_tx 0>, + <&clock_audio_wsa_tx 0>, <&clock_audio_va_1 0>; + }; + + va_macro: va-macro@7660000 { + compatible = "qcom,lpass-cdc-va-macro"; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,va-dmic-sample-rate = <600000>; + qcom,va-clk-mux-select = <1>; + qcom,default-clk-id = ; + qcom,use-clk-id = ; + qcom,is-used-swr-gpio = <1>; + qcom,va-swr-gpios = <&va_swr_gpios>; + tx_swr: va_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <3>; + qcom,mipi-sdw-block-packing-mode = <1>; + interrupts = + , + ; + interrupt-names = "swr_master_irq", "swr_wake_irq"; + qcom,swr-wakeup-required = <1>; + qcom,swr-num-ports = <5>; + qcom,swr-port-mapping = <1 SWRM_TX_PCM_OUT 0x3>, + <2 SWRM_TX1_CH1 0x1>, <2 SWRM_TX1_CH2 0x2>, + <2 SWRM_TX1_CH3 0x4>, <2 SWRM_TX1_CH4 0x8>, + <3 SWRM_TX2_CH1 0x1>, <3 SWRM_TX2_CH2 0x2>, + <3 SWRM_TX2_CH3 0x4>, <3 SWRM_TX2_CH4 0x8>, + <4 SWRM_TX3_CH1 0x1>, <4 SWRM_TX3_CH2 0x2>, + <4 SWRM_TX3_CH3 0x4>, <4 SWRM_TX3_CH4 0x8>, + <5 SWRM_TX_PCM_IN 0x3>; + qcom,swr-num-dev = <5>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-mstr-irq-wakeup-capable = <1>; + qcom,is-always-on = <1>; + wcd9378_tx_slave: wcd9378-tx-slave { + compatible = "qcom,wcd9378-slave"; + reg = <0x10 0x01170223>; + }; + + wcd939x_tx_slave: wcd939x-tx-slave { + status = "disabled"; + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170223>; + }; + }; + }; + + tx_macro: tx-macro@6AE0000 { + compatible = "qcom,lpass-cdc-tx-macro"; + qcom,default-clk-id = ; + qcom,tx-dmic-sample-rate = <2400000>; + qcom,is-used-swr-gpio = <0>; + }; + + rx_macro: rx-macro@6AC0000 { + compatible = "qcom,lpass-cdc-rx-macro"; + qcom,rx-swr-gpios = <&rx_swr_gpios>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + clock-names = "rx_mclk2_2x_clk"; + clocks = <&clock_audio_rx_mclk2_2x_clk 0>; + rx_swr: rx_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <2>; + qcom,mipi-sdw-block-packing-mode = <1>; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <12>; + qcom,swr-port-mapping = <1 HPH_L 0x1>, + <1 HPH_R 0x2>, <2 CLSH 0x3>, + <3 COMP_L 0x1>, <3 COMP_R 0x2>, + <4 LO 0x1>, <5 DSD_L 0x1>, + <5 DSD_R 0x2>, <6 PCM_OUT1 0x01>, + <7 GPPO 0x03>, <8 HAPT 0x03>, + <9 HIFI_PCM_L 0x01>, <9 HIFI_PCM_R 0x2>, + <10 HPTH 0x03>, <11 CMPT 0x03>, <12 IPCM 0x03>; + + /* num-dev is 2 if WCD RX and PMIC SWR Slaves are connected */ + /* num-dev is 1 if only WCD RX slave is connected */ + qcom,swr-num-dev = <1>; + qcom,swr-clock-stop-mode0 = <1>; + swr_haptics: swr_haptics@f0170220 { + compatible = "qcom,pmih010x-swr-haptics"; + reg = <0x03 0xf0170220>; + //swr-slave-supply = <&hap_swr_slave_reg>; + qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; + status = "disabled"; + }; + + wcd9378_rx_slave: wcd9378-rx-slave { + compatible = "qcom,wcd9378-slave"; + reg = <0x10 0x01170224>; + status = "okay"; + }; + + wcd939x_rx_slave: wcd939x-rx-slave { + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170224>; + status = "disabled"; + }; + }; + }; + + wsa_macro: wsa-macro@6B00000 { + compatible = "qcom,lpass-cdc-wsa-macro"; + wsa_data_fs_ctl_reg = <0x6B6F000>; + qcom,wsa-swr-gpios = <&wsa_swr_gpios>; + qcom,wsa-bat-cfgs= <1>, <1>; + qcom,wsa-rloads= <2>, <2>; + qcom,wsa-system-gains= <0 9>, <0 9>; + qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + qcom,thermal-max-state = <11>; + qcom,noise-gate-mode = <2>; + #cooling-cells = <2>; + wsa_swr: wsa_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <1>; + qcom,mipi-sdw-block-packing-mode = <0>; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <13>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-port-mapping = <1 SPKR_L 0x1>, + <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, + <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, + <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, + <8 SPKR_HAPT 0x3>, <9 OCPM 0x3>, + <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, + <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; + qcom,swr-num-dev = <1>; + qcom,dynamic-port-map-supported = <0>; + wsa884x_0220: wsa884x@02170220 { + compatible = "qcom,wsa884x"; + status = "disabled"; + reg = <0x4 0x2170220>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , ; + cdc-vdd-1p8-supply = <&L7B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrLeft"; + }; + + wsa884x_0221: wsa884x@02170221 { + compatible = "qcom,wsa884x"; + reg = <0x4 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , ; + cdc-vdd-1p8-supply = <&L7B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrRight"; + }; + }; + }; + + wcd939x_codec: wcd939x-codec { + compatible = "qcom,wcd939x-codec"; + status = "disabled"; + qcom,split-codec = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>, <5 HIFI_PCM_L 0x1 0 HIFI_PCM_L>, + <5 HIFI_PCM_R 0x2 0 HIFI_PCM_R>; + + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <0 ADC2 0x2 0 SWRM_TX1_CH2>, + <1 ADC3 0x1 0 SWRM_TX1_CH3>, + <1 ADC4 0x2 0 SWRM_TX1_CH4>, + <2 DMIC0 0x1 0 SWRM_TX2_CH1>, + <2 DMIC1 0x2 0 SWRM_TX2_CH2>, + <2 MBHC 0x4 0 SWRM_TX2_CH3>, + <2 DMIC2 0x4 0 SWRM_TX2_CH3>, + <2 DMIC3 0x8 0 SWRM_TX2_CH4>, + <3 DMIC4 0x1 0 SWRM_TX3_CH1>, + <3 DMIC5 0x2 0 SWRM_TX3_CH2>, + <3 DMIC6 0x4 0 SWRM_TX3_CH3>, + <3 DMIC7 0x8 0 SWRM_TX3_CH4>; + + qcom,swr-tx-port-params = + , , + , , + , , + , , + , , + , , + , , + , ; + qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; + qcom,rx-slave = <&wcd939x_rx_slave>; + qcom,tx-slave = <&wcd939x_tx_slave>; + + cdc-vdd-rx-supply = <&L7B>; + qcom,cdc-vdd-rx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rx-current = <45000>; + qcom,cdc-vdd-rx-lpm-supported = <1>; + + cdc-vdd-tx-supply = <&L7B>; + qcom,cdc-vdd-tx-voltage = <1800000 1800000>; + qcom,cdc-vdd-tx-current = <45000>; + qcom,cdc-vdd-tx-lpm-supported = <1>; + + cdc-vdd-buck-supply = <&L7B>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <650000>; + qcom,cdc-vdd-buck-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <30000>; + + cdc-vdd-px-supply = <&L3G>; + qcom,cdc-vdd-px-voltage = <1200000 1200000>; + qcom,cdc-vdd-px-current = <15000>; + qcom,cdc-vdd-px-lpm-supported = <1>; + + qcom,cdc-vdd-px-rem-supported = <1>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + qcom,cdc-micbias4-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rx", + "cdc-vdd-tx", + "cdc-vdd-mic-bias"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck", + "cdc-vdd-px"; + + wcd_mb1_reg: qcom,wcd-mb1-reg { + regulator-name = "wcd-mb1-reg"; + }; + + wcd_mb2_reg: qcom,wcd-mb2-reg { + regulator-name = "wcd-mb2-reg"; + }; + + wcd_mb3_reg: qcom,wcd-mb3-reg { + regulator-name = "wcd-mb3-reg"; + }; + + wcd_mb4_reg: qcom,wcd-mb4-reg { + regulator-name = "wcd-mb4-reg"; + }; + }; + + wcd9378_codec: wcd9378-codec { + compatible = "qcom,wcd9378-codec"; + qcom,split-codec = <1>; + qcom,wcd-mode = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>; + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <1 ADC2 0x1 0 SWRM_TX1_CH2>, + <2 ADC3 0x1 0 SWRM_TX1_CH3>, + <3 DMIC0 0x4 0 SWRM_TX2_CH1>, + <3 DMIC1 0x8 0 SWRM_TX2_CH2>, + <3 MBHC 0x1 0 SWRM_TX2_CH3>, + <4 DMIC2 0x1 0 SWRM_TX2_CH3>, + <4 DMIC3 0x2 0 SWRM_TX2_CH4>, + <4 DMIC4 0x3 0 SWRM_TX3_CH1>, + <4 DMIC5 0x4 0 SWRM_TX3_CH2>; + qcom,swr-tx-port-params = + , , + , , + , , + , , + , , + , , + , , + , ; + qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; + qcom,rx-slave = <&wcd9378_rx_slave>; + qcom,tx-slave = <&wcd9378_tx_slave>; + + cdc-vdd-rxtx-supply = <&L7B>; + qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rxtx-current = <30000>; + qcom,cdc-vdd-rxtx-lpm-supported = <1>; + + cdc-vdd-io-supply = <&L3G>; + qcom,cdc-vdd-io-voltage = <1200000 1200000>; + qcom,cdc-vdd-io-current = <20000>; + qcom,cdc-vdd-io-lpm-supported = <1>; + + cdc-vdd-buck-supply = <&L7B>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <30070>; + qcom,cdc-vdd-buck-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <40550>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rxtx", + "cdc-vdd-io"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck"; + }; +}; + +&lpass_bt_swr { + clock-names = "bt_swr_mclk_clk", "bt_swr_mclk_clk_2x", + "lpass_core_hw_vote", "lpass_audio_hw_vote"; + clocks = <&clock_audio_bt_swr_mclk_clk 0>, + <&clock_audio_bt_swr_mclk_clk_2x 0>, + <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,bt-swr-gpios = <&bt_swr_gpios>; +}; + +&swr4 { + compatible = "qcom,swr-mstr"; + qcom,swr_master_id = <5>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + swrm-io-base = <0x06CA0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <7>; + qcom,swr-port-mapping = <1 BT_AUDIO_RX1 0x3>, + <2 BT_AUDIO_RX2 0x3>, <3 BT_AUDIO_RX3 0x3>, + <5 BT_AUDIO_TX1 0x3>, <6 BT_AUDIO_TX2 0x3>, + <7 BT_AUDIO_TX3 0x3>, <8 FM_AUDIO_TX1 0x3>; + qcom,swr-num-dev = <1>; +}; + +&spf_core_platform { + kera_snd: sound { + qcom,model = "kera-qrd-snd-card"; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,tdm-max-slots = <8>; + qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,audio-core-list = <0>, <1>; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS1", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS1", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", "wsa-codec2"; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,wsa-max-devs = <1>; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>, <&lpass_bt_swr>; + + }; + + cdc_pri_mi2s_gpios: pri_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active + &i2s0_sd0_active &i2s0_sd1_active>; + pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep + &i2s0_sd0_sleep &i2s0_sd1_sleep>; + #gpio-cells = <0>; + }; + + cdc_quat_mi2s_gpios: quat_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&quat_mi2s_sck_active &quat_mi2s_ws_active + &quat_mi2s_sd0_active &quat_mi2s_sd1_active + &quat_mi2s_sd2_active &quat_mi2s_sd3_active>; + pinctrl-1 = <&quat_mi2s_sck_sleep &quat_mi2s_ws_sleep + &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep + &quat_mi2s_sd2_sleep &quat_mi2s_sd3_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <138 143>; + #gpio-cells = <0>; + }; + + cdc_quin_mi2s_gpios: quin_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s1_sck_active &lpi_i2s1_ws_active + &lpi_i2s1_data0_active &lpi_i2s1_data1_active>; + pinctrl-1 = <&lpi_i2s1_sck_sleep &lpi_i2s1_ws_sleep + &lpi_i2s1_data0_sleep &lpi_i2s1_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <144 147>; + #gpio-cells = <0>; + }; + + cdc_sen_mi2s_gpios: sen_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s2_sck_active &lpi_i2s2_ws_active + &lpi_i2s2_data0_active &lpi_i2s2_data1_active>; + pinctrl-1 = <&lpi_i2s2_sck_sleep &lpi_i2s2_ws_sleep + &lpi_i2s2_data0_sleep &lpi_i2s2_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <148 151>; + #gpio-cells = <0>; + }; + + cdc_sep_mi2s_gpios: sep_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s3_sck_active &lpi_i2s3_ws_active + &lpi_i2s3_data0_active &lpi_i2s3_data1_active>; + pinctrl-1 = <&lpi_i2s3_sck_sleep &lpi_i2s3_ws_sleep + &lpi_i2s3_data0_sleep &lpi_i2s3_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <153 156>; + #gpio-cells = <0>; + }; + + wsa_swr_gpios: wsa_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>; + pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <149>; + #gpio-cells = <0>; + }; + + rx_swr_gpios: rx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active + &rx_swr_data1_active>; + pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep + &rx_swr_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <142>; + #gpio-cells = <0>; + }; + + va_swr_gpios: tx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active + &tx_swr_data1_active &tx_swr_data2_active>; + pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep + &tx_swr_data1_sleep &tx_swr_data2_sleep>; + qcom,lpi-gpios; + qcom,chip-wakeup-reg = <0xf18b008>; + qcom,chip-wakeup-maskbit = <7>; + qcom,chip-wakeup-default-val = <0x1>; + qcom,tlmm-pins = <139>; + #gpio-cells = <0>; + }; + + cdc_dmic01_gpios: cdc_dmic01_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>; + pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <144 145>; + #gpio-cells = <0>; + }; + + cdc_dmic23_gpios: cdc_dmic23_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>; + pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <146 147>; + #gpio-cells = <0>; + }; + + cdc_dmic45_gpios: cdc_dmic45_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic45_clk_active &cdc_dmic45_data_active>; + pinctrl-1 = <&cdc_dmic45_clk_sleep &cdc_dmic45_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <150 151>; + #gpio-cells = <0>; + }; + + cdc_dmic67_gpios: cdc_dmic67_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic67_clk_active &cdc_dmic67_data_active>; + pinctrl-1 = <&cdc_dmic67_clk_sleep &cdc_dmic67_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <155 156>; + #gpio-cells = <0>; + }; + + bt_swr_gpios: bt_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&bt_swr_clk_active &bt_swr_data_active>; + pinctrl-1 = <&bt_swr_clk_sleep &bt_swr_data_sleep>; + qcom,lpi-gpios; + #gpio-cells = <0>; + }; +}; + +&soc { + wsa_spkr_en02: wsa_spkr_en1_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_1_sd_n_active>; + pinctrl-1 = <&spkr_1_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wsa_spkr_en13: wsa_spkr_en2_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_2_sd_n_active>; + pinctrl-1 = <&spkr_2_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wcd_rst_gpio: msm_cdc_pinctrl@32 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_reset_active>; + pinctrl-1 = <&wcd_reset_sleep>; + }; + + clock_audio_va_1: va_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x307>; + #clock-cells = <1>; + }; + + clock_audio_wsa_1: wsa_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x309>; + #clock-cells = <1>; + }; + + clock_audio_rx_1: rx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <22579200>; + qcom,codec-lpass-clk-id = <0x30E>; + #clock-cells = <1>; + }; + + clock_audio_rx_tx: rx_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x312>; + #clock-cells = <1>; + }; + + clock_audio_tx_1: tx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x30C>; + #clock-cells = <1>; + }; + + clock_audio_wsa_tx: wsa_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x314>; + #clock-cells = <1>; + }; + + clock_audio_rx_mclk2_2x_clk: rx_mclk2_2x_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x318>; + #clock-cells = <1>; + }; + + clock_audio_bt_swr_mclk_clk: bt_swr_mclk_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <24576000>; + qcom,codec-lpass-clk-id = <0x31A>; + #clock-cells = <1>; + }; + + clock_audio_bt_swr_mclk_clk_2x: bt_swr_mclk_clk_2x { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <24576000>; + qcom,codec-lpass-clk-id = <0x31B>; + #clock-cells = <1>; + }; +}; + +&adsp_loader { + status = "ok"; +}; diff --git a/kera-audio-qrd.dts b/kera-audio-qrd.dts new file mode 100644 index 00000000..4160a838 --- /dev/null +++ b/kera-audio-qrd.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera QRD"; + compatible = "qcom,kera-qrd", "qcom,kera", "qcom,kerap-qrd", "qcom,kerap", + "qcom,qrd"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>; +}; diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi new file mode 100644 index 00000000..9768b064 --- /dev/null +++ b/kera-audio-qrd.dtsi @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +#include "kera-audio-overlay.dtsi" +#include "kera-audio-lpass-reg.dtsi" + +&tx_swr_clk_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data0_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data1_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data2_active { + config { + drive-strength = <2>; + }; +}; + +&wsa_swr { + wsa884x_0220: wsa884x@02170220 { + status = "disabled"; + }; + + wsa884x_0221: wsa884x@02170221 { + status = "okay"; + }; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs = <1>, <1>; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd939x_codec { + status = "disabled"; +}; + +&cdc_dmic01_gpios { + status = "disabled"; +}; + +&cdc_dmic23_gpios { + status = "disabled"; +}; + +&wcd9378_codec { + status = "okay"; +}; + +&wcd9378_rx_slave { + status = "okay"; +}; + +&wcd9378_tx_slave { + status = "okay"; +}; + +&kera_snd { + qcom,model = "kera-qrd-snd-card"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", "wsa-codec2"; + qcom,wsa-max-devs = <1>; +}; diff --git a/kera-audio-rcm.dts b/kera-audio-rcm.dts new file mode 100644 index 00000000..58caf16c --- /dev/null +++ b/kera-audio-rcm.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-cdp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kuna RCM"; + compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap", + "qcom,rcm"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x10015 0>, <0x20015 0>, <0x30015 0>, <0x30015 1>, + <0x10015 1>, <0x20015 1>; +}; diff --git a/kera-audio.dts b/kera-audio.dts new file mode 100644 index 00000000..f9fd3d51 --- /dev/null +++ b/kera-audio.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "kera-audio.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kera"; + compatible = "qcom,kera"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/kera-audio.dtsi b/kera-audio.dtsi new file mode 100644 index 00000000..16d1110e --- /dev/null +++ b/kera-audio.dtsi @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include "msm-audio-lpass.dtsi" + +&soc { + spf_core_platform: spf_core_platform { + compatible = "qcom,spf-core-platform"; + }; + + lpass_core_hw_vote: vote_lpass_core_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; + + lpass_audio_hw_vote: vote_lpass_audio_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; +}; + +&remoteproc_adsp_glink { + audio_gpr: qcom,gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,intents = <0x200 20>; + qcom,ch-sched-rt; + reg = ; + + spf_core { + compatible = "qcom,spf_core"; + reg = ; + }; + + audio-pkt { + compatible = "qcom,audio-pkt"; + qcom,audiopkt-ch-name = "apr_audio_svc"; + reg = ; + }; + + audio_prm: q6prm { + compatible = "qcom,audio_prm"; + qcom,sleep-api-supported = <1>; + reg = ; + }; + }; +}; + +&spf_core_platform { + + msm_audio_ion: qcom,msm-audio-ion { + compatible = "qcom,msm-audio-ion"; + qcom,smmu-version = <2>; + qcom,smmu-enabled; + iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1041 0x20>; + memory-region = <&audio_cnss_resv_region>; + qcom,smmu-sid-mask = /bits/ 64 <0xf>; + dma-coherent; + + audio_cnss_resv_region: audio_cnss_resv_region { + iommu-addresses = <&msm_audio_ion 0x00000000 0x18000000>, + <&msm_audio_ion 0xb0000000 0x50000000>; + }; + }; + + msm_audio_ion_cma: qcom,msm-audio-ion-cma { + compatible = "qcom,msm-audio-ion-cma"; + }; + + lpi_tlmm: lpi_pinctrl@07760000 { + compatible = "qcom,lpi-pinctrl"; + reg = <0x07760000 0x0>; + qcom,gpios-count = <23>; + qcom,slew-reg = <0x07760000 0x0>; + gpio-controller; + #gpio-cells = <2>; + qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>, + <0x00002000>, <0x00003000>, + <0x00004000>, <0x00005000>, + <0x00006000>, <0x00007000>, + <0x00008000>, <0x00009000>, + <0x0000A000>, <0x0000B000>, + <0x0000C000>, <0x0000D000>, + <0x0000E000>, <0x0000F000>, + <0x00010000>, <0x00011000>, + <0x00012000>, <0x00013000>, + <0x00014000>, <0x00015000>, + <0x00016000>; + qcom,lpi-slew-offset-tbl = <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>; + + qcom,lpi-slew-base-tbl = <0x7760000>, <0x7761000>, + <0x7762000>, <0x7763000>, + <0x7764000>, <0x7765000>, + <0x7766000>, <0x7767000>, + <0x7768000>, <0x7769000>, + <0x776A000>, <0x776B000>, + <0x776C000>, <0x776D000>, + <0x776E000>, <0x776F000>, + <0x7770000>, <0x7771000>, + <0x7772000>, <0x7773000>, + <0x7774000>, <0x7775000>, + <0x7776000>; + + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + }; + + lpass_cdc: lpass-cdc { + compatible = "qcom,lpass-cdc"; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + }; + + va_macro: va-macro@7660000 { + tx_swr: va_swr_master { + }; + }; + + tx_macro: tx-macro@6AE0000 { + }; + + rx_macro: rx-macro@6AC0000 { + rx_swr: rx_swr_master { + }; + }; + + wsa_macro: wsa-macro@6B00000 { + wsa_swr: wsa_swr_master { + }; + }; + + }; + + lpass_bt_swr: lpass_bt_swr@6CA0000 { + compatible = "qcom,lpass-bt-swr"; + swr4: bt_swr_mstr { + }; + }; + + kera_snd: sound { + compatible = "qcom,sun-asoc-snd"; + qcom,mi2s-audio-intf = <1>; + qcom,tdm-audio-intf = <0>; + qcom,auxpcm-audio-intf = <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,afe-rxtx-lb = <0>; + + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + }; +}; + +&aliases { + wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; + swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; +}; + +&adsp_loader { + /delete-property/ qcom,adsp-state; +}; diff --git a/kera-lpi.dtsi b/kera-lpi.dtsi new file mode 100644 index 00000000..ebf2e7b9 --- /dev/null +++ b/kera-lpi.dtsi @@ -0,0 +1,2189 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&lpi_tlmm { + quat_mi2s_sck { + quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sck_active: quat_mi2s_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_ws { + quat_mi2s_ws_sleep: quat_mi2s_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_ws_active: quat_mi2s_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd0 { + quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd0_active: quat_mi2s_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd1 { + quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd1_active: quat_mi2s_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd2 { + quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd2_active: quat_mi2s_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd3 { + quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd3_active: quat_mi2s_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sck { + lpi_i2s1_sck_sleep: lpi_i2s1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sck_active: lpi_i2s1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_ws { + lpi_i2s1_ws_sleep: lpi_i2s1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_ws_active: lpi_i2s1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd0 { + lpi_i2s1_data0_sleep: lpi_i2s1_data0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_data0_active: lpi_i2s1_data0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + + lpi_i2s1_sd1 { + lpi_i2s1_data1_active: lpi_i2s1_data1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s1_data1_sleep: lpi_i2s1_data1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + lpi_i2s2_sck { + lpi_i2s2_sck_active: lpi_i2s2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + + lpi_i2s2_sck_sleep: lpi_i2s2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s2_ws { + lpi_i2s2_ws_active: lpi_i2s2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s2_ws_sleep: lpi_i2s2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + }; + + + lpi_i2s2_sd0 { + lpi_i2s2_data0_active: lpi_i2s2_data0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + + lpi_i2s2_data0_sleep: lpi_i2s2_data0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + }; + + + lpi_i2s2_sd1 { + lpi_i2s2_data1_active: lpi_i2s2_data1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s2_data1_sleep: lpi_i2s2_data1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sck { + lpi_i2s3_sck_active: lpi_i2s3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_sck_sleep: lpi_i2s3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_ws { + lpi_i2s3_ws_active: lpi_i2s3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_ws_sleep: lpi_i2s3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sd0 { + lpi_i2s3_data0_active: lpi_i2s3_data0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_data0_sleep: lpi_i2s3_data0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sd1 { + lpi_i2s3_data1_active: lpi_i2s3_data1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_data1_sleep: lpi_i2s3_data1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + quat_tdm_ws { + quat_tdm_ws_sleep: quat_tdm_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_ws_active: quat_tdm_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd0 { + quat_tdm_sd0_sleep: quat_tdm_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd0_active: quat_tdm_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd1 { + quat_tdm_sd1_sleep: quat_tdm_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd1_active: quat_tdm_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd2 { + quat_tdm_sd2_sleep: quat_tdm_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd2_active: quat_tdm_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd3 { + quat_tdm_sd3_sleep: quat_tdm_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd3_active: quat_tdm_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sck { + lpi_tdm1_sck_sleep: lpi_tdm1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sck_active: lpi_tdm1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_ws { + lpi_tdm1_ws_sleep: lpi_tdm1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_ws_active: lpi_tdm1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sd0 { + lpi_tdm1_sd0_sleep: lpi_tdm1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd0_active: lpi_tdm1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sd1 { + lpi_tdm1_sd1_sleep: lpi_tdm1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd1_active: lpi_tdm1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm2_sck { + lpi_tdm2_sck_sleep: lpi_tdm2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sck_active: lpi_tdm2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_ws { + lpi_tdm2_ws_sleep: lpi_tdm2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_ws_active: lpi_tdm2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd0 { + lpi_tdm2_sd0_sleep: lpi_tdm2_sd0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd0_active: lpi_tdm2_sd0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm2_sd1 { + lpi_tdm2_sd1_sleep: lpi_tdm2_sd1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd1_active: lpi_tdm2_sd1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sck { + lpi_tdm3_sck_sleep: lpi_tdm3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sck_active: lpi_tdm3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_ws { + lpi_tdm3_ws_sleep: lpi_tdm3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_ws_active: lpi_tdm3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd0 { + lpi_tdm3_sd0_sleep: lpi_tdm3_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd0_active: lpi_tdm3_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd1 { + lpi_tdm3_sd1_sleep: lpi_tdm3_sd3_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd1_active: lpi_tdm3_sd1_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sck { + quat_aux_sck_sleep: quat_aux_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sck_active: quat_aux_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_ws { + quat_aux_ws_sleep: quat_aux_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_ws_active: quat_aux_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd0 { + quat_aux_sd0_sleep: quat_aux_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd0_active: quat_aux_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd1 { + quat_aux_sd1_sleep: quat_aux_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd1_active: quat_aux_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd2 { + quat_aux_sd2_sleep: quat_aux_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd2_active: quat_aux_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd3 { + quat_aux_sd3_sleep: quat_aux_sd3_sleep { + mux { + pins = "gpio5"; + function = "func2"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd3_active: quat_aux_sd3_active { + mux { + pins = "gpio5"; + function = "func2"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sck { + lpi_aux1_sck_sleep: lpi_aux1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sck_active: lpi_aux1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_ws { + lpi_aux1_ws_sleep: lpi_aux1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_ws_active: lpi_aux1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd0 { + lpi_aux1_sd0_sleep: lpi_aux1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd0_active: lpi_aux1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd1 { + lpi_aux1_sd1_sleep: lpi_aux1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd1_active: lpi_aux1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux2_sck { + lpi_aux2_sck_sleep: lpi_aux2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sck_active: lpi_aux2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_ws { + lpi_aux2_ws_sleep: lpi_aux2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_ws_active: lpi_aux2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd0 { + lpi_aux2_sd0_sleep: lpi_aux2_sd0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd0_active: lpi_aux2_sd0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux2_sd1 { + lpi_aux2_sd1_sleep: lpi_aux2_sd1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd1_active: lpi_aux2_sd1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_sck { + lpi_aux3_sck_sleep: lpi_aux3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sck_active: lpi_aux3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_ws { + lpi_aux3_ws_sleep: lpi_aux3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_ws_active: lpi_aux3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sd0 { + lpi_aux3_sd0_sleep: lpi_aux3_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd0_active: lpi_aux3_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_sd1 { + lpi_aux3_sd1_sleep: lpi_aux3_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd1_active: lpi_aux3_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + bt_swr_clk_pin { + bt_swr_clk_sleep: bt_swr_clk_sleep { + mux { + pins = "gpio19"; + function = "func3"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + bt_swr_clk_active: bt_swr_clk_active { + mux { + pins = "gpio19"; + function = "func3"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + bt_swr_data_pin { + bt_swr_data_sleep: bt_swr_data_sleep { + mux { + pins = "gpio20"; + function = "func3"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + bt_swr_data_active: bt_swr_data_active { + mux { + pins = "gpio20"; + function = "func3"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + + tx_swr_clk_active: tx_swr_clk_active { + mux { + pins = "gpio0"; + function = "func1"; + + }; + + config { + pins = "gpio0"; + drive-strength = <4>; + slew-rate = <1>; + bias-disable; + }; + }; + + tx_swr_clk_sleep: tx_swr_clk_sleep { + mux { + pins = "gpio0"; + function = "func1"; + input-enable; + bias-pull-down; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + + }; + }; + + tx_swr_data0_active: tx_swr_data0_active { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <4>; + slew-rate = <1>; + bias-disable; + + }; + }; + + tx_swr_data0_sleep: tx_swr_data0_sleep { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; + input-enable; + bias-bus-hold; + + }; + }; + + tx_swr_data1_active: tx_swr_data1_active { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data1_sleep: tx_swr_data1_sleep { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + tx_swr_data2_active: tx_swr_data2_active { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio14"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data2_sleep: tx_swr_data2_sleep { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_clk_active: rx_swr_clk_active { + mux { + pins = "gpio3"; + function = "func1"; + + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + + rx_swr_clk_sleep: rx_swr_clk_sleep { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + rx_swr_data_active: rx_swr_data_active { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + rx_swr_data_sleep: rx_swr_data_sleep { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + rx_swr_data1_active: rx_swr_data1_active { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + rx_swr_data1_sleep: rx_swr_data1_sleep { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + cdc_dmic01_clk_active: dmic01_clk_active { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic01_clk_sleep: dmic01_clk_sleep { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic01_data_active: dmic01_data_active { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic01_data_sleep: dmic01_data_sleep { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic23_clk_active: dmic23_clk_active { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic23_clk_sleep: dmic23_clk_sleep { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic23_data_active: dmic23_data_active { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic23_data_sleep: dmic23_data_sleep { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_clk_active: cdc_dmic45_clk_active { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_clk_sleep: lpi_dmic45_clk_sleep { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_data_active: cdc_dmic45_data_active { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins ="gpio13"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_data_sleep: cdc_dmic45_data_sleep { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + cdc_dmic67_clk_active: cdc_dmic67_clk_active { + mux { + pins = "gpio21"; + function = "func2"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; + input-enable; + + }; + }; + + cdc_dmic67_clk_sleep: lpi_dmic67_clk_sleep { + mux { + pins = "gpio21"; + function = "func2"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + cdc_dmic67_data_active: cdc_dmic67_data_active { + mux { + pins = "gpio22"; + function = "func2"; + }; + + config { + pins ="gpio22"; + drive-strength = <8>; + input-enable; + + + }; + }; + + cdc_dmic67_data_sleep: cdc_dmic67_data_sleep { + mux { + pins = "gpio22"; + function = "func2"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + + wsa_swr_clk_pin { + wsa_swr_clk_sleep: wsa_swr_clk_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_clk_active: wsa_swr_clk_active { + mux { + pins = "gpio10"; + function = "func1"; + + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + wsa_swr_data_pin { + wsa_swr_data_active: wsa_swr_data_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + wsa_swr_data_sleep: wsa_swr_data_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + }; + +}; From 2a172de4f4ae27becdf296923da8eec90a6bac65 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 13 Nov 2024 19:44:36 +0530 Subject: [PATCH 083/143] ARM: dts: msm: comment BOB and usbss Need to revert once kernel changes are in place. Change-Id: I96caf7ca9b78421b9c25b6ddc5ef6fd2a71b9d9a Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp.dtsi | 2 +- kera-audio-overlay.dtsi | 4 ++-- kera-audio.dtsi | 12 ++++++------ 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index 0c0647b0..a7ec11dd 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -156,7 +156,7 @@ swr-haptics-unsupported; qcom,pri_mi2s_gpios = <&cdc_pri_mi2s_gpios>; qcom,wcd-disable-legacy-surge; - wcd939x-i2c-handle = <&wcd_usbss>; + //wcd939x-i2c-handle = <&wcd_usbss>; qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index e71a94f5..f5034250 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -284,7 +284,7 @@ qcom,cdc-vdd-buck-current = <650000>; qcom,cdc-vdd-buck-lpm-supported = <1>; - cdc-vdd-mic-bias-supply = <&BOB>; + //cdc-vdd-mic-bias-supply = <&BOB>; qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; qcom,cdc-vdd-mic-bias-current = <30000>; @@ -370,7 +370,7 @@ qcom,cdc-vdd-buck-current = <30070>; qcom,cdc-vdd-buck-lpm-supported = <1>; - cdc-vdd-mic-bias-supply = <&BOB>; + // cdc-vdd-mic-bias-supply = <&BOB>; qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; qcom,cdc-vdd-mic-bias-current = <40550>; diff --git a/kera-audio.dtsi b/kera-audio.dtsi index 16d1110e..e289da53 100644 --- a/kera-audio.dtsi +++ b/kera-audio.dtsi @@ -174,12 +174,12 @@ }; }; -&aliases { - wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; - rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; - tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; - swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; -}; +//&aliases { +// wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; +// rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; +// tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; +// swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; +//}; &adsp_loader { /delete-property/ qcom,adsp-state; From d0f9127d366dc44075e3f6b7f9f34f3884f342a9 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 15 Nov 2024 22:35:35 +0530 Subject: [PATCH 084/143] ARM: dts: msm: Add support for TunaP -Add missing APQ SOC_ID in tuna. Change-Id: Ibc5e8a54775dc142eb4e26f503f507c3eed1b32a Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio.dts b/tuna-audio.dts index a56067d5..b471b9a2 100644 --- a/tuna-audio.dts +++ b/tuna-audio.dts @@ -16,6 +16,6 @@ / { model = "Qualcomm Technologies, Inc. tuna"; compatible = "qcom,tuna"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <0 0>; }; From 7c94129cdd56634e1310888a3ae9700d7019935f Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 18 Nov 2024 22:10:05 +0530 Subject: [PATCH 085/143] ARM: dts: msm: Add WCD tx rx slaves -Enable wcd tx and rx slave nodes. Change-Id: If41125b672fdbb18a90192bfc8170642c1974d2d Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-cdp.dtsi | 16 ++++++++++++++++ tuna-audio-qrd.dtsi | 24 ++++++++++++++++++++---- 2 files changed, 36 insertions(+), 4 deletions(-) diff --git a/tuna-audio-cdp.dtsi b/tuna-audio-cdp.dtsi index 1f254184..31e7cff7 100644 --- a/tuna-audio-cdp.dtsi +++ b/tuna-audio-cdp.dtsi @@ -33,10 +33,26 @@ status = "disabled"; }; +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + &wcd939x_codec { status = "okay"; }; +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd939x_rx_slave { + status = "okay"; +}; + &swr0 { wsa884x_0220: wsa884x@02170220 { status = "okay"; diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 5cb9ac46..da712522 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -39,14 +39,30 @@ }; }; -&wsa_macro { - qcom,wsa-bat-cfgs = <1>, <1>; -}; - &wcd9378_codec { status = "disabled"; }; +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd939x_rx_slave { + status = "okay"; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs = <1>, <1>; +}; + &wcd939x_codec { status = "okay"; /* 0 for digital crosstalk disabled, From b92f7fda3b9501dbf22c2babbe11316403d26a9c Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Wed, 20 Nov 2024 14:25:31 +0530 Subject: [PATCH 086/143] ARM: dts: msm: Remove amic5 entries from tuna overlay - Remove amic5 entries from tuna overlay as only 4 mics are supported in tuna wcd codecs Change-Id: I0d3159a67c288f4ee61613ec291c274a8c2325a1 Signed-off-by: Kisan Yadav --- tuna-audio-overlay.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 882dcfe8..80f7fbb9 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -440,8 +440,6 @@ "AMIC3", "MIC BIAS3", "AMIC4", "Analog Mic4", "AMIC4", "MIC BIAS3", - "AMIC5", "Analog Mic5", - "AMIC5", "MIC BIAS4", "VA AMIC1", "Analog Mic1", "VA AMIC1", "VA MIC BIAS1", "VA AMIC2", "Analog Mic2", @@ -450,8 +448,6 @@ "VA AMIC3", "VA MIC BIAS3", "VA AMIC4", "Analog Mic4", "VA AMIC4", "VA MIC BIAS3", - "VA AMIC5", "Analog Mic5", - "VA AMIC5", "VA MIC BIAS4", "TX DMIC0", "Digital Mic0", "TX DMIC0", "MIC BIAS3", "TX DMIC1", "Digital Mic1", From 5f8b3ca52493e7f79896bad7601f36753aa181b2 Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Wed, 20 Nov 2024 19:27:25 +0800 Subject: [PATCH 087/143] ARM: dts: msm: Disable swr haptics for qrd -Disable swr haptics for qrd. Change the wsa-codec index from 2 to 1. and connect WSA_SPK1 OUT instead of WSA_SPK2 OUT change the prefix of wsa as SpkrLeft. Change-Id: I99ac02d92326641432011a8fe88c41dd52d03f3b Signed-off-by: Yuhui Zhao --- tuna-audio-qrd.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index da712522..4c238157 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -30,7 +30,7 @@ &swr0 { wsa884x_0220: wsa884x@02170220 { qcom,spkr-sd-n-node = <&wsa_spkr_en13>; - sound-name-prefix = "SpkrRight"; + sound-name-prefix = "SpkrLeft"; status = "okay"; }; @@ -91,6 +91,7 @@ &tuna_snd { qcom,model = "tuna-qrd-snd-card"; + swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", @@ -118,7 +119,7 @@ "RX_TX DEC1_INP", "TX DEC1 MUX", "RX_TX DEC2_INP", "TX DEC2 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX", - "SpkrRight IN", "WSA_SPK2 OUT", + "SpkrLeft IN", "WSA_SPK1 OUT", "TX SWR_INPUT", "WCD_TX_OUTPUT", "VA SWR_INPUT", "VA_SWR_CLK", "VA SWR_INPUT", "WCD_TX_OUTPUT", @@ -128,7 +129,7 @@ asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec2"; + "wcd939x_codec", "wsa-codec1"; qcom,wsa-max-devs = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; From 595b0beead3065549e964aa12a530521aa87779d Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Wed, 23 Oct 2024 14:50:34 +0530 Subject: [PATCH 088/143] ARM: dts: msm: Update correct wsa codec - Update correct wsa codec for monospeaker usecase. Change-Id: Id064bd37758235161bbb4cadacfaf4368393e951 Signed-off-by: Kisan Yadav --- tuna-audio-qrd.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 2faaff61..5cb9ac46 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -112,7 +112,7 @@ asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec1"; + "wcd939x_codec", "wsa-codec2"; qcom,wsa-max-devs = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; From 8478f951fdd7bdab8baf36c471d39629bab730f9 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 22 Oct 2024 15:28:23 +0530 Subject: [PATCH 089/143] ARM: dts: msm: Add support for WCD939x in tuna7 -Add and update MSM_ID for tuna7. -Add Board_Id for tuna7. -Add AATC support for tuna7 platform. Change-Id: I7f470c0150ec95b556087ab6797787b9754e8464 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 1 + tuna7-audio-mtp.dts | 4 ++-- tuna7-audio-mtp.dtsi | 43 ++++++++++++++++++++++++++++++++++--------- 3 files changed, 37 insertions(+), 11 deletions(-) diff --git a/Kbuild b/Kbuild index 4dee0ac9..41df44be 100644 --- a/Kbuild +++ b/Kbuild @@ -38,6 +38,7 @@ dtbo-y += sun-audio.dtbo \ tuna-audio-hamilton-mtp.dtbo \ tuna-audio-hamilton-rcm.dtbo \ tuna-audio-mtp.dtbo \ + tuna7-audio-mtp.dtbo \ tuna-audio-mtp-qmp1000.dtbo \ tuna-audio-qrd.dtbo \ tuna-audio-rcm.dtbo diff --git a/tuna7-audio-mtp.dts b/tuna7-audio-mtp.dts index 6d8fad89..746c8187 100644 --- a/tuna7-audio-mtp.dts +++ b/tuna7-audio-mtp.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna 7"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>; - qcom,board-id = <0 0>; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <8 3>, <8 4>; }; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index a8e30ed0..74de7073 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -21,24 +21,34 @@ status = "okay"; }; +&wcd939x_rx_slave { + status = "okay"; +}; + &wcd9378_codec { status = "disabled"; }; &wcd939x_codec { status = "okay"; + /* 0 for digital crosstalk disabled, + * 1 for digital crosstalk with local sensed a-xtalk enabled, and + * 2 for digital crosstalk with remote sensed a-xtalk enabled. + */ + qcom,usbcss-hs-xtalk-config = <0>; + qcom,usbcss-hs-rdson = <600>; + qcom,usbcss-hs-r2 = <7550>; + qcom,usbcss-hs-r3 = <1>; + qcom,usbcss-hs-r4 = <330>; + qcom,usbcss-hs-r5 = <5>; + qcom,usbcss-hs-r6 = <1>; + qcom,usbcss-hs-r7 = <5>; + qcom,usbcss-hs-lin-k-aud = <13>; + qcom,usbcss-hs-lin-k-gnd = <13>; }; &tuna_snd { qcom,model = "tuna7-mtp-snd-card"; - qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, - <&lpass_cdc>; - asoc-codec = <&stub_codec>, <&lpass_cdc>, - <&wcd939x_codec>, <&wsa884x_0220>, - <&wsa884x_0221>; - asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec1", - "wsa-codec2"; qcom,audio-routing = "AMIC1", "Analog Mic1", @@ -71,7 +81,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_AUX", "AUX_OUT", + "IN3_EAR", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -93,4 +103,19 @@ "VA DMIC1", "VA MIC BIAS3", "VA DMIC2", "VA MIC BIAS1", "VA DMIC3", "VA MIC BIAS1"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1", + "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,wcd-disable-legacy-surge; + wcd939x-i2c-handle = <&wcd_usbss>; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; }; From 8834f836bb669ef7c2770ce0004d2e46b25192ed Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 18 Nov 2024 22:10:05 +0530 Subject: [PATCH 090/143] ARM: dts: msm: Add WCD tx rx slaves -Enable wcd tx and rx slave nodes. Change-Id: If41125b672fdbb18a90192bfc8170642c1974d2d Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-cdp.dtsi | 16 ++++++++++++++++ tuna-audio-qrd.dtsi | 24 ++++++++++++++++++++---- 2 files changed, 36 insertions(+), 4 deletions(-) diff --git a/tuna-audio-cdp.dtsi b/tuna-audio-cdp.dtsi index 1f254184..31e7cff7 100644 --- a/tuna-audio-cdp.dtsi +++ b/tuna-audio-cdp.dtsi @@ -33,10 +33,26 @@ status = "disabled"; }; +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + &wcd939x_codec { status = "okay"; }; +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd939x_rx_slave { + status = "okay"; +}; + &swr0 { wsa884x_0220: wsa884x@02170220 { status = "okay"; diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 5cb9ac46..da712522 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -39,14 +39,30 @@ }; }; -&wsa_macro { - qcom,wsa-bat-cfgs = <1>, <1>; -}; - &wcd9378_codec { status = "disabled"; }; +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd939x_rx_slave { + status = "okay"; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs = <1>, <1>; +}; + &wcd939x_codec { status = "okay"; /* 0 for digital crosstalk disabled, From 6ea63d753fa90ceda11d8e753c3f55247fea1f9d Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Wed, 20 Nov 2024 14:25:31 +0530 Subject: [PATCH 091/143] ARM: dts: msm: Remove amic5 entries from tuna overlay - Remove amic5 entries from tuna overlay as only 4 mics are supported in tuna wcd codecs Change-Id: I0d3159a67c288f4ee61613ec291c274a8c2325a1 Signed-off-by: Kisan Yadav --- tuna-audio-overlay.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 1d146e13..38cfbaee 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -440,8 +440,6 @@ "AMIC3", "MIC BIAS3", "AMIC4", "Analog Mic4", "AMIC4", "MIC BIAS3", - "AMIC5", "Analog Mic5", - "AMIC5", "MIC BIAS4", "VA AMIC1", "Analog Mic1", "VA AMIC1", "VA MIC BIAS1", "VA AMIC2", "Analog Mic2", @@ -450,8 +448,6 @@ "VA AMIC3", "VA MIC BIAS3", "VA AMIC4", "Analog Mic4", "VA AMIC4", "VA MIC BIAS3", - "VA AMIC5", "Analog Mic5", - "VA AMIC5", "VA MIC BIAS4", "TX DMIC0", "Digital Mic0", "TX DMIC0", "MIC BIAS3", "TX DMIC1", "Digital Mic1", From 31077c7c05009f6bb590d501ba2b8d75f9f81830 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 25 Nov 2024 12:21:37 +0530 Subject: [PATCH 092/143] ARM: dts: msm: Correct GIC swr mstr interrupt Correct the GIC SWR MSTR inerrupt which is pointing to wrong pin. Update correct lpi pin. Change-Id: I0a0679cf832e357c7624ada30e5b03fa59555bce Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-overlay.dtsi | 2 +- tuna-lpi.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 80f7fbb9..4c67e5d1 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -50,7 +50,7 @@ qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x7630000 0x0>; interrupts = - , + , ; interrupt-names = "swr_master_irq", "swr_wake_irq"; qcom,swr-wakeup-required = <1>; diff --git a/tuna-lpi.dtsi b/tuna-lpi.dtsi index ebf2e7b9..70127681 100644 --- a/tuna-lpi.dtsi +++ b/tuna-lpi.dtsi @@ -1804,7 +1804,7 @@ }; config { - pins = "gpio4"; + pins = "gpio14"; drive-strength = <2>; input-enable; bias-pull-down; From 923d910e42d3eb2e2fe63a678bbf224d0b2f6a47 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 14 Nov 2024 23:49:02 +0530 Subject: [PATCH 093/143] ARM: dts: msm: Enable BT dailinks for tuna platform Set qcom,wcn-bt flag to 1 to enable BTFM related dailinks. Change-Id: Iba9adc538fcc0f5464a85f6099779993dfa881b2 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-hamilton-mtp.dtsi | 1 + tuna-audio-overlay.dtsi | 2 +- tuna-audio.dtsi | 2 +- tuna7-audio-mtp.dtsi | 1 + 4 files changed, 4 insertions(+), 2 deletions(-) diff --git a/tuna-audio-hamilton-mtp.dtsi b/tuna-audio-hamilton-mtp.dtsi index 4bb1631c..c286d3b2 100644 --- a/tuna-audio-hamilton-mtp.dtsi +++ b/tuna-audio-hamilton-mtp.dtsi @@ -12,6 +12,7 @@ &tuna_snd { qcom,model = "tuna-mtp-snd-card"; + qcom,wcn-bt = <0>; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; }; diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 80f7fbb9..57206484 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -425,7 +425,7 @@ qcom,model = "tuna-mtp-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; diff --git a/tuna-audio.dtsi b/tuna-audio.dtsi index dfe2a8b0..ef3a9546 100644 --- a/tuna-audio.dtsi +++ b/tuna-audio.dtsi @@ -164,7 +164,7 @@ qcom,mi2s-audio-intf = <1>; qcom,tdm-audio-intf = <0>; qcom,auxpcm-audio-intf = <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,afe-rxtx-lb = <0>; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index 74de7073..befa7f72 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -118,4 +118,5 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; + qcom,wcn-bt = <0>; }; From fdc0b41e01abb33fcbb6234c31ba14e087d7572d Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 14 Nov 2024 23:49:02 +0530 Subject: [PATCH 094/143] ARM: dts: msm: Enable BT dailinks for tuna platform Set qcom,wcn-bt flag to 1 to enable BTFM related dailinks. Change-Id: Iba9adc538fcc0f5464a85f6099779993dfa881b2 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-hamilton-mtp.dtsi | 1 + tuna-audio-overlay.dtsi | 2 +- tuna-audio.dtsi | 2 +- tuna7-audio-mtp.dtsi | 1 + 4 files changed, 4 insertions(+), 2 deletions(-) diff --git a/tuna-audio-hamilton-mtp.dtsi b/tuna-audio-hamilton-mtp.dtsi index 4bb1631c..c286d3b2 100644 --- a/tuna-audio-hamilton-mtp.dtsi +++ b/tuna-audio-hamilton-mtp.dtsi @@ -12,6 +12,7 @@ &tuna_snd { qcom,model = "tuna-mtp-snd-card"; + qcom,wcn-bt = <0>; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; }; diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 38cfbaee..195119a3 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -425,7 +425,7 @@ qcom,model = "tuna-mtp-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; diff --git a/tuna-audio.dtsi b/tuna-audio.dtsi index dfe2a8b0..ef3a9546 100644 --- a/tuna-audio.dtsi +++ b/tuna-audio.dtsi @@ -164,7 +164,7 @@ qcom,mi2s-audio-intf = <1>; qcom,tdm-audio-intf = <0>; qcom,auxpcm-audio-intf = <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,afe-rxtx-lb = <0>; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index 74de7073..befa7f72 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -118,4 +118,5 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; + qcom,wcn-bt = <0>; }; From 029057cc14600c97e27e29bc8ccc581e8c6c5adb Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Wed, 20 Nov 2024 19:27:25 +0800 Subject: [PATCH 095/143] ARM: dts: msm: Disable swr haptics for qrd -Disable swr haptics for qrd. Change the wsa-codec index from 2 to 1. and connect WSA_SPK1 OUT instead of WSA_SPK2 OUT change the prefix of wsa as SpkrLeft. Change-Id: I99ac02d92326641432011a8fe88c41dd52d03f3b Signed-off-by: Yuhui Zhao --- tuna-audio-qrd.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index da712522..4c238157 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -30,7 +30,7 @@ &swr0 { wsa884x_0220: wsa884x@02170220 { qcom,spkr-sd-n-node = <&wsa_spkr_en13>; - sound-name-prefix = "SpkrRight"; + sound-name-prefix = "SpkrLeft"; status = "okay"; }; @@ -91,6 +91,7 @@ &tuna_snd { qcom,model = "tuna-qrd-snd-card"; + swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", @@ -118,7 +119,7 @@ "RX_TX DEC1_INP", "TX DEC1 MUX", "RX_TX DEC2_INP", "TX DEC2 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX", - "SpkrRight IN", "WSA_SPK2 OUT", + "SpkrLeft IN", "WSA_SPK1 OUT", "TX SWR_INPUT", "WCD_TX_OUTPUT", "VA SWR_INPUT", "VA_SWR_CLK", "VA SWR_INPUT", "WCD_TX_OUTPUT", @@ -128,7 +129,7 @@ asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec2"; + "wcd939x_codec", "wsa-codec1"; qcom,wsa-max-devs = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; From 190a87abca5c71082ac51300017877d404ed621e Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 25 Nov 2024 12:21:37 +0530 Subject: [PATCH 096/143] ARM: dts: msm: Correct GIC swr mstr interrupt Correct the GIC SWR MSTR inerrupt which is pointing to wrong pin. Update correct lpi pin. Change-Id: I0a0679cf832e357c7624ada30e5b03fa59555bce Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-overlay.dtsi | 2 +- tuna-lpi.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 38cfbaee..695a4a03 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -50,7 +50,7 @@ qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x7630000 0x0>; interrupts = - , + , ; interrupt-names = "swr_master_irq", "swr_wake_irq"; qcom,swr-wakeup-required = <1>; diff --git a/tuna-lpi.dtsi b/tuna-lpi.dtsi index ebf2e7b9..70127681 100644 --- a/tuna-lpi.dtsi +++ b/tuna-lpi.dtsi @@ -1804,7 +1804,7 @@ }; config { - pins = "gpio4"; + pins = "gpio14"; drive-strength = <2>; input-enable; bias-pull-down; From fded148f66caaa50b608d2c4bad4d1ec8bb0d011 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 27 Nov 2024 16:55:49 +0530 Subject: [PATCH 097/143] ARM: dts: msm: Revert BOB and usbss This change reverts the commented section of BOB and wcd_usbss as they are depended on kernel change. Change-Id: I9fad7ce9732d7ec776ee3f14142129e406398c0f Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp.dtsi | 2 +- kera-audio-overlay.dtsi | 4 ++-- kera-audio.dtsi | 12 ++++++------ 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index a7ec11dd..0c0647b0 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -156,7 +156,7 @@ swr-haptics-unsupported; qcom,pri_mi2s_gpios = <&cdc_pri_mi2s_gpios>; qcom,wcd-disable-legacy-surge; - //wcd939x-i2c-handle = <&wcd_usbss>; + wcd939x-i2c-handle = <&wcd_usbss>; qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index f5034250..e71a94f5 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -284,7 +284,7 @@ qcom,cdc-vdd-buck-current = <650000>; qcom,cdc-vdd-buck-lpm-supported = <1>; - //cdc-vdd-mic-bias-supply = <&BOB>; + cdc-vdd-mic-bias-supply = <&BOB>; qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; qcom,cdc-vdd-mic-bias-current = <30000>; @@ -370,7 +370,7 @@ qcom,cdc-vdd-buck-current = <30070>; qcom,cdc-vdd-buck-lpm-supported = <1>; - // cdc-vdd-mic-bias-supply = <&BOB>; + cdc-vdd-mic-bias-supply = <&BOB>; qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; qcom,cdc-vdd-mic-bias-current = <40550>; diff --git a/kera-audio.dtsi b/kera-audio.dtsi index e289da53..16d1110e 100644 --- a/kera-audio.dtsi +++ b/kera-audio.dtsi @@ -174,12 +174,12 @@ }; }; -//&aliases { -// wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; -// rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; -// tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; -// swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; -//}; +&aliases { + wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; + swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; +}; &adsp_loader { /delete-property/ qcom,adsp-state; From 8c9dc8e8bcf421de474949ebf6524d0e05841643 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 27 Nov 2024 18:44:26 +0530 Subject: [PATCH 098/143] ARM: dts: msm: Replace swr nodes Replace swr node with default as swr core does not detect. Change-Id: Ibe40453c70867c9687bd01ca9345dae8080bafac Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-atp.dtsi | 2 +- kera-audio-cdp.dtsi | 2 +- kera-audio-lpass-reg.dtsi | 6 +++--- kera-audio-mtp-qmp1000.dtsi | 4 ++-- kera-audio-mtp.dtsi | 4 ++-- kera-audio-overlay.dtsi | 6 +++--- kera-audio-qrd.dtsi | 2 +- kera-audio.dtsi | 12 ++++++------ 8 files changed, 19 insertions(+), 19 deletions(-) diff --git a/kera-audio-atp.dtsi b/kera-audio-atp.dtsi index 3d2cee82..4f193ac6 100644 --- a/kera-audio-atp.dtsi +++ b/kera-audio-atp.dtsi @@ -21,7 +21,7 @@ qcom,wsa-max-devs = <0>; }; -&wsa_swr { +&swr0 { qcom,swr-num-dev = <0>; }; diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi index b14dcf5d..3bba2f68 100644 --- a/kera-audio-cdp.dtsi +++ b/kera-audio-cdp.dtsi @@ -58,7 +58,7 @@ status = "okay"; }; -&wsa_swr { +&swr0 { wsa884x_0220: wsa884x@02170220 { status = "okay"; }; diff --git a/kera-audio-lpass-reg.dtsi b/kera-audio-lpass-reg.dtsi index d42a3289..4485f758 100644 --- a/kera-audio-lpass-reg.dtsi +++ b/kera-audio-lpass-reg.dtsi @@ -6,7 +6,7 @@ reg = <0x6AC0000 0x0>; }; -&rx_swr { +&swr1 { swrm-io-base = <0x6AD0000 0x0>; interrupts = ; }; @@ -19,12 +19,12 @@ reg = <0x6B00000 0x0>; }; -&wsa_swr { +&swr0 { swrm-io-base = <0x6B10000 0x0>; interrupts = ; }; -&tx_swr { +&swr2 { reg = <0x7630000 0x0>; }; diff --git a/kera-audio-mtp-qmp1000.dtsi b/kera-audio-mtp-qmp1000.dtsi index 4d803fc7..902b1f00 100644 --- a/kera-audio-mtp-qmp1000.dtsi +++ b/kera-audio-mtp-qmp1000.dtsi @@ -5,7 +5,7 @@ #include "kera-audio-mtp.dtsi" -&rx_swr { +&swr1 { qcom,swr-num-dev = <2>; }; @@ -33,7 +33,7 @@ status = "disabled"; }; -&tx_swr { +&swr2 { qmp01: qmp@04170232 { /* * reg = ; }; -&wsa_swr { +&swr0 { qcom,swr-num-dev = <2>; }; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index e71a94f5..8a88bbbc 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -37,7 +37,7 @@ qcom,use-clk-id = ; qcom,is-used-swr-gpio = <1>; qcom,va-swr-gpios = <&va_swr_gpios>; - tx_swr: va_swr_master { + swr2: va_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; @@ -93,7 +93,7 @@ qcom,default-clk-id = ; clock-names = "rx_mclk2_2x_clk"; clocks = <&clock_audio_rx_mclk2_2x_clk 0>; - rx_swr: rx_swr_master { + swr1: rx_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; @@ -152,7 +152,7 @@ qcom,thermal-max-state = <11>; qcom,noise-gate-mode = <2>; #cooling-cells = <2>; - wsa_swr: wsa_swr_master { + swr0: wsa_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi index 9768b064..0afe6dc6 100644 --- a/kera-audio-qrd.dtsi +++ b/kera-audio-qrd.dtsi @@ -29,7 +29,7 @@ }; }; -&wsa_swr { +&swr0 { wsa884x_0220: wsa884x@02170220 { status = "disabled"; }; diff --git a/kera-audio.dtsi b/kera-audio.dtsi index 16d1110e..59d02973 100644 --- a/kera-audio.dtsi +++ b/kera-audio.dtsi @@ -135,7 +135,7 @@ }; va_macro: va-macro@7660000 { - tx_swr: va_swr_master { + swr2: va_swr_master { }; }; @@ -143,12 +143,12 @@ }; rx_macro: rx-macro@6AC0000 { - rx_swr: rx_swr_master { + swr1: rx_swr_master { }; }; wsa_macro: wsa-macro@6B00000 { - wsa_swr: wsa_swr_master { + swr0: wsa_swr_master { }; }; @@ -175,9 +175,9 @@ }; &aliases { - wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; - rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; - tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; + swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; }; From 6338ab11b7db5a6cff04879271b3ef734a80b4b8 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 27 Nov 2024 19:26:17 +0530 Subject: [PATCH 099/143] ARM: dts: msm: Change GIC and gpio Update GIC as per IPCAT the GIC number is incorrect. 722 will not get interrupts of HSJ and audio will be mute. Changing this to 721 as in tuna same issue was observing. correction of wrong gpio pin. Change-Id: Idb87af4d1438186ed29fc3227d447f1b6d189676 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-overlay.dtsi | 2 +- kera-lpi.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index 8a88bbbc..ea7d0954 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -48,7 +48,7 @@ qcom,swr_master_id = <3>; qcom,mipi-sdw-block-packing-mode = <1>; interrupts = - , + , ; interrupt-names = "swr_master_irq", "swr_wake_irq"; qcom,swr-wakeup-required = <1>; diff --git a/kera-lpi.dtsi b/kera-lpi.dtsi index ebf2e7b9..70127681 100644 --- a/kera-lpi.dtsi +++ b/kera-lpi.dtsi @@ -1804,7 +1804,7 @@ }; config { - pins = "gpio4"; + pins = "gpio14"; drive-strength = <2>; input-enable; bias-pull-down; From e8f6a16fb7824331dbc4d3136e14c201a00f2ad4 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 28 Nov 2024 11:30:18 +0530 Subject: [PATCH 100/143] ARM: dts: msm: disable haptics in QRD Haptics to be disabled. Change-Id: I5a2cc26c2732cac803cd38da7b0c21d0e6e8b7e1 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-qrd.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi index 0afe6dc6..a19f90b0 100644 --- a/kera-audio-qrd.dtsi +++ b/kera-audio-qrd.dtsi @@ -77,6 +77,7 @@ &kera_snd { qcom,model = "kera-qrd-snd-card"; + swr-haptics-unsupported; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd9378_codec>, <&wsa884x_0221>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", From 8ebc7e052262b1ae3405b8061974b43266b924be Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 29 Nov 2024 17:26:43 +0530 Subject: [PATCH 101/143] ARM: dts: msm: Update wcd codec for kera-qmp1000 Update correct wcd codec for kera qmp and its mic bias. Change-Id: I5c584401ff747f5ad801b93c0124eb00d1bc6965 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp-qmp1000.dtsi | 41 +++++-------------------------------- 1 file changed, 5 insertions(+), 36 deletions(-) diff --git a/kera-audio-mtp-qmp1000.dtsi b/kera-audio-mtp-qmp1000.dtsi index 902b1f00..8f57194a 100644 --- a/kera-audio-mtp-qmp1000.dtsi +++ b/kera-audio-mtp-qmp1000.dtsi @@ -5,33 +5,6 @@ #include "kera-audio-mtp.dtsi" -&swr1 { - qcom,swr-num-dev = <2>; -}; - -&wcd9378_rx_slave { - status = "okay"; -}; - -&wcd9378_tx_slave { - status = "okay"; -}; - -&wcd9378_codec { - status = "okay"; -}; - -&wcd939x_rx_slave { - status = "disabled"; -}; - -&wcd939x_tx_slave { - status = "disabled"; -}; - -&wcd939x_codec { - status = "disabled"; -}; &swr2 { qmp01: qmp@04170232 { @@ -114,12 +87,12 @@ &kera_snd { qcom,model = "kera-mtp-qmp-snd-card"; asoc-codec = <&stub_codec>, <&lpass_cdc>, - <&wcd9378_codec>, + <&wcd939x_codec>, <&wsa884x_0220>, <&wsa884x_0221>, <&qmp01>, <&qmp02>, <&qmp03>, <&qmp04>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd9378_codec", + "wcd939x_codec", "wsa-codec1", "wsa-codec2", "qmp-dmic.01", "qmp-dmic.02", "qmp-dmic.03", "qmp-dmic.04"; @@ -132,9 +105,7 @@ "AMIC3", "Analog Mic3", "AMIC3", "MIC BIAS3", "AMIC4", "Analog Mic4", - "AMIC4", "MIC BIAS3", - "AMIC5", "Analog Mic5", - "AMIC5", "MIC BIAS4", + "AMIC4", "MIC BIAS1", "VA AMIC1", "Analog Mic1", "VA AMIC1", "VA MIC BIAS1", "VA AMIC2", "Analog Mic2", @@ -142,9 +113,7 @@ "VA AMIC3", "Analog Mic3", "VA AMIC3", "VA MIC BIAS3", "VA AMIC4", "Analog Mic4", - "VA AMIC4", "VA MIC BIAS3", - "VA AMIC5", "Analog Mic5", - "VA AMIC5", "VA MIC BIAS4", + "VA AMIC4", "VA MIC BIAS1", "TX DMIC0", "Digital Mic0", "TX DMIC0", "MIC BIAS3", "TX DMIC1", "Digital Mic1", @@ -155,7 +124,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_EAR", "AUX_OUT", + "IN3_AUX", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", From 595a3edf8ce6a5ce6b5695b34c35b518f3e54304 Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Tue, 26 Nov 2024 19:55:29 +0800 Subject: [PATCH 102/143] ARM: dts: msm: Configuration to set thread priority In LL use-case GPR callback thread was in unable state. In normal thread and not in RT thread. Which causes pop noise issue. It needs to set glink-adsp_apps thread priority to be RT. This Configuration enables Client to set the configuration thread to be in RT. Change-Id: I2e25ad8755d48a8b4869360a7abe0249dd21ccf0 Signed-off-by: Yuhui Zhao --- tuna-audio.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/tuna-audio.dtsi b/tuna-audio.dtsi index dfe2a8b0..7cea0247 100644 --- a/tuna-audio.dtsi +++ b/tuna-audio.dtsi @@ -30,6 +30,7 @@ compatible = "qcom,gpr"; qcom,glink-channels = "adsp_apps"; qcom,intents = <0x200 20>; + qcom,ch-sched-rt; reg = ; spf_core { From 1e1bad36cfb13ef0ea838ff110cc85a07394524a Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Sun, 24 Nov 2024 20:45:20 +0530 Subject: [PATCH 103/143] ARM: dts: msm: Tuna and Tuna7 external Display support -Add Ext Display support for Tuna QRD and Tuna7 MTP. Change-Id: I6ed42b4359e61ae5f31d8e0d2c4f5694f32e7094 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-qrd.dtsi | 1 + tuna7-audio-mtp.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 4c238157..880b49be 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -130,6 +130,7 @@ <&wcd939x_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", "wcd939x_codec", "wsa-codec1"; + qcom,ext-disp-audio-rx = <1>; qcom,wsa-max-devs = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index befa7f72..b1252908 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -111,6 +111,7 @@ asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", "wcd939x_codec", "wsa-codec1", "wsa-codec2"; + qcom,ext-disp-audio-rx = <1>; qcom,wsa-max-devs = <2>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; From 8a5e4541144e8688591a2d6d185c6aec147d6921 Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Wed, 4 Dec 2024 15:01:56 +0800 Subject: [PATCH 104/143] ARM: dts: msm: correct wsa channel of kera qrd Correct wsa channel of kera qrd. it should be left channel. Change-Id: I8b784e77b2db45963d0e27a47a51fc145febb52b Signed-off-by: Yuhui Zhao --- kera-audio-cdp.dtsi | 12 +++++------- kera-audio-mtp.dtsi | 4 ++-- kera-audio-overlay.dtsi | 2 +- kera-audio-qrd.dtsi | 8 ++++---- 4 files changed, 12 insertions(+), 14 deletions(-) diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi index 3bba2f68..cfbe8973 100644 --- a/kera-audio-cdp.dtsi +++ b/kera-audio-cdp.dtsi @@ -98,7 +98,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_EAR", "AUX_OUT", + "IN3_AUX", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -108,9 +108,7 @@ "RX_TX DEC3_INP", "TX DEC3 MUX", "SpkrLeft IN", "WSA_SPK1 OUT", "SpkrRight IN", "WSA_SPK2 OUT", - "TX SWR_INPUT", "WCD_TX_OUTPUT", "VA SWR_INPUT", "VA_SWR_CLK", - "VA SWR_INPUT", "WCD_TX_OUTPUT", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK", @@ -118,10 +116,10 @@ "VA DMIC1", "Digital Mic1", "VA DMIC2", "Digital Mic2", "VA DMIC3", "Digital Mic3", - "VA DMIC0", "VA MIC BIAS1", - "VA DMIC1", "VA MIC BIAS1", - "VA DMIC2", "VA MIC BIAS3", - "VA DMIC3", "VA MIC BIAS3"; + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd9378_codec>, <&wsa884x_0220>, <&wsa884x_0221>; diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index 067fe728..16da7bbb 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -118,7 +118,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_AUX", "AUX_OUT", + "IN3_EAR", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -129,8 +129,8 @@ "SpkrLeft IN", "WSA_SPK1 OUT", "SpkrRight IN", "WSA_SPK2 OUT", "TX SWR_INPUT", "WCD_TX_OUTPUT", - "VA SWR_INPUT", "VA_SWR_CLK", "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK", diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index ea7d0954..0c8b8f90 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -458,7 +458,7 @@ "RX_TX DEC1_INP", "TX DEC1 MUX", "RX_TX DEC2_INP", "TX DEC2 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX", - "SpkrRight IN", "WSA_SPK2 OUT", + "SpkrLeft IN", "WSA_SPK1 OUT", "VA SWR_INPUT", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi index a19f90b0..c5b51dd4 100644 --- a/kera-audio-qrd.dtsi +++ b/kera-audio-qrd.dtsi @@ -31,11 +31,11 @@ &swr0 { wsa884x_0220: wsa884x@02170220 { - status = "disabled"; + status = "okay"; }; wsa884x_0221: wsa884x@02170221 { - status = "okay"; + status = "disabled"; }; }; @@ -79,8 +79,8 @@ qcom,model = "kera-qrd-snd-card"; swr-haptics-unsupported; asoc-codec = <&stub_codec>, <&lpass_cdc>, - <&wcd9378_codec>, <&wsa884x_0221>; + <&wcd9378_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd9378_codec", "wsa-codec2"; + "wcd9378_codec", "wsa-codec1"; qcom,wsa-max-devs = <1>; }; From bcff7851c923f7edbffcd7145bc0624888f2d846 Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Mon, 9 Dec 2024 18:33:37 +0800 Subject: [PATCH 105/143] ARM: dts: msm: correct the config of tx_swr_data0 Correct the config of tx_swr_data0, the bias type should be same with tx_swr_data1. Change-Id: Id871ed15c0bf21ab68c4d3341f2761e451a9aa03 Signed-off-by: Yuhui Zhao --- tuna-lpi.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tuna-lpi.dtsi b/tuna-lpi.dtsi index 70127681..459930e0 100644 --- a/tuna-lpi.dtsi +++ b/tuna-lpi.dtsi @@ -1735,7 +1735,7 @@ pins = "gpio1"; drive-strength = <4>; slew-rate = <1>; - bias-disable; + bias-bus-hold; }; }; @@ -1750,7 +1750,7 @@ pins = "gpio1"; drive-strength = <2>; input-enable; - bias-bus-hold; + bias-pull-down; }; }; From 2d7a72572a11137b686f22f120e4f542f611710e Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Mon, 9 Dec 2024 19:07:39 +0800 Subject: [PATCH 106/143] ARM: dts: msm: correct the config of tx_swr_data0 for kera Correct the config of tx_swr_data0 for kera, the bias type should be same with tx_swr_data1. Change-Id: I021a0c69db50437d1c825b018ace533d24047096 Signed-off-by: Yuhui Zhao --- kera-lpi.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/kera-lpi.dtsi b/kera-lpi.dtsi index 70127681..e1b4151e 100644 --- a/kera-lpi.dtsi +++ b/kera-lpi.dtsi @@ -1735,8 +1735,7 @@ pins = "gpio1"; drive-strength = <4>; slew-rate = <1>; - bias-disable; - + bias-bus-hold; }; }; @@ -1750,7 +1749,7 @@ pins = "gpio1"; drive-strength = <2>; input-enable; - bias-bus-hold; + bias-pull-down; }; }; From 51b78bec7fabdfa7bf2c6c29f670826523bbd10b Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Wed, 27 Nov 2024 14:25:46 +0530 Subject: [PATCH 107/143] ARM: dts: msm: Enable BT audio for tuna hmt variant Enable BT audio DAI links for tuna HMT variant. Change-Id: I5690ef59886048c7e6aef649077f1c143946076a Signed-off-by: Vangala, Amarnath --- tuna-audio-hamilton-mtp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio-hamilton-mtp.dtsi b/tuna-audio-hamilton-mtp.dtsi index c286d3b2..35b0c67f 100644 --- a/tuna-audio-hamilton-mtp.dtsi +++ b/tuna-audio-hamilton-mtp.dtsi @@ -12,7 +12,7 @@ &tuna_snd { qcom,model = "tuna-mtp-snd-card"; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; }; From b19ed5b15e88c48cbd9ff139dc4ca59998abff20 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Wed, 27 Nov 2024 14:20:03 +0530 Subject: [PATCH 108/143] ARM: dts: msm: enable BT audio for tuna7 MTP Enable BT Audio DAI links for tuna7 MTP. Change-Id: If18dba0a0cf9081ce499cc58ac7b12a9d747b762 Signed-off-by: Vangala, Amarnath --- tuna7-audio-mtp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index befa7f72..4ca84dcc 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -118,5 +118,5 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; }; From ff44b19dab9325a6074967b4c765c815415331da Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Sun, 24 Nov 2024 20:45:20 +0530 Subject: [PATCH 109/143] ARM: dts: msm: Tuna and Tuna7 external Display support -Add Ext Display support for Tuna QRD and Tuna7 MTP. Change-Id: I6ed42b4359e61ae5f31d8e0d2c4f5694f32e7094 Signed-off-by: Ravulapati Vishnu Vardhan Rao (cherry picked from commit 1e1bad36cfb13ef0ea838ff110cc85a07394524a) --- tuna-audio-qrd.dtsi | 1 + tuna7-audio-mtp.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 4c238157..880b49be 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -130,6 +130,7 @@ <&wcd939x_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", "wcd939x_codec", "wsa-codec1"; + qcom,ext-disp-audio-rx = <1>; qcom,wsa-max-devs = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index befa7f72..b1252908 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -111,6 +111,7 @@ asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", "wcd939x_codec", "wsa-codec1", "wsa-codec2"; + qcom,ext-disp-audio-rx = <1>; qcom,wsa-max-devs = <2>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; From 6cf23611a982ad410d4208846de09a9cff14373e Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Wed, 27 Nov 2024 14:25:46 +0530 Subject: [PATCH 110/143] ARM: dts: msm: Enable BT audio for tuna hmt variant Enable BT audio DAI links for tuna HMT variant. Change-Id: I5690ef59886048c7e6aef649077f1c143946076a Signed-off-by: Vangala, Amarnath --- tuna-audio-hamilton-mtp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio-hamilton-mtp.dtsi b/tuna-audio-hamilton-mtp.dtsi index c286d3b2..35b0c67f 100644 --- a/tuna-audio-hamilton-mtp.dtsi +++ b/tuna-audio-hamilton-mtp.dtsi @@ -12,7 +12,7 @@ &tuna_snd { qcom,model = "tuna-mtp-snd-card"; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; }; From 0e52f66a197dd059cecd1cc469079ce6510a15e9 Mon Sep 17 00:00:00 2001 From: "Vangala, Amarnath" Date: Wed, 27 Nov 2024 14:20:03 +0530 Subject: [PATCH 111/143] ARM: dts: msm: enable BT audio for tuna7 MTP Enable BT Audio DAI links for tuna7 MTP. Change-Id: If18dba0a0cf9081ce499cc58ac7b12a9d747b762 Signed-off-by: Vangala, Amarnath --- tuna7-audio-mtp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index befa7f72..4ca84dcc 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -118,5 +118,5 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; }; From 8853cd728ba6e36baaf063d8404e1f3cb70e0f73 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 23 Dec 2024 10:28:13 +0530 Subject: [PATCH 112/143] ARM: dts: msm: Enable swr-haptics for tuna QRD Enable swr-haptics in tuna QRD. Change-Id: I44be2af48d04c28e094df6f3a6bcff26c906dc25 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-cdp.dtsi | 1 - tuna-audio-mtp.dtsi | 1 - tuna-audio-overlay.dtsi | 1 - tuna-audio-qrd.dtsi | 10 +++++++--- 4 files changed, 7 insertions(+), 6 deletions(-) diff --git a/tuna-audio-cdp.dtsi b/tuna-audio-cdp.dtsi index 31e7cff7..0fba8c7b 100644 --- a/tuna-audio-cdp.dtsi +++ b/tuna-audio-cdp.dtsi @@ -65,7 +65,6 @@ &tuna_snd { qcom,model = "tuna-cdp-snd-card"; - swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", diff --git a/tuna-audio-mtp.dtsi b/tuna-audio-mtp.dtsi index 996187eb..343c2d49 100644 --- a/tuna-audio-mtp.dtsi +++ b/tuna-audio-mtp.dtsi @@ -11,6 +11,5 @@ &tuna_snd { qcom,model = "tuna-mtp-snd-card"; - swr-haptics-unsupported; qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; }; diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 1af02067..66bcccf9 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -127,7 +127,6 @@ swr_haptics: swr_haptics@f0170220 { compatible = "qcom,pmih010x-swr-haptics"; reg = <0x03 0xf0170220>; - //swr-slave-supply = <&hap_swr_slave_reg>; qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; status = "disabled"; }; diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 880b49be..87ed7cf6 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -63,6 +63,11 @@ qcom,wsa-bat-cfgs = <1>, <1>; }; +&swr_haptics { + status = "okay"; + swr-slave-supply = <&hap_swr_slave_reg>; +}; + &wcd939x_codec { status = "okay"; /* 0 for digital crosstalk disabled, @@ -91,7 +96,6 @@ &tuna_snd { qcom,model = "tuna-qrd-snd-card"; - swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", @@ -126,9 +130,9 @@ "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK"; - asoc-codec = <&stub_codec>, <&lpass_cdc>, + asoc-codec = <&stub_codec>, <&lpass_cdc>, <&swr_haptics>, <&wcd939x_codec>, <&wsa884x_0220>; - asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc","swr_haptics", "wcd939x_codec", "wsa-codec1"; qcom,ext-disp-audio-rx = <1>; qcom,wsa-max-devs = <1>; From 1f9c246241b327ba190f242b2472ee0e028235bf Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 27 Dec 2024 13:05:45 +0530 Subject: [PATCH 113/143] ARM: dts: msm: update primary i2s pin - As in IPCAT there is a conflicting info about PIN configuration, Corrected as per discussion with IPS. - Removal of I2S0_DATA1 pin, as GPIO_63 is not used internally for I2S purpose and it is being used by other subsystem. Change-Id: Ie1788565e7a4f47a167108de2e3ada3ac099da7e Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp.dtsi | 4 ++++ kera-audio-overlay.dtsi | 4 ++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index 16da7bbb..517e349e 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -30,6 +30,10 @@ }; }; +&cdc_pri_mi2s_gpios { + status = "okay"; +}; + &swr1 { qcom,swr-num-dev = <2>; }; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index 0c8b8f90..f4847ae1 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -489,9 +489,9 @@ compatible = "qcom,msm-cdc-pinctrl"; pinctrl-names = "aud_active", "aud_sleep"; pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active - &i2s0_sd0_active &i2s0_sd1_active>; + &i2s0_sd0_active>; pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep - &i2s0_sd0_sleep &i2s0_sd1_sleep>; + &i2s0_sd0_sleep>; #gpio-cells = <0>; }; From 4b7c9a8d97b403e2e0979b8c7621daf4411fda92 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 26 Dec 2024 08:33:40 +0530 Subject: [PATCH 114/143] ARM: dts: msm: Remove tlmm node Remove tlmm node as lpi_tlmm already address. Change-Id: I77d6e186c3d315ba445dec8b6f1789e749db190f Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-lpass-reg.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/kera-audio-lpass-reg.dtsi b/kera-audio-lpass-reg.dtsi index 4485f758..c8e29bd3 100644 --- a/kera-audio-lpass-reg.dtsi +++ b/kera-audio-lpass-reg.dtsi @@ -31,7 +31,3 @@ &va_macro { reg = <0x7660000 0x0>; }; - -&tlmm { - reg = <0x7760000 0x0>; -}; From f0adcad997644eb704939ed7fe19d251f7943246 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 30 Dec 2024 11:32:36 +0530 Subject: [PATCH 115/143] ARM: dts: msm: Enable BT on Kera variants Enable BT for slimbus validation. Change-Id: I0d96cb75016712459878231f05072d22eee3d6bf Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-overlay.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index 0c8b8f90..ed74775e 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -417,7 +417,7 @@ qcom,model = "kera-qrd-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; From 27a63669c3cf5c90a3722599b1f36f30b5f4f082 Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Mon, 30 Dec 2024 10:34:22 +0800 Subject: [PATCH 116/143] ARM: dts: msm: add fsa node in qrd dts Fsa node was missing in qrd dts. raise this change to add the fsa node for qrd Change-Id: I1093c5a925c60d187d902ebf3b70291ac21cf18c Signed-off-by: Yuhui Zhao --- kera-audio-qrd.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi index c5b51dd4..4efa6288 100644 --- a/kera-audio-qrd.dtsi +++ b/kera-audio-qrd.dtsi @@ -83,4 +83,5 @@ asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", "wcd9378_codec", "wsa-codec1"; qcom,wsa-max-devs = <1>; + fsa4480-i2c-handle = <&fsa4480>; }; From 1e8205fd731adefd0b07ef20424b4ea09761f719 Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Mon, 30 Dec 2024 15:07:15 +0530 Subject: [PATCH 117/143] ARM: dts: msm: Update kera overlay dtsi -Add cdc_dmic_gpio's in kera overlay dtsi. -As part dmic event, msm pinctrl state is checked, The node should already be parsed and cached during machine probe. Change-Id: I2cdd410274df99d463a2ba01d00f315754fd831f Signed-off-by: Kisan Yadav --- kera-audio-overlay.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index ed74775e..57430176 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -479,6 +479,8 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,wsa-max-devs = <1>; + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>, <&lpass_bt_swr>; From f9c2c580ec231bbca0fd347d1d705222cce62905 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Sun, 29 Dec 2024 10:41:36 +0530 Subject: [PATCH 118/143] ARM: dts: msm: update swr-num-devs and swrm-io-base update swr-num-devs and swrm-io-base for kera variants. Change-Id: I095e6fc88f69c23cb9d0facc5394169456d5e4e9 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-cdp.dtsi | 7 +++++-- kera-audio-lpass-reg.dtsi | 6 +----- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi index cfbe8973..ccd3b198 100644 --- a/kera-audio-cdp.dtsi +++ b/kera-audio-cdp.dtsi @@ -59,6 +59,7 @@ }; &swr0 { + qcom,swr-num-dev = <2>; wsa884x_0220: wsa884x@02170220 { status = "okay"; }; @@ -68,6 +69,10 @@ }; }; +&swr1 { + qcom,swr-num-dev = <2>; +}; + &kera_snd { qcom,model = "kera-cdp-snd-card"; swr-haptics-unsupported; @@ -79,7 +84,6 @@ "AMIC3", "Analog Mic3", "AMIC3", "MIC BIAS3", "AMIC4", "Analog Mic4", - "AMIC4", "MIC BIAS4", "VA AMIC1", "Analog Mic1", "VA AMIC1", "VA MIC BIAS1", "VA AMIC2", "Analog Mic2", @@ -87,7 +91,6 @@ "VA AMIC3", "Analog Mic3", "VA AMIC3", "VA MIC BIAS3", "VA AMIC4", "Analog Mic4", - "VA AMIC4", "VA MIC BIAS4", "TX DMIC0", "Digital Mic0", "TX DMIC0", "MIC BIAS3", "TX DMIC1", "Digital Mic1", diff --git a/kera-audio-lpass-reg.dtsi b/kera-audio-lpass-reg.dtsi index 4485f758..03380ee4 100644 --- a/kera-audio-lpass-reg.dtsi +++ b/kera-audio-lpass-reg.dtsi @@ -25,13 +25,9 @@ }; &swr2 { - reg = <0x7630000 0x0>; + swrm-io-base = <0x7630000 0x0>; }; &va_macro { reg = <0x7660000 0x0>; }; - -&tlmm { - reg = <0x7760000 0x0>; -}; From a11f3c6ab7cc2929dd352488611b11ffde636e60 Mon Sep 17 00:00:00 2001 From: Kumar Anurag Singh Date: Tue, 31 Dec 2024 00:47:29 -0800 Subject: [PATCH 119/143] ARM: dts: msm: Add support for CDP platform for Kera IOT Add audio dt support for IoT CDP platform for Kera SoC. Change-Id: I1f4f07358570957ea995b66c8ecbb00faa4d9ed8 Signed-off-by: Kumar Anurag Singh --- Kbuild | 1 + kera-iot-audio-cdp.dts | 18 +++++ kera-iot-audio-cdp.dtsi | 142 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 161 insertions(+) create mode 100644 kera-iot-audio-cdp.dts create mode 100644 kera-iot-audio-cdp.dtsi diff --git a/Kbuild b/Kbuild index 7f2413b5..063f5400 100644 --- a/Kbuild +++ b/Kbuild @@ -49,6 +49,7 @@ ifeq ($(CONFIG_ARCH_KERA), y) dtbo-y += kera-audio.dtbo \ kera-audio-atp.dtbo \ kera-audio-cdp.dtbo \ + kera-iot-audio-cdp.dtbo \ kera-audio-mtp.dtbo \ kera-audio-mtp-qmp1000.dtbo \ kera-audio-qrd.dtbo \ diff --git a/kera-iot-audio-cdp.dts b/kera-iot-audio-cdp.dts new file mode 100644 index 00000000..0c405062 --- /dev/null +++ b/kera-iot-audio-cdp.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-iot-audio-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera CDP for IoT"; + compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap", + "qcom,cdp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x50001 0>; +}; + diff --git a/kera-iot-audio-cdp.dtsi b/kera-iot-audio-cdp.dtsi new file mode 100644 index 00000000..ccd3b198 --- /dev/null +++ b/kera-iot-audio-cdp.dtsi @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-overlay.dtsi" +#include "kera-audio-lpass-reg.dtsi" + +&cdc_pri_mi2s_gpios { + status = "ok"; +}; + +&cdc_quat_mi2s_gpios { + status = "disabled"; +}; + +&cdc_quin_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sen_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sep_mi2s_gpios { + status = "disabled"; +}; + +&lpass_bt_swr { + status = "disabled"; +}; + +&wcd9378_codec { + status = "okay"; + cdc-vdd-io-supply = <&L7B>; + qcom,cdc-vdd-io-voltage = <1800000 1800000>; + qcom,cdc-vdd-io-current = <20000>; + qcom,cdc-vdd-io-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>; + qcom,cdc-vdd-mic-bias-current = <40550>; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd9378_rx_slave { + status = "okay"; +}; + +&wcd9378_tx_slave { + status = "okay"; +}; + +&swr0 { + qcom,swr-num-dev = <2>; + wsa884x_0220: wsa884x@02170220 { + status = "okay"; + }; + + wsa884x_0221: wsa884x@02170221 { + status = "okay"; + }; +}; + +&swr1 { + qcom,swr-num-dev = <2>; +}; + +&kera_snd { + qcom,model = "kera-cdp-snd-card"; + swr-haptics-unsupported; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, + <&wsa884x_0220>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", + "wsa-codec1", "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; + qcom,quat-mi2s-gpios = <&cdc_quat_mi2s_gpios>; + qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>; + qcom,sen-mi2s-gpios = <&cdc_sen_mi2s_gpios>; + qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; +}; From 904d4e888aa735b20251141e3d940e2c05fa9ce1 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 6 Jan 2025 16:02:36 +0530 Subject: [PATCH 120/143] ARM: dts: msm: Enable external display on Kera Ebnable external display on all the Kera variants. Change-Id: I1448b3144f6cecf4282d9f87fd9c00c59f67328f Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-overlay.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index 85df504e..ceea5f64 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -418,7 +419,7 @@ qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,wcn-bt = <1>; - qcom,ext-disp-audio-rx = <0>; + qcom,ext-disp-audio-rx = <1>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; From 06d99ceb291edb33930de6c7ac3589a15f36a7b2 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 23 Dec 2024 10:28:13 +0530 Subject: [PATCH 121/143] ARM: dts: msm: Enable swr-haptics for tuna QRD Enable swr-haptics in tuna QRD. Change-Id: I44be2af48d04c28e094df6f3a6bcff26c906dc25 Signed-off-by: Ravulapati Vishnu Vardhan Rao (cherry picked from commit 8853cd728ba6e36baaf063d8404e1f3cb70e0f73) --- tuna-audio-cdp.dtsi | 1 - tuna-audio-mtp.dtsi | 1 - tuna-audio-overlay.dtsi | 1 - tuna-audio-qrd.dtsi | 10 +++++++--- 4 files changed, 7 insertions(+), 6 deletions(-) diff --git a/tuna-audio-cdp.dtsi b/tuna-audio-cdp.dtsi index 31e7cff7..0fba8c7b 100644 --- a/tuna-audio-cdp.dtsi +++ b/tuna-audio-cdp.dtsi @@ -65,7 +65,6 @@ &tuna_snd { qcom,model = "tuna-cdp-snd-card"; - swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", diff --git a/tuna-audio-mtp.dtsi b/tuna-audio-mtp.dtsi index 996187eb..343c2d49 100644 --- a/tuna-audio-mtp.dtsi +++ b/tuna-audio-mtp.dtsi @@ -11,6 +11,5 @@ &tuna_snd { qcom,model = "tuna-mtp-snd-card"; - swr-haptics-unsupported; qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>; }; diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 1af02067..66bcccf9 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -127,7 +127,6 @@ swr_haptics: swr_haptics@f0170220 { compatible = "qcom,pmih010x-swr-haptics"; reg = <0x03 0xf0170220>; - //swr-slave-supply = <&hap_swr_slave_reg>; qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; status = "disabled"; }; diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 880b49be..87ed7cf6 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -63,6 +63,11 @@ qcom,wsa-bat-cfgs = <1>, <1>; }; +&swr_haptics { + status = "okay"; + swr-slave-supply = <&hap_swr_slave_reg>; +}; + &wcd939x_codec { status = "okay"; /* 0 for digital crosstalk disabled, @@ -91,7 +96,6 @@ &tuna_snd { qcom,model = "tuna-qrd-snd-card"; - swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", @@ -126,9 +130,9 @@ "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK"; - asoc-codec = <&stub_codec>, <&lpass_cdc>, + asoc-codec = <&stub_codec>, <&lpass_cdc>, <&swr_haptics>, <&wcd939x_codec>, <&wsa884x_0220>; - asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc","swr_haptics", "wcd939x_codec", "wsa-codec1"; qcom,ext-disp-audio-rx = <1>; qcom,wsa-max-devs = <1>; From 3f6551b70a0648e416f891b4df1d56f79da92c36 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 8 Jan 2025 16:16:06 +0530 Subject: [PATCH 122/143] ARM: dts: msm: update of I2S node Correct I2S mode for primary i2s interface. Change-Id: Icba866fdcc86c717cc1b03af1ca998d641129475 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index 517e349e..16451826 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "kera-audio-overlay.dtsi" @@ -158,7 +158,7 @@ "wsa-codec2"; qcom,wsa-max-devs = <2>; swr-haptics-unsupported; - qcom,pri_mi2s_gpios = <&cdc_pri_mi2s_gpios>; + qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; qcom,msm-mbhc-usbc-audio-supported = <0>; From ffcf1fed07303202ed9e3ace2d29eb63bd2b4a61 Mon Sep 17 00:00:00 2001 From: Kumar Anurag Singh Date: Mon, 6 Jan 2025 01:16:35 -0800 Subject: [PATCH 123/143] ARM: dts: msm: Add support for extra 2DMICS on CDP platform for Kera IOT Add support for extra 2DMICS on CDP platform for Kera IOT SoC. Change-Id: Ibb33c899593b0d52e1a2ce9c26f249ee97faa5a4 Signed-off-by: Kumar Anurag Singh --- kera-iot-audio-cdp.dtsi | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/kera-iot-audio-cdp.dtsi b/kera-iot-audio-cdp.dtsi index ccd3b198..eb015128 100644 --- a/kera-iot-audio-cdp.dtsi +++ b/kera-iot-audio-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "kera-audio-overlay.dtsi" @@ -30,6 +30,10 @@ status = "disabled"; }; +&cdc_dmic67_gpios { + status = "okay"; +}; + &wcd9378_codec { status = "okay"; cdc-vdd-io-supply = <&L7B>; @@ -99,6 +103,10 @@ "TX DMIC2", "MIC BIAS1", "TX DMIC3", "Digital Mic3", "TX DMIC3", "MIC BIAS1", + "TX DMIC6", "Digital Mic6", + "TX DMIC6", "MIC BIAS1", + "TX DMIC7", "Digital Mic7", + "TX DMIC7", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_AUX", "AUX_OUT", @@ -119,10 +127,14 @@ "VA DMIC1", "Digital Mic1", "VA DMIC2", "Digital Mic2", "VA DMIC3", "Digital Mic3", + "VA DMIC6", "Digital Mic6", + "VA DMIC7", "Digital Mic7", "VA DMIC0", "VA MIC BIAS3", "VA DMIC1", "VA MIC BIAS3", "VA DMIC2", "VA MIC BIAS1", - "VA DMIC3", "VA MIC BIAS1"; + "VA DMIC3", "VA MIC BIAS1", + "VA DMIC6", "VA MIC BIAS1", + "VA DMIC7", "VA MIC BIAS1"; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd9378_codec>, <&wsa884x_0220>, <&wsa884x_0221>; @@ -135,6 +147,7 @@ qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>; qcom,sen-mi2s-gpios = <&cdc_sen_mi2s_gpios>; qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; + qcom,cdc-dmic67-gpios = <&cdc_dmic67_gpios>; qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; From e853d1ca1ef483e916510de5f057d6effde44874 Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Wed, 15 Jan 2025 18:22:07 +0530 Subject: [PATCH 124/143] ARM: dts: msm: Update board id for MTP_4.1.0 platform -MTP_4.1.0 platform board ID was added in tuna7 but it seems to be a tuna device due to which wcd enumeration is failing. -Remove the board id from tuna7 dts file and adding in tuna dts. Change-Id: I4c729f6c8ef99fbd8cd7985dba22ac284ff4b989 Signed-off-by: Kisan Yadav --- tuna-audio-mtp.dts | 4 ++-- tuna7-audio-mtp.dts | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tuna-audio-mtp.dts b/tuna-audio-mtp.dts index fef29692..0a75ab34 100644 --- a/tuna-audio-mtp.dts +++ b/tuna-audio-mtp.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -13,6 +13,6 @@ compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; - qcom,board-id = <8 0>; + qcom,board-id = <8 0>, <8 4>; }; diff --git a/tuna7-audio-mtp.dts b/tuna7-audio-mtp.dts index 746c8187..4cd9ea8a 100644 --- a/tuna7-audio-mtp.dts +++ b/tuna7-audio-mtp.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -13,5 +13,5 @@ compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; qcom,msm-id = <681 0x10000>, <655 0x10000>; - qcom,board-id = <8 3>, <8 4>; + qcom,board-id = <8 3>; }; From 8e67bcc07293f7b55f5c64a6d0dbe5469dc7242a Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 6 Jan 2025 16:02:36 +0530 Subject: [PATCH 125/143] ARM: dts: msm: Enable external display on Kera Ebnable external display on all the Kera variants. Change-Id: I1448b3144f6cecf4282d9f87fd9c00c59f67328f Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-overlay.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index 85df504e..ceea5f64 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -418,7 +419,7 @@ qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,wcn-bt = <1>; - qcom,ext-disp-audio-rx = <0>; + qcom,ext-disp-audio-rx = <1>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; From 4827e31618912d9759df119b22104d183bed9a0c Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 8 Jan 2025 16:16:06 +0530 Subject: [PATCH 126/143] ARM: dts: msm: update of I2S node Correct I2S mode for primary i2s interface. Change-Id: Icba866fdcc86c717cc1b03af1ca998d641129475 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index 517e349e..16451826 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "kera-audio-overlay.dtsi" @@ -158,7 +158,7 @@ "wsa-codec2"; qcom,wsa-max-devs = <2>; swr-haptics-unsupported; - qcom,pri_mi2s_gpios = <&cdc_pri_mi2s_gpios>; + qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; qcom,msm-mbhc-usbc-audio-supported = <0>; From e023c7301990f3012d6d9b06fc301241075dd489 Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Wed, 15 Jan 2025 18:22:07 +0530 Subject: [PATCH 127/143] ARM: dts: msm: Update board id for MTP_4.1.0 platform -MTP_4.1.0 platform board ID was added in tuna7 but it seems to be a tuna device due to which wcd enumeration is failing. -Remove the board id from tuna7 dts file and adding in tuna dts. Change-Id: I4c729f6c8ef99fbd8cd7985dba22ac284ff4b989 Signed-off-by: Kisan Yadav --- tuna-audio-mtp.dts | 4 ++-- tuna7-audio-mtp.dts | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tuna-audio-mtp.dts b/tuna-audio-mtp.dts index fef29692..0a75ab34 100644 --- a/tuna-audio-mtp.dts +++ b/tuna-audio-mtp.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -13,6 +13,6 @@ compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; - qcom,board-id = <8 0>; + qcom,board-id = <8 0>, <8 4>; }; diff --git a/tuna7-audio-mtp.dts b/tuna7-audio-mtp.dts index 746c8187..4cd9ea8a 100644 --- a/tuna7-audio-mtp.dts +++ b/tuna7-audio-mtp.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -13,5 +13,5 @@ compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; qcom,msm-id = <681 0x10000>, <655 0x10000>; - qcom,board-id = <8 3>, <8 4>; + qcom,board-id = <8 3>; }; From 4ee5875a30bf0dec1944633417c6b53b63c9a297 Mon Sep 17 00:00:00 2001 From: MingShu Pang Date: Wed, 4 Dec 2024 14:21:11 +0800 Subject: [PATCH 128/143] =?UTF-8?q?ARM:=20dts:=20msm:=20add=20wcn-bt-ext?= =?UTF-8?q?=20for=20enabling=20second=20bt=20backend=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add wcn-bt-ext for enabling second bt backend. Change-Id: Ifde1e204bad2d3496297ac9184a53c3e282510aa Signed-off-by: MingShu Pang --- sun-audio-overlay.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index ed513359..e6ba7752 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -439,6 +439,7 @@ qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,wcn-bt = <1>; + qcom,wcn-bt-ext = <1>; qcom,ext-disp-audio-rx = <1>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; From 540cde9334466610ae0dd6b950e63e32045b0e45 Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Thu, 23 Jan 2025 10:40:44 +0530 Subject: [PATCH 129/143] ARM: dts: msm: Add haptics route for QRD -Haptics route is not present in audio routing of qrd device tree and eventually ringtone haptics is not working. -Add haptics routing and also update haptics codec name to swr-haptics. Change-Id: Ie4078c410cf593edd990dd49020f6d0cde7c1a26 Signed-off-by: Kisan Yadav --- tuna-audio-qrd.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 87ed7cf6..8e5df1ba 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "tuna-audio-overlay.dtsi" &tx_swr_clk_active { @@ -116,6 +116,7 @@ "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_EAR", "AUX_OUT", + "HAP_IN", "PCM_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -132,7 +133,7 @@ "VA_AIF3 CAP", "VA_SWR_CLK"; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&swr_haptics>, <&wcd939x_codec>, <&wsa884x_0220>; - asoc-codec-names = "msm-stub-codec.1", "lpass-cdc","swr_haptics", + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc","swr-haptics", "wcd939x_codec", "wsa-codec1"; qcom,ext-disp-audio-rx = <1>; qcom,wsa-max-devs = <1>; From 900b5f59d4e5b9ccc01ed0a7d5dc2b73c972a58a Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 27 Jan 2025 15:25:54 +0530 Subject: [PATCH 130/143] ARM: dts: msm: enable swr haptics dailinks in Kera Enable swr haptics dailink on Kera variants. Even though kera does not support SWR haptics, as there is no LRA connected, creating the haptics dailink to run haptics usecase cleanly during andorid vts tests. Change-Id: Ia2415a69260612be03f0e26515f91074a156702d Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp.dtsi | 1 - kera-audio-qrd.dtsi | 3 +-- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index 16451826..d0c73437 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -157,7 +157,6 @@ "wcd939x_codec", "wsa-codec1", "wsa-codec2"; qcom,wsa-max-devs = <2>; - swr-haptics-unsupported; qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi index 4efa6288..2f30bdd2 100644 --- a/kera-audio-qrd.dtsi +++ b/kera-audio-qrd.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "kera-audio-overlay.dtsi" #include "kera-audio-lpass-reg.dtsi" @@ -77,7 +77,6 @@ &kera_snd { qcom,model = "kera-qrd-snd-card"; - swr-haptics-unsupported; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd9378_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", From d2fe78d4a6d17852c12b56bf1cfeb5b82c10d69a Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 11 Feb 2025 13:15:19 +0530 Subject: [PATCH 131/143] ARM: dts: msm: Add record audio routes Add record in audio-routes for tuna7 where it is missing for record over AATC. With this can record using AATC. Change-Id: I9a76e16d5dc8168a11411ce715559350e6cc0c1f Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna7-audio-mtp.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index 90adbb5c..6def512f 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "tuna-audio-mtp.dtsi" @@ -91,6 +91,8 @@ "RX_TX DEC3_INP", "TX DEC3 MUX", "SpkrLeft IN", "WSA_SPK1 OUT", "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "WCD_TX_OUTPUT", "VA SWR_INPUT", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", From 54e16fa76df4b133469483bebbff0692adce98da Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 13 Feb 2025 12:56:41 +0530 Subject: [PATCH 132/143] ARM: dts: msm: Add support KERA + RCM + ORNE Add support for RCM KERA device with Orne. Change-Id: I1b1878fee4d5f662dc011fe76bdba3f6950d42f7 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 3 ++- kera-audio-rcm-orne.dts | 17 +++++++++++++++++ kera-audio-rcm-orne.dtsi | 13 +++++++++++++ 3 files changed, 32 insertions(+), 1 deletion(-) create mode 100644 kera-audio-rcm-orne.dts create mode 100644 kera-audio-rcm-orne.dtsi diff --git a/Kbuild b/Kbuild index 063f5400..2995f6c5 100644 --- a/Kbuild +++ b/Kbuild @@ -53,7 +53,8 @@ dtbo-y += kera-audio.dtbo \ kera-audio-mtp.dtbo \ kera-audio-mtp-qmp1000.dtbo \ kera-audio-qrd.dtbo \ - kera-audio-rcm.dtbo + kera-audio-rcm.dtbo \ + kera-audio-rcm-orne.dtbo endif diff --git a/kera-audio-rcm-orne.dts b/kera-audio-rcm-orne.dts new file mode 100644 index 00000000..5ea555a6 --- /dev/null +++ b/kera-audio-rcm-orne.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-rcm-orne.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kuna RCM+ORNE"; + compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap", + "qcom,rcm"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x10015 0>, <0x20015 0>, <0x30015 0>, <0x30015 1>, + <0x10015 1>, <0x20015 1>; +}; diff --git a/kera-audio-rcm-orne.dtsi b/kera-audio-rcm-orne.dtsi new file mode 100644 index 00000000..62b7ef32 --- /dev/null +++ b/kera-audio-rcm-orne.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-cdp.dtsi" + +&lpass_bt_swr { + status = "okay"; +}; From 78c03916feb50972214efd6f628e90169e230a58 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 25 Feb 2025 19:50:24 +0530 Subject: [PATCH 133/143] ARM: dts: msm: update clk div factor entry for TX and VA macros Update clk div factor entries for TX and VA macros to reflect proper HW configuration. Change-Id: Ic5456d7e30245a484b6a4888835c7e6f838eb92b Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-overlay.dtsi | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index ceea5f64..a3f4786c 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -32,8 +32,20 @@ compatible = "qcom,lpass-cdc-va-macro"; clock-names = "lpass_audio_hw_vote"; clocks = <&lpass_audio_hw_vote 0>; - qcom,va-dmic-sample-rate = <600000>; qcom,va-clk-mux-select = <1>; + /* + * Clk divding factors for each DMIC pair. + * Valid entries for each DMIC pair: + * 2, 3, 4, 6, 8, 16 + * + * These factors are translated to corresponding config values + * for the following registers, + * -- LPASS_VA_TOP_CSR_DMIC0_CTL, + * -- LPASS_VA_TOP_CSR_DMIC1_CTL, + * -- LPASS_VA_TOP_CSR_DMIC2_CTL, + * -- LPASS_VA_TOP_CSR_DMIC3_CTL, + */ + qcom,va-dmic-clk-div-factor = <16 16 16 16>; qcom,default-clk-id = ; qcom,use-clk-id = ; qcom,is-used-swr-gpio = <1>; @@ -82,7 +94,19 @@ tx_macro: tx-macro@6AE0000 { compatible = "qcom,lpass-cdc-tx-macro"; qcom,default-clk-id = ; - qcom,tx-dmic-sample-rate = <2400000>; + /* + * Clk divding factors for each DMIC pair. + * Valid entries for each DMIC pair: + * 2, 3, 4, 6, 8, 16 + * + * These factors are translated to corresponding config values + * for the following registers, + * -- LPASS_VA_TOP_CSR_DMIC0_CTL, + * -- LPASS_VA_TOP_CSR_DMIC1_CTL, + * -- LPASS_VA_TOP_CSR_DMIC2_CTL, + * -- LPASS_VA_TOP_CSR_DMIC3_CTL, + */ + qcom,tx-dmic-clk-div-factor = <4 4 4 4>; qcom,is-used-swr-gpio = <0>; }; From 47c66586921f0d5e52a834876b13fd14ab518444 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 13 Feb 2025 12:56:41 +0530 Subject: [PATCH 134/143] ARM: dts: msm: Add support KERA + RCM + ORNE Add support for RCM KERA device with Orne. Change-Id: I1b1878fee4d5f662dc011fe76bdba3f6950d42f7 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 3 ++- kera-audio-rcm-orne.dts | 17 +++++++++++++++++ kera-audio-rcm-orne.dtsi | 13 +++++++++++++ 3 files changed, 32 insertions(+), 1 deletion(-) create mode 100644 kera-audio-rcm-orne.dts create mode 100644 kera-audio-rcm-orne.dtsi diff --git a/Kbuild b/Kbuild index 063f5400..2995f6c5 100644 --- a/Kbuild +++ b/Kbuild @@ -53,7 +53,8 @@ dtbo-y += kera-audio.dtbo \ kera-audio-mtp.dtbo \ kera-audio-mtp-qmp1000.dtbo \ kera-audio-qrd.dtbo \ - kera-audio-rcm.dtbo + kera-audio-rcm.dtbo \ + kera-audio-rcm-orne.dtbo endif diff --git a/kera-audio-rcm-orne.dts b/kera-audio-rcm-orne.dts new file mode 100644 index 00000000..5ea555a6 --- /dev/null +++ b/kera-audio-rcm-orne.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-rcm-orne.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kuna RCM+ORNE"; + compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap", + "qcom,rcm"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x10015 0>, <0x20015 0>, <0x30015 0>, <0x30015 1>, + <0x10015 1>, <0x20015 1>; +}; diff --git a/kera-audio-rcm-orne.dtsi b/kera-audio-rcm-orne.dtsi new file mode 100644 index 00000000..62b7ef32 --- /dev/null +++ b/kera-audio-rcm-orne.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-cdp.dtsi" + +&lpass_bt_swr { + status = "okay"; +}; From fd04642576fa4af94347ae019cdd5e5a0cf986b2 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 11 Feb 2025 13:15:19 +0530 Subject: [PATCH 135/143] ARM: dts: msm: Add record audio routes Add record in audio-routes for tuna7 where it is missing for record over AATC. With this can record using AATC. Change-Id: I9a76e16d5dc8168a11411ce715559350e6cc0c1f Signed-off-by: Ravulapati Vishnu Vardhan Rao (cherry picked from commit d2fe78d4a6d17852c12b56bf1cfeb5b82c10d69a) --- tuna7-audio-mtp.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index 90adbb5c..6def512f 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "tuna-audio-mtp.dtsi" @@ -91,6 +91,8 @@ "RX_TX DEC3_INP", "TX DEC3 MUX", "SpkrLeft IN", "WSA_SPK1 OUT", "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "WCD_TX_OUTPUT", "VA SWR_INPUT", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", From 942e166cdcf9f827036c087b89862e007fc89515 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 13 Mar 2025 11:10:10 +0530 Subject: [PATCH 136/143] ARM: dts: msm: remove lpass_bt_swr dev from ssr Remove lpass_bt_swr in ssr devs as bt_swr is disabled in Kera cdp variant. Change-Id: Idd149e79b09c1cd3db57100887c3e187bd8420c8 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-cdp.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi index ccd3b198..82a121a7 100644 --- a/kera-audio-cdp.dtsi +++ b/kera-audio-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "kera-audio-overlay.dtsi" @@ -129,6 +129,8 @@ asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", "wcd9378_codec", "wsa-codec1", "wsa-codec2"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; qcom,wsa-max-devs = <2>; qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; qcom,quat-mi2s-gpios = <&cdc_quat_mi2s_gpios>; From f9f100f5ca80cc66eeb41162164c1ce58b2e6d25 Mon Sep 17 00:00:00 2001 From: Prasad Kumpatla Date: Tue, 11 Mar 2025 21:48:20 +0530 Subject: [PATCH 137/143] ARM: dts: qcom: add wcd usbss node on cdp to support HSJ Add wcd usbss node for CDP to detect mic from wcd usbss driver. Change-Id: Ic7fbab156a2dda2185a80c96d6589764ca66b57d Signed-off-by: Prasad Kumpatla --- sun-audio-cdp.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index e76cd14a..27aaea4c 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -135,4 +135,5 @@ qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; qcom,usbss-hsj-connect-enabled; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; + wcd939x-i2c-handle = <&wcd_usbss>; }; From 06436f8a3b1d50003e44182f21d4289f9561ee2b Mon Sep 17 00:00:00 2001 From: MingShu Pang Date: Tue, 18 Mar 2025 10:38:23 +0800 Subject: [PATCH 138/143] =?UTF-8?q?ARM:=20dts:=20msm:=20add=20wcn-bt-ext?= =?UTF-8?q?=20for=20enabling=20second=20bt=20backend=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only add wcn-bt-ext for enabling second bt backend for needed dtsi file. Change-Id: I42ca1840019a9db7d02ac39092f15dd438ea334f Signed-off-by: MingShu Pang --- sun-audio-cdp-nfc.dtsi | 6 +++++- sun-audio-cdp.dtsi | 1 + sun-audio-hamilton-cdp.dtsi | 6 +++++- sun-audio-hamilton-mtp-3.5mm.dtsi | 3 ++- sun-audio-hamilton-mtp.dtsi | 3 ++- sun-audio-hamilton-qmp-mtp.dtsi | 3 ++- sun-audio-hdk.dtsi | 3 ++- sun-audio-mtp.dtsi | 3 ++- sun-audio-overlay.dtsi | 3 +-- sun-audio-qrd-sku2.dtsi | 3 ++- sun-audio-qrd.dtsi | 3 ++- sun-audio-rumi.dtsi | 5 +++-- 12 files changed, 29 insertions(+), 13 deletions(-) diff --git a/sun-audio-cdp-nfc.dtsi b/sun-audio-cdp-nfc.dtsi index 943b3c1c..d7eb7d03 100644 --- a/sun-audio-cdp-nfc.dtsi +++ b/sun-audio-cdp-nfc.dtsi @@ -1,6 +1,10 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-cdp.dtsi" + +&sun_snd { + qcom,wcn-bt-ext = <0>; +}; diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index 27aaea4c..b4c80d7b 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -136,4 +136,5 @@ qcom,usbss-hsj-connect-enabled; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; wcd939x-i2c-handle = <&wcd_usbss>; + qcom,wcn-bt-ext = <1>; }; diff --git a/sun-audio-hamilton-cdp.dtsi b/sun-audio-hamilton-cdp.dtsi index f903de43..71818ecc 100644 --- a/sun-audio-hamilton-cdp.dtsi +++ b/sun-audio-hamilton-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /*This is CDP with Hamilton wlan*/ @@ -8,3 +8,7 @@ &lpass_bt_swr { status = "disabled"; }; + +&sun_snd { + qcom,wcn-bt-ext = <0>; +}; diff --git a/sun-audio-hamilton-mtp-3.5mm.dtsi b/sun-audio-hamilton-mtp-3.5mm.dtsi index d1b51c57..12838993 100644 --- a/sun-audio-hamilton-mtp-3.5mm.dtsi +++ b/sun-audio-hamilton-mtp-3.5mm.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -13,4 +13,5 @@ qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; + qcom,wcn-bt-ext = <0>; }; diff --git a/sun-audio-hamilton-mtp.dtsi b/sun-audio-hamilton-mtp.dtsi index 0137bc09..9ce78ef4 100644 --- a/sun-audio-hamilton-mtp.dtsi +++ b/sun-audio-hamilton-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-mtp.dtsi" @@ -13,5 +13,6 @@ qcom,model = "sun-mtp-wsa883x-snd-card"; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; + qcom,wcn-bt-ext = <0>; }; diff --git a/sun-audio-hamilton-qmp-mtp.dtsi b/sun-audio-hamilton-qmp-mtp.dtsi index d5f99035..773363b8 100644 --- a/sun-audio-hamilton-qmp-mtp.dtsi +++ b/sun-audio-hamilton-qmp-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-mtp-qmp.dtsi" @@ -13,5 +13,6 @@ qcom,model = "sun-mtp-wsa883x_qmp-snd-card"; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; + qcom,wcn-bt-ext = <0>; }; diff --git a/sun-audio-hdk.dtsi b/sun-audio-hdk.dtsi index 0a46c1af..9a695347 100644 --- a/sun-audio-hdk.dtsi +++ b/sun-audio-hdk.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-qrd.dtsi" @@ -11,4 +11,5 @@ qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; + qcom,wcn-bt-ext = <0>; }; diff --git a/sun-audio-mtp.dtsi b/sun-audio-mtp.dtsi index 82af8e21..d49adc3d 100644 --- a/sun-audio-mtp.dtsi +++ b/sun-audio-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -91,6 +91,7 @@ qcom,msm-mbhc-usbc-audio-supported = <1>; qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; + qcom,wcn-bt-ext = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; }; diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index e6ba7752..5d1759a9 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -439,7 +439,6 @@ qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,wcn-bt = <1>; - qcom,wcn-bt-ext = <1>; qcom,ext-disp-audio-rx = <1>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; diff --git a/sun-audio-qrd-sku2.dtsi b/sun-audio-qrd-sku2.dtsi index 46093e90..c464c5ba 100644 --- a/sun-audio-qrd-sku2.dtsi +++ b/sun-audio-qrd-sku2.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-qrd.dtsi" @@ -14,4 +14,5 @@ &sun_snd { qcom,model = "sun-qrd-sku2-snd-card"; + qcom,wcn-bt-ext = <1>; }; diff --git a/sun-audio-qrd.dtsi b/sun-audio-qrd.dtsi index 40fce6ca..d0fcfabd 100644 --- a/sun-audio-qrd.dtsi +++ b/sun-audio-qrd.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -104,6 +104,7 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; + qcom,wcn-bt-ext = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; }; diff --git a/sun-audio-rumi.dtsi b/sun-audio-rumi.dtsi index 474cd810..95f02530 100644 --- a/sun-audio-rumi.dtsi +++ b/sun-audio-rumi.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -14,4 +14,5 @@ compatible = "qcom,sun-asoc-snd-stub"; asoc-codec = <&stub_codec>; asoc-codec-names = "msm-stub-codec.1"; - }; + qcom,wcn-bt-ext = <1>; +}; From 0256b7783c704b280e04218e82c7243b275ec8be Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 25 Feb 2025 19:02:39 +0530 Subject: [PATCH 139/143] ARM: dts: msm: update clk div factor entry for TX and VA macros Update clk div factor entries for TX and VA macros to reflect proper HW configuration. Change-Id: Iecc4f684aaf90dc671ed850c0c159e0b7eeaa42c Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-overlay.dtsi | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 66bcccf9..2ae45331 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -32,7 +32,19 @@ reg = <0x7660000 0x0>; clock-names = "lpass_audio_hw_vote"; clocks = <&lpass_audio_hw_vote 0>; - qcom,va-dmic-sample-rate = <600000>; + /* + * Clk divding factors for each DMIC pair. + * Valid entries for each DMIC pair: + * 2, 3, 4, 6, 8, 16 + * + * These factors are translated to corresponding config values + * for the following registers, + * -- LPASS_VA_TOP_CSR_DMIC0_CTL, + * -- LPASS_VA_TOP_CSR_DMIC1_CTL, + * -- LPASS_VA_TOP_CSR_DMIC2_CTL, + * -- LPASS_VA_TOP_CSR_DMIC3_CTL, + */ + qcom,va-dmic-clk-div-factor = <16 16 16 16>; qcom,va-clk-mux-select = <1>; qcom,default-clk-id = ; qcom,use-clk-id = ; @@ -84,7 +96,19 @@ compatible = "qcom,lpass-cdc-tx-macro"; reg = <0x6AE0000 0x0>; qcom,default-clk-id = ; - qcom,tx-dmic-sample-rate = <2400000>; + /* + * Clk divding factors for each DMIC pair. + * Valid entries for each DMIC pair: + * 2, 3, 4, 6, 8, 16 + * + * These factors are translated to corresponding config values + * for the following registers, + * -- LPASS_VA_TOP_CSR_DMIC0_CTL, + * -- LPASS_VA_TOP_CSR_DMIC1_CTL, + * -- LPASS_VA_TOP_CSR_DMIC2_CTL, + * -- LPASS_VA_TOP_CSR_DMIC3_CTL, + */ + qcom,tx-dmic-clk-div-factor = <4 4 4 4>; qcom,is-used-swr-gpio = <0>; }; From d0959f6ebee7caa9f1070643d21cbf2c10e0045f Mon Sep 17 00:00:00 2001 From: Prasad Kumpatla Date: Tue, 11 Mar 2025 21:48:20 +0530 Subject: [PATCH 140/143] ARM: dts: qcom: add wcd usbss node on cdp to support HSJ Add wcd usbss node for CDP to detect mic from wcd usbss driver. Change-Id: Ic7fbab156a2dda2185a80c96d6589764ca66b57d Signed-off-by: Prasad Kumpatla --- sun-audio-cdp.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index e76cd14a..27aaea4c 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -135,4 +135,5 @@ qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; qcom,usbss-hsj-connect-enabled; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; + wcd939x-i2c-handle = <&wcd_usbss>; }; From 7a27d0e25ae05f3291cbde372708531a0b20f55f Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 13 Mar 2025 11:10:10 +0530 Subject: [PATCH 141/143] ARM: dts: msm: remove lpass_bt_swr dev from ssr Remove lpass_bt_swr in ssr devs as bt_swr is disabled in Kera cdp variant. Change-Id: Idd149e79b09c1cd3db57100887c3e187bd8420c8 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-cdp.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi index ccd3b198..82a121a7 100644 --- a/kera-audio-cdp.dtsi +++ b/kera-audio-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "kera-audio-overlay.dtsi" @@ -129,6 +129,8 @@ asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", "wcd9378_codec", "wsa-codec1", "wsa-codec2"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; qcom,wsa-max-devs = <2>; qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; qcom,quat-mi2s-gpios = <&cdc_quat_mi2s_gpios>; From 90a5df6e94ab929d6ef3d18b03fc44d256308b1a Mon Sep 17 00:00:00 2001 From: MingShu Pang Date: Tue, 18 Mar 2025 10:38:23 +0800 Subject: [PATCH 142/143] =?UTF-8?q?ARM:=20dts:=20msm:=20add=20wcn-bt-ext?= =?UTF-8?q?=20for=20enabling=20second=20bt=20backend=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only add wcn-bt-ext for enabling second bt backend for needed dtsi file. Change-Id: I42ca1840019a9db7d02ac39092f15dd438ea334f Signed-off-by: MingShu Pang --- sun-audio-cdp-nfc.dtsi | 6 +++++- sun-audio-cdp.dtsi | 1 + sun-audio-hamilton-cdp.dtsi | 6 +++++- sun-audio-hamilton-mtp-3.5mm.dtsi | 3 ++- sun-audio-hamilton-mtp.dtsi | 3 ++- sun-audio-hamilton-qmp-mtp.dtsi | 3 ++- sun-audio-hdk.dtsi | 3 ++- sun-audio-mtp.dtsi | 3 ++- sun-audio-overlay.dtsi | 3 +-- sun-audio-qrd-sku2.dtsi | 3 ++- sun-audio-qrd.dtsi | 3 ++- sun-audio-rumi.dtsi | 5 +++-- 12 files changed, 29 insertions(+), 13 deletions(-) diff --git a/sun-audio-cdp-nfc.dtsi b/sun-audio-cdp-nfc.dtsi index 943b3c1c..d7eb7d03 100644 --- a/sun-audio-cdp-nfc.dtsi +++ b/sun-audio-cdp-nfc.dtsi @@ -1,6 +1,10 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-cdp.dtsi" + +&sun_snd { + qcom,wcn-bt-ext = <0>; +}; diff --git a/sun-audio-cdp.dtsi b/sun-audio-cdp.dtsi index 27aaea4c..b4c80d7b 100644 --- a/sun-audio-cdp.dtsi +++ b/sun-audio-cdp.dtsi @@ -136,4 +136,5 @@ qcom,usbss-hsj-connect-enabled; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; wcd939x-i2c-handle = <&wcd_usbss>; + qcom,wcn-bt-ext = <1>; }; diff --git a/sun-audio-hamilton-cdp.dtsi b/sun-audio-hamilton-cdp.dtsi index f903de43..71818ecc 100644 --- a/sun-audio-hamilton-cdp.dtsi +++ b/sun-audio-hamilton-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /*This is CDP with Hamilton wlan*/ @@ -8,3 +8,7 @@ &lpass_bt_swr { status = "disabled"; }; + +&sun_snd { + qcom,wcn-bt-ext = <0>; +}; diff --git a/sun-audio-hamilton-mtp-3.5mm.dtsi b/sun-audio-hamilton-mtp-3.5mm.dtsi index d1b51c57..12838993 100644 --- a/sun-audio-hamilton-mtp-3.5mm.dtsi +++ b/sun-audio-hamilton-mtp-3.5mm.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -13,4 +13,5 @@ qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; + qcom,wcn-bt-ext = <0>; }; diff --git a/sun-audio-hamilton-mtp.dtsi b/sun-audio-hamilton-mtp.dtsi index 0137bc09..9ce78ef4 100644 --- a/sun-audio-hamilton-mtp.dtsi +++ b/sun-audio-hamilton-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-mtp.dtsi" @@ -13,5 +13,6 @@ qcom,model = "sun-mtp-wsa883x-snd-card"; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; + qcom,wcn-bt-ext = <0>; }; diff --git a/sun-audio-hamilton-qmp-mtp.dtsi b/sun-audio-hamilton-qmp-mtp.dtsi index d5f99035..773363b8 100644 --- a/sun-audio-hamilton-qmp-mtp.dtsi +++ b/sun-audio-hamilton-qmp-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-mtp-qmp.dtsi" @@ -13,5 +13,6 @@ qcom,model = "sun-mtp-wsa883x_qmp-snd-card"; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; + qcom,wcn-bt-ext = <0>; }; diff --git a/sun-audio-hdk.dtsi b/sun-audio-hdk.dtsi index 0a46c1af..9a695347 100644 --- a/sun-audio-hdk.dtsi +++ b/sun-audio-hdk.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-qrd.dtsi" @@ -11,4 +11,5 @@ qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; + qcom,wcn-bt-ext = <0>; }; diff --git a/sun-audio-mtp.dtsi b/sun-audio-mtp.dtsi index 82af8e21..d49adc3d 100644 --- a/sun-audio-mtp.dtsi +++ b/sun-audio-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -91,6 +91,7 @@ qcom,msm-mbhc-usbc-audio-supported = <1>; qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; + qcom,wcn-bt-ext = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; }; diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi index e6ba7752..5d1759a9 100644 --- a/sun-audio-overlay.dtsi +++ b/sun-audio-overlay.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -439,7 +439,6 @@ qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,wcn-bt = <1>; - qcom,wcn-bt-ext = <1>; qcom,ext-disp-audio-rx = <1>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; diff --git a/sun-audio-qrd-sku2.dtsi b/sun-audio-qrd-sku2.dtsi index 46093e90..c464c5ba 100644 --- a/sun-audio-qrd-sku2.dtsi +++ b/sun-audio-qrd-sku2.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-qrd.dtsi" @@ -14,4 +14,5 @@ &sun_snd { qcom,model = "sun-qrd-sku2-snd-card"; + qcom,wcn-bt-ext = <1>; }; diff --git a/sun-audio-qrd.dtsi b/sun-audio-qrd.dtsi index 40fce6ca..d0fcfabd 100644 --- a/sun-audio-qrd.dtsi +++ b/sun-audio-qrd.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -104,6 +104,7 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; + qcom,wcn-bt-ext = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; }; diff --git a/sun-audio-rumi.dtsi b/sun-audio-rumi.dtsi index 474cd810..95f02530 100644 --- a/sun-audio-rumi.dtsi +++ b/sun-audio-rumi.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "sun-audio-overlay.dtsi" @@ -14,4 +14,5 @@ compatible = "qcom,sun-asoc-snd-stub"; asoc-codec = <&stub_codec>; asoc-codec-names = "msm-stub-codec.1"; - }; + qcom,wcn-bt-ext = <1>; +}; From 8ab4f13077481aaf8c984eeafcf1a8d235005fcc Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Fri, 7 Mar 2025 15:38:21 +0800 Subject: [PATCH 143/143] ARM: dts: msm: correct the port mask of mbhc port Correct the port mask of mbhc port. Since the WCD_SWR_TX DATA0 voltage was incorrect with default setting, but was correct when the ADC_LP was running in the swrm bus 9.6mhz, So copy the SWR_UC0(9.6mhz) to SWR_UC1(4.8mhz). Change-Id: I3638349a6ebec06b8f4a828498e1285579361e45 Signed-off-by: Yuhui Zhao --- kera-audio-overlay.dtsi | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index a3f4786c..8f5aa374 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -362,20 +362,16 @@ <2 ADC3 0x1 0 SWRM_TX1_CH3>, <3 DMIC0 0x4 0 SWRM_TX2_CH1>, <3 DMIC1 0x8 0 SWRM_TX2_CH2>, - <3 MBHC 0x1 0 SWRM_TX2_CH3>, + <3 MBHC 0x4 0 SWRM_TX2_CH3>, <4 DMIC2 0x1 0 SWRM_TX2_CH3>, <4 DMIC3 0x2 0 SWRM_TX2_CH4>, <4 DMIC4 0x3 0 SWRM_TX3_CH1>, <4 DMIC5 0x4 0 SWRM_TX3_CH2>; qcom,swr-tx-port-params = - , , - , , - , , - , , - , , - , , - , , - , ; + , , , , + , , , , + , , , , + , , , ; qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; qcom,rx-slave = <&wcd9378_rx_slave>; qcom,tx-slave = <&wcd9378_tx_slave>;