Merge "dt-bindings: soc: qcom: Add documentation for ufs-phy-qmp-v4-niobe"

bindings/ufs/qcom,ufs.yaml

@@ -37,6 +37,7 @@ properties:
           - qcom,ufs-phy-qmp-v4-pineapple
           - qcom,ufs-phy-qmp-v4-waipio
           - qcom,ufs-phy-qmp-v4-sun
+          - qcom,ufs-phy-qmp-v4-niobe
       - const: qcom,ufshc
       - const: jedec,ufs-2.0
 

qcom/kera-cdp-qca6750-ufs2.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs2.dtsi"

qcom/kera-cdp-qca6750-ufs3.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs3.dtsi"

qcom/kera-cdp-qca6750-ufs4.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs4.dtsi"

qcom/kera-mtp-wcn7750-ufs3.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs3.dtsi"

qcom/kera-mtp-wcn7750-ufs4.dtsi

@@ -2,3 +2,6 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs4.dtsi"
+

qcom/kera-qrd-wcn7750-ufs2.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs2.dtsi"

qcom/kera-qrd-wcn7750-ufs3.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs3.dtsi"

qcom/kera-rcm-qca6750-ufs2.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs2.dtsi"

qcom/kera-rcm-qca6750-ufs3.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs3.dtsi"

qcom/kera-rcm-wcn7750-ufs2.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs2.dtsi"

qcom/kera-rcm-wcn7750-ufs3.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs3.dtsi"

qcom/kera-rcm-wcn7750-ufs4.dtsi

@@ -2,3 +2,5 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
+
+#include "kera_ufs4.dtsi"

qcom/kera.dtsi

@@ -2293,7 +2293,7 @@
 		qcom,bypass-pbl-rst-wa;
 		qcom,max-cpus = <8>;
 
-		reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&tlmm 185 GPIO_ACTIVE_LOW>;
 		resets = <&gcc GCC_UFS_PHY_BCR>;
 		reset-names = "rst";
 

qcom/kera_ufs2.dtsi

@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&ufsphy_mem {
+	compatible = "qcom,ufs-phy-qmp-v4-pineapple";
+
+	/* VDDA_UFS_CORE */
+	vdda-phy-supply = <&L6B>;
+	vdda-phy-max-microamp = <211860>;
+
+	/* VDDA_UFS_0_1P2 */
+	vdda-pll-supply = <&L4B>;
+	vdda-pll-max-microamp = <18330>;
+
+	/* Phy GDSC for VDD_MX, always on */
+	vdd-phy-gdsc-supply = <&gcc_ufs_mem_phy_gdsc>;
+
+	/* Qref power supply, Refer Qref diagram */
+	vdda-qref-supply = <&L2B>;
+	vdda-qref-max-microamp = <1890>;
+
+	status = "ok";
+};
+
+&ufshc_mem {
+	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
+
+	vcc-supply = <&L12B>;
+	vcc-max-microamp = <800000>;
+
+	vccq2-supply = <&L1D>;
+	vccq2-max-microamp = <750000>;
+
+	/* VDD_PX10 is voted for the ufs_reset_n */
+	qcom,vddp-ref-clk-supply = <&L3G>;
+	qcom,vddp-ref-clk-max-microamp = <100>;
+
+	qcom,vccq2-parent-supply = <&S1B>;
+	qcom,vccq2-parent-max-microamp = <210000>;
+
+	status = "ok";
+};

qcom/kera_ufs3.dtsi

@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&ufsphy_mem {
+	compatible = "qcom,ufs-phy-qmp-v4-pineapple";
+
+	/* VDDA_UFS_CORE */
+	vdda-phy-supply = <&L6B>;
+	vdda-phy-max-microamp = <211860>;
+
+	/* VDDA_UFS_0_1P2 */
+	vdda-pll-supply = <&L4B>;
+	vdda-pll-max-microamp = <18330>;
+
+	/* Phy GDSC for VDD_MX, always on */
+	vdd-phy-gdsc-supply = <&gcc_ufs_mem_phy_gdsc>;
+
+	/* Qref power supply, Refer Qref diagram */
+	vdda-qref-supply = <&L2B>;
+	vdda-qref-max-microamp = <1890>;
+
+	status = "ok";
+};
+
+&ufshc_mem {
+	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
+
+	vcc-supply = <&L12B>;
+	vcc-max-microamp = <800000>;
+
+	vccq-supply = <&L1D>;
+	vccq-max-microamp = <750000>;
+
+	/* VDD_PX10 is voted for the ufs_reset_n */
+	qcom,vddp-ref-clk-supply = <&L3G>;
+	qcom,vddp-ref-clk-max-microamp = <100>;
+
+	qcom,vccq-parent-supply = <&S2B>;
+	qcom,vccq-parent-max-microamp = <210000>;
+
+	status = "ok";
+};

qcom/kera_ufs4.dtsi

@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&ufsphy_mem {
+	compatible = "qcom,ufs-phy-qmp-v4-pineapple";
+
+	/* VDDA_UFS_CORE */
+	vdda-phy-supply = <&L6B>;
+	vdda-phy-max-microamp = <211860>;
+	/*
+	 * Platforms supporting Gear 5 && Rate B require a different
+	 * voltage supply. Check the Power Grid document.
+	 */
+	vdda-phy-min-microvolt = <912000>;
+
+	/* VDDA_UFS_0_1P2 */
+	vdda-pll-supply = <&L4B>;
+	vdda-pll-max-microamp = <18330>;
+
+	/* Phy GDSC for VDD_MX, always on */
+	vdd-phy-gdsc-supply = <&gcc_ufs_mem_phy_gdsc>;
+
+	/* Qref power supply, Refer Qref diagram */
+	vdda-qref-supply = <&L2B>;
+	vdda-qref-max-microamp = <1890>;
+
+	status = "ok";
+};
+
+&ufshc_mem {
+	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
+
+	vcc-supply = <&L12B>;
+	vcc-max-microamp = <1200000>;
+
+	vccq-supply = <&L1D>;
+	vccq-max-microamp = <1200000>;
+
+	/* VDD_PX10 is voted for the ufs_reset_n */
+	qcom,vddp-ref-clk-supply = <&L3G>;
+	qcom,vddp-ref-clk-max-microamp = <100>;
+
+	qcom,vccq-parent-supply = <&S2B>;
+	qcom,vccq-parent-max-microamp = <210000>;
+
+	status = "ok";
+};