ARM: dts: msm: add pmic-glink-debug PMIC subdevices for Sun boards
Add SMB and IDT charger PMIC devices inside of the pmic-glink-debug device. These are interfaced over I2C and an SPMI bridge bus. This ensures that software is able to access the registers of these PMICs. Change-Id: I7afc56cb78a353960cb7db98ce5d9b51a05db9fe Signed-off-by: David Collins <quic_collinsd@quicinc.com>
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@@ -62,6 +62,33 @@
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};
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};
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&pmic_glink_debug {
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i2c@106 {
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reg = <0x106>; /* I2C instance 6 in ADSP for SE5 */
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,bus-type = "i2c";
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qcom,smb1501@68 {
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compatible = "qcom,i2c-pmic";
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reg = <0x68>;
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qcom,can-sleep;
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};
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qcom,smb1501@69 {
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compatible = "qcom,i2c-pmic";
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reg = <0x69>;
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qcom,can-sleep;
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};
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qcom,idt9418@3b {
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compatible = "qcom,i2c-pmic";
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reg = <0x3b>;
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qcom,can-sleep;
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};
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};
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};
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®ulator_ocp_notifier {
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periph-1c1-supply = <&L1B>;
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periph-1c2-supply = <&L2B>;
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@@ -3,6 +3,8 @@
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/spmi/spmi.h>
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#include "sun-qrd.dtsi"
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&pmic_glink_adc {
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@@ -38,3 +40,44 @@
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label = "smb1396_2_die_temp";
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};
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};
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&pmic_glink_debug {
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i2c@106 {
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reg = <0x106>; /* I2C instance 6 in ADSP for SE5 */
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,bus-type = "i2c";
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qcom,smb1396@34 {
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compatible = "qcom,i2c-pmic";
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reg = <0x34>;
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qcom,can-sleep;
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};
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qcom,smb1396@35 {
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compatible = "qcom,i2c-pmic";
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reg = <0x35>;
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qcom,can-sleep;
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};
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qcom,idt9418@3b {
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compatible = "qcom,i2c-pmic";
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reg = <0x3b>;
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qcom,can-sleep;
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};
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};
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/* SPMI bridge bus 0 with SMB1510 device */
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spmi@200 {
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reg = <0x200>;
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#address-cells = <2>;
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#size-cells = <0>;
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qcom,bus-type = "spmi";
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qcom,smb1510@d {
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compatible = "qcom,spmi-pmic";
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reg = <0xd SPMI_USID>;
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qcom,can-sleep;
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};
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};
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};
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@@ -38,3 +38,30 @@
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label = "smb1501_2_die_temp";
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};
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};
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&pmic_glink_debug {
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i2c@106 {
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reg = <0x106>; /* I2C instance 6 in ADSP for SE5 */
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,bus-type = "i2c";
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qcom,smb1501@68 {
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compatible = "qcom,i2c-pmic";
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reg = <0x68>;
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qcom,can-sleep;
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};
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qcom,smb1501@69 {
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compatible = "qcom,i2c-pmic";
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reg = <0x69>;
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qcom,can-sleep;
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};
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qcom,idt9418@3b {
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compatible = "qcom,i2c-pmic";
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reg = <0x3b>;
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qcom,can-sleep;
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};
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};
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};
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