From 833aabb4db040bd50138d676db5789a66360b2ff Mon Sep 17 00:00:00 2001
From: Ayushi Makhija <quic_amakhija@quicinc.com>
Date: Fri, 31 Jan 2025 18:28:30 +0530
Subject: [PATCH] ARM: dts: msm: remove hard coded panel clk rate for kera RCM

Remove hard coded panel clk rate Kera RCM platform.

Change-Id: I1c3c77eed76665e87e9ec0ed0dfc2ba80e97e08e
Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
---
 display/kera-sde-display-cdp.dtsi           | 42 +++++++++++++++++++++
 display/trustedvm-kera-sde-display-cdp.dtsi | 42 +++++++++++++++++++++
 2 files changed, 84 insertions(+)

diff --git a/display/kera-sde-display-cdp.dtsi b/display/kera-sde-display-cdp.dtsi
index 48dcca62..5c971225 100644
--- a/display/kera-sde-display-cdp.dtsi
+++ b/display/kera-sde-display-cdp.dtsi
@@ -16,6 +16,24 @@
 	qcom,mdss-dsi-bl-inverted-dbv;
 	qcom,platform-reset-gpio = <&tlmm 12 0>;
 	qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@1 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@2 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@3 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+	};
 };
 
 &dsi_vtdr6130_amoled_video {
@@ -42,6 +60,20 @@
 	qcom,mdss-dsi-bl-inverted-dbv;
 	qcom,platform-reset-gpio = <&tlmm 12 0>;
 	qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@1 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@2 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+	};
 };
 
 &dsi_vtdr6130_amoled_120hz_video {
@@ -68,6 +100,16 @@
 	qcom,mdss-dsi-bl-inverted-dbv;
 	qcom,platform-reset-gpio = <&tlmm 12 0>;
 	qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@1 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+	};
 };
 
 &dsi_vtdr6130_amoled_90hz_video {
diff --git a/display/trustedvm-kera-sde-display-cdp.dtsi b/display/trustedvm-kera-sde-display-cdp.dtsi
index 77b43890..4b000697 100644
--- a/display/trustedvm-kera-sde-display-cdp.dtsi
+++ b/display/trustedvm-kera-sde-display-cdp.dtsi
@@ -14,6 +14,24 @@
 	qcom,mdss-dsi-bl-inverted-dbv;
 	qcom,platform-reset-gpio = <&tlmm 12 0>;
 	qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@1 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@2 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@3 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+	};
 };
 
 &dsi_vtdr6130_amoled_video {
@@ -36,6 +54,20 @@
 	qcom,mdss-dsi-bl-inverted-dbv;
 	qcom,platform-reset-gpio = <&tlmm 12 0>;
 	qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@1 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@2 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+	};
 };
 
 &dsi_vtdr6130_amoled_120hz_video {
@@ -58,6 +90,16 @@
 	qcom,mdss-dsi-bl-inverted-dbv;
 	qcom,platform-reset-gpio = <&tlmm 12 0>;
 	qcom,platform-sec-reset-gpio = <&tlmm 127 0>;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+
+		timing@1 {
+			/delete-property/ qcom,mdss-dsi-panel-clockrate;
+		};
+	};
 };
 
 &dsi_vtdr6130_amoled_90hz_video {