Merge "ARM: dts: msm: Unstub and enable interconnect driver for Sun"
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81c770167c
@@ -15,6 +15,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interconnect/qcom,sun.h>
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#include <dt-bindings/interconnect/qcom,sun.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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#include <dt-bindings/interconnect/qcom,icc.h>
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/ {
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/ {
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model = "Qualcomm Technologies, Inc. Sun";
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model = "Qualcomm Technologies, Inc. Sun";
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@@ -315,86 +316,137 @@
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clk_virt: interconnect@0 {
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clk_virt: interconnect@0 {
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compatible = "qcom,sun-clk_virt";
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compatible = "qcom,sun-clk_virt";
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qcom,stub;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,disabled-voters = "pcie_crm_hw_0", "pcie_crm_hw_1";
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};
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};
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mc_virt: interconnect@1 {
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mc_virt: interconnect@1 {
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compatible = "qcom,sun-mc_virt";
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compatible = "qcom,sun-mc_virt";
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qcom,stub;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,disabled-voters = "disp",
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"cam_ife_0",
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"cam_ife_1",
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"cam_ife_2",
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"pcie_crm_hw_0",
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"pcie_crm_hw_1";
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};
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};
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config_noc: interconnect@1600000 {
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config_noc: interconnect@1600000 {
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compatible = "qcom,sun-cnoc_cfg";
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compatible = "qcom,sun-cnoc_cfg";
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qcom,stub;
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reg = <0x1600000 0x6200>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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};
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cnoc_main: interconnect@1500000 {
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cnoc_main: interconnect@1500000 {
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compatible = "qcom,sun-cnoc_main";
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compatible = "qcom,sun-cnoc_main";
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qcom,stub;
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reg = <0x1500000 0x16080>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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};
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system_noc: interconnect@1680000 {
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system_noc: interconnect@1680000 {
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compatible = "qcom,sun-system_noc";
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compatible = "qcom,sun-system_noc";
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qcom,stub;
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reg = <0x1680000 0x1d080>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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};
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pcie_noc: interconnect@16c0000 {
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pcie_noc: interconnect@16c0000 {
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compatible = "qcom,sun-pcie_anoc";
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compatible = "qcom,sun-pcie_anoc";
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qcom,stub;
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reg = <0x16c0000 0x11400>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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clocks = <&gcc GCC_AGGRE_NOC_PCIE_AXI_CLK>,
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<&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,disabled-voters = "pcie_crm_hw_0", "pcie_crm_hw_1";
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qcom,skip-qos;
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};
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};
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aggre1_noc: interconnect@16e0000 {
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aggre1_noc: interconnect@16e0000 {
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compatible = "qcom,sun-aggre1_noc";
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compatible = "qcom,sun-aggre1_noc";
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qcom,stub;
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reg = <0x16e0000 0x16400>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
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<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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aggre2_noc: interconnect@1700000 {
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aggre2_noc: interconnect@1700000 {
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compatible = "qcom,sun-aggre2_noc";
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compatible = "qcom,sun-aggre2_noc";
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qcom,stub;
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reg = <0x1700000 0x1f400>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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clocks = <&rpmhcc RPMH_IPA_CLK>;
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qcom,skip-qos;
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};
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};
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mmss_noc: interconnect@1780000 {
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mmss_noc: interconnect@1780000 {
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compatible = "qcom,sun-mmss_noc";
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compatible = "qcom,sun-mmss_noc";
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qcom,stub;
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reg = <0x1780000 0x5b800>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,disabled-voters = "disp", "cam_ife_0", "cam_ife_1", "cam_ife_2";
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qcom,skip-qos;
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};
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};
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gem_noc: interconnect@24100000 {
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gem_noc: interconnect@24100000 {
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compatible = "qcom,sun-gem_noc";
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compatible = "qcom,sun-gem_noc";
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qcom,stub;
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reg = <0x24100000 0x14b080>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,disabled-voters = "disp",
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"cam_ife_0",
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"cam_ife_1",
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"cam_ife_2",
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"pcie_crm_hw_0",
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"pcie_crm_hw_1";
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qcom,skip-qos;
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};
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};
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nsp_noc: interconnect@320c0000 {
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nsp_noc: interconnect@320c0000 {
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compatible = "qcom,sun-nsp_noc";
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compatible = "qcom,sun-nsp_noc";
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qcom,stub;
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reg = <0x320c0000 0x13080>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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};
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lpass_ag_noc: interconnect@7e40000 {
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lpass_ag_noc: interconnect@7e40000 {
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compatible = "qcom,sun-lpass_ag_noc";
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compatible = "qcom,sun-lpass_ag_noc";
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qcom,stub;
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reg = <0x7e40000 0xe080>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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};
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lpass_lpiaon_noc: interconnect@7400000 {
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lpass_lpiaon_noc: interconnect@7400000 {
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compatible = "qcom,sun-lpass_lpiaon_noc";
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compatible = "qcom,sun-lpass_lpiaon_noc";
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qcom,stub;
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reg = <0x7400000 0x19080>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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};
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lpass_lpicx_noc: interconnect@7420000 {
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lpass_lpicx_noc: interconnect@7420000 {
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compatible = "qcom,sun-lpass_lpicx_noc";
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compatible = "qcom,sun-lpass_lpicx_noc";
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qcom,stub;
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reg = <0x7420000 0x44080>;
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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};
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apps_rsc: rsc@16500000 {
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apps_rsc: rsc@16500000 {
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@@ -419,6 +471,9 @@
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<CONTROL_TCS 0>,
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<CONTROL_TCS 0>,
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<FAST_PATH_TCS 1>;
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<FAST_PATH_TCS 1>;
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};
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};
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apps_bcm_voter: bcm_voter {
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compatible = "qcom,bcm-voter";
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};
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};
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};
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};
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};
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