Merge "dt-bindings: Added dt-binding for cpuss sleep stats"

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qctecmdr
2024-03-18 22:12:32 -07:00
committed by Gerrit - the friendly Code Review server

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/qcom/cpuss-sleep-stats.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm Technologies, Inc. cpuss sleep stats
maintainers:
- Maulik Shah <quic_mkshah@quicinc.com>
description:
The low power mode counts and residency in the low power mode is maintained in
the hardware. The cpu sleep stats allows to read this configuration and display
the same.
This driver creates debugfs entry for all enabled lpm and provide LPM count and
Residency.
properties:
compatible:
enum:
- qcom,cpuss-sleep-stats
reg:
maxItems: 10
description: cpuss sleep stats RAM base register region.
reg-names:
items:
- const: seq_lpm_cntr_cfg_cpu0
- const: seq_lpm_cntr_cfg_cpu1
- const: seq_lpm_cntr_cfg_cpu2
- const: seq_lpm_cntr_cfg_cpu3
- const: seq_lpm_cntr_cfg_cpu4
- const: seq_lpm_cntr_cfg_cpu5
- const: seq_lpm_cntr_cfg_cpu6
- const: seq_lpm_cntr_cfg_cpu7
- const: l3_seq_lpm_cntr_cfg
- const: apss_seq_mem_base
num-cpus:
const: 8
description: provides information about the number of CPUs in the system.
required:
- compatible
- reg
- reg-names
- num-cpus
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,cpuss-sleep-stats
then:
properties:
reg:
items:
- description: cpuss sleep stats RAM base register region.
reg-names:
items:
- description: names corresponding to each reg property value.
num-cpus:
items:
- description: provides information about the number of CPUs in the system.
additionalProperties: false
examples:
- |
cpuss-sleep-stats@18000054 {
compatible = "qcom,cpuss-sleep-stats";
reg = <0x18000054 0x4>, <0x18010054 0x4>, <0x18020054 0x4>,
<0x18030054 0x4>, <0x18040054 0x4>, <0x18050054 0x4>,
<0x18060054 0x4>, <0x18070054 0x4>, <0x18080098 0x4>,
<0x180C0000 0x10000>;
reg-names = "seq_lpm_cntr_cfg_cpu0", "seq_lpm_cntr_cfg_cpu1",
"seq_lpm_cntr_cfg_cpu2", "seq_lpm_cntr_cfg_cpu3",
"seq_lpm_cntr_cfg_cpu4", "seq_lpm_cntr_cfg_cpu5",
"seq_lpm_cntr_cfg_cpu6", "seq_lpm_cntr_cfg_cpu7",
"l3_seq_lpm_cntr_cfg", "apss_seq_mem_base";
num-cpus = <8>;
};