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ARM: dts: msm: Add LLCC node for Kera SoC

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Add LLCC node for Kera SoC.

Change-Id: Ib7cb07d1a36519dff7aa067da6fe54be2dafedfa
Signed-off-by: Naini Singh <quic_nainsing@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
This commit is contained in:
Naini Singh
2024-06-06 14:28:22 +05:30
committed by Mukesh Ojha
parent e66dd43421
commit 7fab9d6a3d
1 changed files with 10 additions and 0 deletions
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10
qcom/kera.dtsi
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@@ -379,6 +379,16 @@
#mbox-cells = <2>; #mbox-cells = <2>;
}; };
cache-controller@24800000 {
compatible = "qcom,kera-llcc";
reg = <0x24800000 0x200000>, <0x24C00000 0x200000>,
<0x26800000 0x200000>, <0x26C00000 0x200000>;
reg-names = "llcc0_base", "llcc2_base",
"llcc_broadcast_or_base", "llcc_broadcast_and_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
cap-based-alloc-and-pwr-collapse;
};
clocks { clocks {
xo_board: xo_board { xo_board: xo_board {
compatible = "fixed-clock"; compatible = "fixed-clock";