From adfa829366cc25f00f0cfb0aa5c5096ade712122 Mon Sep 17 00:00:00 2001 From: Vijayanand Jitta Date: Tue, 13 Aug 2024 10:50:47 +0530 Subject: [PATCH 1/2] ARM: dts: msm: Add interconnect properties for smmus for tuna Enable bus bandwidth voting by adding interconnect properties for kgsl and apps smmu on tuna. Change-Id: Iafb8c6975154048aff74b04fad75c9ce0f48aa3e Signed-off-by: Vijayanand Jitta --- qcom/msm-arm-smmu-tuna.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/qcom/msm-arm-smmu-tuna.dtsi b/qcom/msm-arm-smmu-tuna.dtsi index 9b3fd680..f91f7384 100644 --- a/qcom/msm-arm-smmu-tuna.dtsi +++ b/qcom/msm-arm-smmu-tuna.dtsi @@ -56,6 +56,7 @@ reg = <0x3de8000 0x1000>; qcom,stream-id-range = <0x0 0x400>; qcom,iova-width = <49>; + interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <2>; }; }; @@ -191,6 +192,7 @@ reg = <0x16f2000 0x1000>; qcom,stream-id-range = <0x0 0x400>; qcom,iova-width = <36>; + interconnects = <&system_noc MASTER_A1NOC_SNOC &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <1>; }; @@ -199,6 +201,7 @@ reg = <0x171b000 0x1000>; qcom,stream-id-range = <0x400 0x400>; qcom,iova-width = <36>; + interconnects = <&system_noc MASTER_A2NOC_SNOC &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <1>; }; @@ -207,6 +210,7 @@ reg = <0x17f7000 0x1000>; qcom,stream-id-range = <0x1c00 0x400>; qcom,iova-width = <32>; + interconnects = <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <2>; }; @@ -215,6 +219,7 @@ reg = <0x7d3000 0x1000>; qcom,stream-id-range = <0xc00 0x400>; qcom,iova-width = <32>; + interconnects = <&nsp_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <2>; }; @@ -223,6 +228,7 @@ reg = <0x7b3000 0x1000>; qcom,stream-id-range = <0x1000 0x400>; qcom,iova-width = <32>; + interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <1>; }; @@ -231,6 +237,7 @@ reg = <0x16cd000 0x1000>; qcom,stream-id-range = <0x1400 0x400>; qcom,iova-width = <32>; + interconnects = <&pcie_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <1>; qcom,opt-out-tbu-halting; }; @@ -240,6 +247,7 @@ reg = <0x17b7000 0x1000>; qcom,stream-id-range = <0x1800 0x400>; qcom,iova-width = <32>; + interconnects = <&mmss_noc MASTER_VIDEO_EVA &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <2>; }; @@ -248,6 +256,7 @@ reg = <0x17f6000 0x1000>; qcom,stream-id-range = <0x800 0x400>; qcom,iova-width = <36>; + interconnects = <&mmss_noc MASTER_MDP &mc_virt SLAVE_EBI1>; qcom,num-qtb-ports = <2>; }; }; From 2c5e849024e37c84adc537aa109c726a3542e9b4 Mon Sep 17 00:00:00 2001 From: Vijayanand Jitta Date: Tue, 13 Aug 2024 09:50:58 +0530 Subject: [PATCH 2/2] ARM: dts: msm: Add smmu ACLTR values for tuna Configure per-context bank pre-fetch settings using actlr for tuna. Change-Id: I9053c5ddac34a25d60fa7345f533678ff294d454 Signed-off-by: Vijayanand Jitta --- qcom/msm-arm-smmu-tuna.dtsi | 46 +++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/qcom/msm-arm-smmu-tuna.dtsi b/qcom/msm-arm-smmu-tuna.dtsi index f91f7384..8fcc06c3 100644 --- a/qcom/msm-arm-smmu-tuna.dtsi +++ b/qcom/msm-arm-smmu-tuna.dtsi @@ -51,6 +51,10 @@ , ; + qcom,actlr = + /* All CBs of GFX: +15 deep PF */ + <0x000 0x3ff 0x32B>; + gpu_qtb: gpu_qtb@3de8000 { compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500"; reg = <0x3de8000 0x1000>; @@ -187,6 +191,48 @@ , ; + qcom,actlr = + /* CAM_HF:Camera */ + <0x1c00 0x0000 0x00000001>, + + /* Mnoc_HF_23:Display */ + <0x0800 0x0002 0x00000001>, + <0x0801 0x0000 0x00000001>, + + /* NSP:Compute */ + <0x0c01 0x0040 0x00000303>, + <0x0c02 0x0020 0x00000303>, + <0x0c03 0x0040 0x00000303>, + <0x0c04 0x0040 0x00000303>, + <0x0c05 0x0040 0x00000303>, + <0x0c06 0x0020 0x00000303>, + <0x0c07 0x0040 0x00000303>, + <0x0c08 0x0020 0x00000303>, + <0x0c09 0x0040 0x00000303>, + <0x0c0c 0x0040 0x00000303>, + <0x0c0d 0x0020 0x00000303>, + <0x0c0e 0x0040 0x00000303>, + + /* SF:Camera */ + <0x1800 0x00c0 0x00000001>, + <0x1820 0x0000 0x00000001>, + <0x1860 0x0000 0x00000103>, + <0x18a0 0x0000 0x00000103>, + <0x18e0 0x0000 0x00000103>, + <0x1980 0x0000 0x00000001>, + + /* SF:EVA */ + <0x1900 0x0020 0x00000103>, + <0x1904 0x0020 0x00000103>, + <0x1923 0x0000 0x00000103>, + + /* SF:Video */ + <0x1940 0x0000 0x00000103>, + <0x1941 0x0004 0x00000103>, + <0x1943 0x0000 0x00000103>, + <0x1944 0x0000 0x00000103>, + <0x1947 0x0000 0x00000103>; + anoc_1_qtb: anoc_1_qtb@16f2000 { compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500"; reg = <0x16f2000 0x1000>;