ARM: dts: msm: Adding lowsvsd1 vote level to device tree
This change adds lowsvsd1 vote level along with corresponding rates to the device tree. CRs-Fixed: 3678245 Change-Id: I99bc0cc781edfe9b31aedc1970d0d1b5ccded7d7 Signed-off-by: Atiya Kailany <quic_akailany@quicinc.com>
This commit is contained in:
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Camera Software Integration
parent
001e79b9eb
commit
7e1660cc9b
@@ -897,8 +897,9 @@
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<&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
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<&camcc CAM_CC_CSI0PHYTIMER_CLK>;
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src-clock-name = "cphy_rx_clk_src";
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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clock-rates =
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<266666667 0 400000000 0>,
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<400000000 0 400000000 0>,
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<480000000 0 400000000 0>;
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status = "ok";
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@@ -930,8 +931,9 @@
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<&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
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<&camcc CAM_CC_CSI1PHYTIMER_CLK>;
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src-clock-name = "cphy_rx_clk_src";
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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clock-rates =
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<266666667 0 400000000 0>,
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<400000000 0 400000000 0>,
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<480000000 0 400000000 0>;
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status = "ok";
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@@ -963,8 +965,9 @@
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<&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
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<&camcc CAM_CC_CSI2PHYTIMER_CLK>;
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src-clock-name = "cphy_rx_clk_src";
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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clock-rates =
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<266666667 0 400000000 0>,
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<400000000 0 400000000 0>,
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<480000000 0 400000000 0>;
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status = "ok";
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@@ -996,8 +999,9 @@
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<&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
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<&camcc CAM_CC_CSI3PHYTIMER_CLK>;
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src-clock-name = "cphy_rx_clk_src";
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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clock-rates =
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<266666667 0 400000000 0>,
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<400000000 0 400000000 0>,
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<480000000 0 400000000 0>;
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status = "ok";
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@@ -1029,8 +1033,9 @@
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<&camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>,
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<&camcc CAM_CC_CSI4PHYTIMER_CLK>;
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src-clock-name = "cphy_rx_clk_src";
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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clock-rates =
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<266666667 0 400000000 0>,
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<400000000 0 400000000 0>,
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<480000000 0 400000000 0>;
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status = "ok";
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@@ -1062,8 +1067,9 @@
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<&camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>,
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<&camcc CAM_CC_CSI5PHYTIMER_CLK>;
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src-clock-name = "cphy_rx_clk_src";
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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clock-rates =
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<266666667 0 400000000 0>,
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<400000000 0 400000000 0>,
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<480000000 0 400000000 0>;
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status = "ok";
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@@ -1083,8 +1089,8 @@
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"cci_0_clk";
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clocks = <&camcc CAM_CC_CCI_0_CLK_SRC>,
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<&camcc CAM_CC_CCI_0_CLK>;
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clock-rates = <37500000 0>;
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clock-cntl-level = "lowsvs";
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clock-rates = <37500000 0>, <37500000 0>;
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clock-cntl-level = "lowsvsd1", "lowsvs";
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src-clock-name = "cci_0_clk_src";
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pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>;
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pctrl-map-names = "m0", "m1";
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@@ -1171,8 +1177,8 @@
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"cci_1_clk";
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clocks = <&camcc CAM_CC_CCI_1_CLK_SRC>,
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<&camcc CAM_CC_CCI_1_CLK>;
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clock-rates = <37500000 0>;
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clock-cntl-level = "lowsvs";
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clock-rates = <37500000 0>, <37500000 0>;
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clock-cntl-level = "lowsvsd1", "lowsvs";
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src-clock-name = "cci_1_clk_src";
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pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>;
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pctrl-map-names = "m0", "m1";
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@@ -1259,8 +1265,8 @@
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"cci_2_clk";
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clocks = <&camcc CAM_CC_CCI_2_CLK_SRC>,
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<&camcc CAM_CC_CCI_2_CLK>;
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clock-rates = <37500000 0>;
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clock-cntl-level = "lowsvs";
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clock-rates = <37500000 0>, <37500000 0>;
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clock-cntl-level = "lowsvsd1", "lowsvs";
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src-clock-name = "cci_2_clk_src";
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pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>;
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pctrl-map-names = "m0", "m1";
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@@ -1647,14 +1653,15 @@
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<&camcc CAM_CC_QDSS_DEBUG_XO_CLK>;
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clock-rates =
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<0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,
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<0 0 0 56470588 0 0 0 213333333 0 200000000 0 0 0 0 0>,
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<0 0 0 80000000 0 0 0 300000000 0 300000000 0 0 0 0 0>,
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<0 0 0 80000000 0 0 0 300000000 0 400000000 0 0 0 0 0>,
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<0 0 0 80000000 0 0 0 300000000 0 400000000 0 0 0 0 0>,
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<0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>,
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<0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>,
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<0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>;
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clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1",
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"nominal", "nominal_l1", "turbo";
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clock-cntl-level = "suspend", "lowsvsd1", "lowsvs", "svs",
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"svs_l1", "nominal", "nominal_l1", "turbo";
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src-clock-name = "camnoc_rt_axi_clk_src";
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domain-id-support-clks = "ife_lite_csid_clk",
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"ife_lite_ahb", "csid_clk_src", "csid_clk";
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@@ -2620,13 +2627,14 @@
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<&camcc CAM_CC_CSID_CLK>,
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<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
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clock-rates =
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<266666667 0 0>,
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<400000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
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"turbo";
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clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
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"svs_l1", "nominal", "turbo";
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src-clock-name = "csid_clk_src";
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clock-control-debugfs = "true";
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status = "ok";
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@@ -2662,7 +2670,7 @@
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<&camcc CAM_CC_TFE_0_BAYER_CLK>,
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<&camcc CAM_CC_CAMNOC_RT_TFE_0_BAYER_CLK>;
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clock-rates =
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<0 360000000 0 0 0 0 0>,
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<0 360280000 0 0 0 0 0>,
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<0 480000000 0 0 0 0 0>,
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<0 630000000 0 0 0 0 0>,
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<0 716000000 0 0 0 0 0>,
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@@ -2698,13 +2706,14 @@
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<&camcc CAM_CC_CSID_CLK>,
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<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
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clock-rates =
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<266666667 0 0>,
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<400000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
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"turbo";
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clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
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"svs_l1", "nominal", "turbo";
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src-clock-name = "csid_clk_src";
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clock-control-debugfs = "true";
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status = "ok";
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@@ -2740,7 +2749,7 @@
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<&camcc CAM_CC_TFE_1_BAYER_CLK>,
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<&camcc CAM_CC_CAMNOC_RT_TFE_1_BAYER_CLK>;
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clock-rates =
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<0 360000000 0 0 0 0 0>,
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<0 360280000 0 0 0 0 0>,
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<0 480000000 0 0 0 0 0>,
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<0 630000000 0 0 0 0 0>,
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<0 716000000 0 0 0 0 0>,
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@@ -2776,13 +2785,14 @@
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<&camcc CAM_CC_CSID_CLK>,
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<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
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clock-rates =
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<266666667 0 0>,
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<400000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>,
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<480000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
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"turbo";
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clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
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"svs_l1", "nominal", "turbo";
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src-clock-name = "csid_clk_src";
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clock-control-debugfs = "true";
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status = "ok";
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@@ -2818,7 +2828,7 @@
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<&camcc CAM_CC_TFE_2_BAYER_CLK>,
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<&camcc CAM_CC_CAMNOC_RT_TFE_2_BAYER_CLK>;
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clock-rates =
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<0 360000000 0 0 0 0 0>,
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<0 360280000 0 0 0 0 0>,
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<0 480000000 0 0 0 0 0>,
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<0 630000000 0 0 0 0 0>,
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<0 716000000 0 0 0 0 0>,
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@@ -2860,13 +2870,14 @@
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<&camcc CAM_CC_IFE_LITE_CLK>,
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<&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>;
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clock-rates =
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<0 266666667 0 0 0 0>,
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<0 400000000 0 0 0 0>,
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<0 480000000 0 0 0 0>,
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<0 480000000 0 0 0 0>,
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<0 480000000 0 0 0 0>,
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<0 480000000 0 0 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
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"turbo";
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clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
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"svs_l1", "nominal", "turbo";
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src-clock-name = "ife_lite_csid_clk_src";
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clock-control-debugfs = "true";
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status = "ok";
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@@ -2899,13 +2910,14 @@
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<&camcc CAM_CC_IFE_LITE_CLK>,
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<&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>;
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clock-rates =
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<0 0 0 266666667 0 0>,
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<0 0 0 400000000 0 0>,
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<0 0 0 480000000 0 0>,
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<0 0 0 480000000 0 0>,
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<0 0 0 480000000 0 0>,
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<0 0 0 480000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
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"turbo";
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clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
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"svs_l1", "nominal", "turbo";
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src-clock-name = "ife_lite_clk_src";
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clock-control-debugfs = "true";
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cam_hw_pid = <19>;
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@@ -2939,13 +2951,14 @@
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<&camcc CAM_CC_IFE_LITE_CLK>,
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<&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>;
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clock-rates =
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<0 266666667 0 0 0 0>,
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<0 400000000 0 0 0 0>,
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<0 480000000 0 0 0 0>,
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<0 480000000 0 0 0 0>,
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<0 480000000 0 0 0 0>,
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<0 480000000 0 0 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
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"turbo";
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clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
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"svs_l1", "nominal", "turbo";
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src-clock-name = "ife_lite_csid_clk_src";
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clock-control-debugfs = "true";
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status = "ok";
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@@ -2978,13 +2991,14 @@
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<&camcc CAM_CC_IFE_LITE_CLK>,
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<&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>;
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clock-rates =
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<0 0 0 266666667 0 0>,
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<0 0 0 400000000 0 0>,
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<0 0 0 480000000 0 0>,
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<0 0 0 480000000 0 0>,
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<0 0 0 480000000 0 0>,
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<0 0 0 480000000 0 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
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"turbo";
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clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
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"svs_l1", "nominal", "turbo";
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src-clock-name = "ife_lite_clk_src";
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clock-control-debugfs = "true";
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cam_hw_pid = <20>;
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@@ -3011,9 +3025,10 @@
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<&camcc CAM_CC_CPHY_RX_CLK_SRC>,
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<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
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clock-rates =
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<266666667 0>,
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<400000000 0>,
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<480000000 0>;
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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src-clock-name = "cphy_rx_clk_src";
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status = "ok";
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};
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@@ -3038,9 +3053,10 @@
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<&camcc CAM_CC_CPHY_RX_CLK_SRC>,
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<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
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clock-rates =
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<266666667 0>,
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<400000000 0>,
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<480000000 0>;
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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src-clock-name = "cphy_rx_clk_src";
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status = "ok";
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};
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@@ -3065,9 +3081,10 @@
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<&camcc CAM_CC_CPHY_RX_CLK_SRC>,
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<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
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clock-rates =
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<266666667 0>,
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<400000000 0>,
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<480000000 0>;
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clock-cntl-level = "lowsvs", "nominal";
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clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
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src-clock-name = "cphy_rx_clk_src";
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status = "ok";
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};
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@@ -3261,7 +3278,7 @@
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<&camcc CAM_CC_OFE_HDR_CLK>,
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<&camcc CAM_CC_OFE_MAIN_FAST_AHB_CLK>;
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clock-rates =
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<0 0 338000000 0 0 0 0 0 0 0 0>,
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<0 0 338800000 0 0 0 0 0 0 0 0>,
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<0 0 484000000 0 0 0 0 0 0 0 0>,
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<0 0 586000000 0 0 0 0 0 0 0 0>,
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<0 0 688000000 0 0 0 0 0 0 0 0>,
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