From 58e6536df088b2ae17df0719b49607516f89b7f5 Mon Sep 17 00:00:00 2001 From: Mani Chandana Ballary Kuntumalla Date: Sat, 28 Dec 2024 18:02:08 +0530 Subject: [PATCH 01/11] ARM: dts: msm: Enable DP for Kera CDP, QRD, and MTP platforms Enable DP support for MTP, QRD, and CDP platforms for Kera. Change-Id: I78e1c0ffd842a4ebf0d73f9076c059591036dbaf Signed-off-by: Mani Chandana Ballary Kuntumalla Signed-off-by: lnxdisplay --- display/kera-sde-display.dtsi | 2 +- display/kera-sde.dtsi | 7 ++++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/display/kera-sde-display.dtsi b/display/kera-sde-display.dtsi index f2942b9c..9404dfd8 100644 --- a/display/kera-sde-display.dtsi +++ b/display/kera-sde-display.dtsi @@ -75,7 +75,7 @@ }; &mdss_mdp { - connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &smmu_sde_sec &sde_wb2>; + connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &smmu_sde_sec &sde_wb2 &sde_dp>; }; &dsi_vtdr6130_amoled_cmd { diff --git a/display/kera-sde.dtsi b/display/kera-sde.dtsi index 22362ce2..0b5dc6c9 100644 --- a/display/kera-sde.dtsi +++ b/display/kera-sde.dtsi @@ -33,12 +33,13 @@ sde_dp: qcom,dp_display@af54000 { cell-index = <0>; compatible = "qcom,dp-display"; - status = "disabled"; + status = "ok"; - //usb-phy = <&usb_qmp_dp_phy>; + usb-phy = <&usb_qmp_dp_phy>; qcom,ext-disp = <&ext_disp>; usb-controller = <&usb0>; qcom,altmode-dev = <&altmode 0>; + qcom,dp-aux-switch = <&wcd_usbss>; reg = <0xaf54000 0x104>, <0xaf54200 0x0c0>, @@ -105,7 +106,7 @@ vdda-1p2-supply = <&L4B>; vdda-0p9-supply = <&L7K>; vdda_usb-0p9-supply = <&L7K>; - //vdd_mx-supply = <&VDD_MXA_LEVEL>; + vdd_mx-supply = <&VDD_MXA_LEVEL>; dp_phy_gdsc-supply = <&gcc_usb3_phy_gdsc>; qcom,hbr-rbr-voltage-swing = <0x07 0x0f 0x16 0x1f>, From b0bdc77fda92821476ffdbaa9b333af7a2cbe11a Mon Sep 17 00:00:00 2001 From: Sampurna Bolloju Date: Fri, 10 Jan 2025 14:35:41 +0530 Subject: [PATCH 02/11] ARM: dts: msm: add xo clock in sde_cesta for tuna target Add xo clock in sde_cesta for tuna target. This will help to vote for xo frequency during cesta idle time. Change-Id: I7cbf64c3121044d8976272bd690a718fda18a443 Signed-off-by: Sampurna Bolloju Signed-off-by: lnxdisplay --- display/tuna-sde.dtsi | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/display/tuna-sde.dtsi b/display/tuna-sde.dtsi index a1de8490..672b44cc 100644 --- a/display/tuna-sde.dtsi +++ b/display/tuna-sde.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include @@ -222,12 +222,13 @@ reg-names = "rscc", "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5"; clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_MDP_CLK_SRC>; + <&dispcc DISP_CC_MDSS_MDP_CLK_SRC>, + <&dispcc DISP_CC_XO_CLK_SRC>; - clock-names = "branch_clk", "core_clk"; - clock-rate = <660000000 660000000>; - clock-max-rate = <660000000 660000000>; - clock-mmrm = <0 DISP_CC_MDSS_MDP_CLK_SRC>; + clock-names = "branch_clk", "core_clk", "xo"; + clock-rate = <660000000 660000000 19200000>; + clock-max-rate = <660000000 660000000 19200000>; + clock-mmrm = <0 DISP_CC_MDSS_MDP_CLK_SRC 0>; interconnects = <&mmss_noc MASTER_MDP_DISP_CRM_HW_0 &mc_virt SLAVE_EBI1_DISP_CRM_HW_0>, From 10c7d405417db4a1702afdc02de88a49bec85448 Mon Sep 17 00:00:00 2001 From: Anand Tarakh Date: Mon, 6 Jan 2025 17:48:32 +0530 Subject: [PATCH 03/11] ARM: dts: msm: add 111 topology support for VTDR6130 panel on Tuna Add 111 topology support for VTDR6130 panel on Tuna target. Change-Id: Ie9e294652476b12aaa467cf8f754f9325576bf47 Signed-off-by: Anand Tarakh Signed-off-by: lnxdisplay --- display/tuna-sde-display-common.dtsi | 29 ++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/display/tuna-sde-display-common.dtsi b/display/tuna-sde-display-common.dtsi index 168db297..4598c0e4 100644 --- a/display/tuna-sde-display-common.dtsi +++ b/display/tuna-sde-display-common.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi" @@ -172,7 +172,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -180,7 +181,8 @@ timing@1 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -188,7 +190,8 @@ timing@2 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -196,7 +199,8 @@ timing@3 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -226,7 +230,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <847480320 844537680 841595040>; }; @@ -249,21 +254,24 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; timing@1 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; timing@2 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; @@ -288,7 +296,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; From 53d4aef4041ed7bc5b568387d1f80c8af8dd2f77 Mon Sep 17 00:00:00 2001 From: Abhinav Saurabh Date: Mon, 13 Jan 2025 16:38:12 +0530 Subject: [PATCH 04/11] ARM: dts: msm: add support for sharp qhd+ sim panel on Kera Add display support for sharp qhd+ sim panel on Kera. Change-Id: I60283a25c36f9566d7273150551a7eb212cbe001 Signed-off-by: Abhinav Saurabh Signed-off-by: lnxdisplay --- display/kera-sde-display-cdp.dtsi | 18 +++++++++++++++++- display/kera-sde-display-common.dtsi | 28 ++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 1 deletion(-) diff --git a/display/kera-sde-display-cdp.dtsi b/display/kera-sde-display-cdp.dtsi index efb7d0d3..48dcca62 100644 --- a/display/kera-sde-display-cdp.dtsi +++ b/display/kera-sde-display-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "kera-sde-display.dtsi" @@ -135,6 +135,22 @@ qcom,platform-sec-reset-gpio = <&tlmm 127 0>; }; +&dsi_sharp_qhd_plus_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 12 0>; +}; + +&dsi_sharp_qhd_plus_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 12 0>; +}; + &dsi_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; diff --git a/display/kera-sde-display-common.dtsi b/display/kera-sde-display-common.dtsi index 8fec279c..31e0fb61 100644 --- a/display/kera-sde-display-common.dtsi +++ b/display/kera-sde-display-common.dtsi @@ -11,6 +11,8 @@ #include "dsi-panel-sim-dualmipi-dsc375-cmd.dtsi" #include "dsi-panel-sim-dualmipi-video.dtsi" #include "dsi-panel-sim-sec-hd-cmd.dtsi" +#include "dsi-panel-sharp-dsc-qhd-plus-cmd.dtsi" +#include "dsi-panel-sharp-dsc-qhd-plus-video.dtsi" #include "dsi-panel-vtdr6130-dsc-fhd-plus-cmd.dtsi" #include "dsi-panel-vtdr6130-dsc-fhd-plus-video.dtsi" #include "dsi-panel-vtdr6130-dsc-fhd-plus-120hz-cmd.dtsi" @@ -409,6 +411,32 @@ }; }; +&dsi_sharp_qhd_plus_dsc_cmd { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-display-timings { + timing@0 { /* 120 FPS */ + qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 16 15 07 + 07 07 02 04 00 17 0c]; + qcom,display-topology = <2 2 2>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_sharp_qhd_plus_dsc_video { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-display-timings { + timing@0 { /* 120 FPS */ + qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 16 15 07 + 07 07 02 04 00 17 0c]; + qcom,display-topology = <2 2 2>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_sim_cmd { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; From 7364fffb72b177b4d5993d751efc52a4ceefbe43 Mon Sep 17 00:00:00 2001 From: Abhinav Saurabh Date: Mon, 13 Jan 2025 15:07:32 +0530 Subject: [PATCH 05/11] ARM: dts: msm: add 111 topology support for VTDR6130 panel on Kera Add 111 topology support for VTDR6130 panel on Kera target. Change-Id: I4daae3b5f1db36eec8b256a1c8e53540f39c8e1b Signed-off-by: Abhinav Saurabh Signed-off-by: lnxdisplay --- display/kera-sde-display-common.dtsi | 35 ++++++++++++++++++---------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/display/kera-sde-display-common.dtsi b/display/kera-sde-display-common.dtsi index 31e0fb61..1392a0c2 100644 --- a/display/kera-sde-display-common.dtsi +++ b/display/kera-sde-display-common.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "dsi-panel-sim-cmd.dtsi" @@ -137,7 +137,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -145,7 +146,8 @@ timing@1 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -153,7 +155,8 @@ timing@2 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -161,7 +164,8 @@ timing@3 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -192,7 +196,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <847480320 844537680 841595040>; }; @@ -216,21 +221,24 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; timing@1 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; timing@2 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; @@ -257,7 +265,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; @@ -383,7 +392,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; @@ -405,7 +415,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; From a9d0d303a539121d6014d6e924e620f66dc65abd Mon Sep 17 00:00:00 2001 From: Anand Tarakh Date: Tue, 7 Jan 2025 14:52:06 +0530 Subject: [PATCH 06/11] ARM: dts: msm: add TUI touch support on vm display panel on tuna Add TUI touch support on vm display panel on Tuna target. Change-Id: I52c09fb96a54fe950c96761f96e2dfb274261021 Signed-off-by: Anand Tarakh Signed-off-by: lnxdisplay --- display/trustedvm-tuna-sde-display-cdp.dtsi | 18 +++++++++++++++++- display/trustedvm-tuna-sde-display-mtp.dtsi | 18 +++++++++++++++++- 2 files changed, 34 insertions(+), 2 deletions(-) diff --git a/display/trustedvm-tuna-sde-display-cdp.dtsi b/display/trustedvm-tuna-sde-display-cdp.dtsi index 06e55839..13c0c9d9 100644 --- a/display/trustedvm-tuna-sde-display-cdp.dtsi +++ b/display/trustedvm-tuna-sde-display-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "trustedvm-tuna-sde-display.dtsi" @@ -221,3 +221,19 @@ &sde_dsi { qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd>; }; + +&qupv3_se4_i2c { + st_fts@49 { + panel = <&dsi_nt37801_amoled_cmd + &dsi_nt37801_amoled_video + &dsi_nt37801_amoled_dsc_10b_cmd + &dsi_nt37801_amoled_dsc_10b_video + &dsi_nt37801_amoled_cmd_spr + &dsi_nt37801_amoled_vid_spr + &dsi_nt37801_amoled_qsync_cmd + &dsi_nt37801_amoled_qsync_video + &dsi_nt37801_amoled_fhd_plus_cmd + &dsi_nt37801_amoled_cmd_ddicspr + &dsi_nt37801_amoled_video_ddicspr>; + }; +}; diff --git a/display/trustedvm-tuna-sde-display-mtp.dtsi b/display/trustedvm-tuna-sde-display-mtp.dtsi index 4738255d..86d21c3f 100644 --- a/display/trustedvm-tuna-sde-display-mtp.dtsi +++ b/display/trustedvm-tuna-sde-display-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "trustedvm-tuna-sde-display.dtsi" @@ -154,3 +154,19 @@ &sde_dsi { qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd>; }; + +&qupv3_se4_i2c { + st_fts@49 { + panel = <&dsi_nt37801_amoled_cmd + &dsi_nt37801_amoled_video + &dsi_nt37801_amoled_dsc_10b_cmd + &dsi_nt37801_amoled_dsc_10b_video + &dsi_nt37801_amoled_cmd_spr + &dsi_nt37801_amoled_vid_spr + &dsi_nt37801_amoled_qsync_cmd + &dsi_nt37801_amoled_qsync_video + &dsi_nt37801_amoled_fhd_plus_cmd + &dsi_nt37801_amoled_cmd_ddicspr + &dsi_nt37801_amoled_video_ddicspr>; + }; +}; From fd34b32bd6b14d4691e153cfd9a266d23188ceee Mon Sep 17 00:00:00 2001 From: Anand Tarakh Date: Thu, 9 Jan 2025 17:29:52 +0530 Subject: [PATCH 07/11] ARM: dts: msm: add TUI touch support on vm display panel on kera Add TUI touch support on vm display panel on kera target. Change-Id: I5e9e22d1476e1545ccdef69ff14248f2f019e336 Signed-off-by: Anand Tarakh Signed-off-by: lnxdisplay --- display/trustedvm-kera-sde-display-cdp.dtsi | 17 ++++++++++++++++- display/trustedvm-kera-sde-display-mtp.dtsi | 17 ++++++++++++++++- display/trustedvm-kera-sde-display-qrd.dtsi | 17 ++++++++++++++++- 3 files changed, 48 insertions(+), 3 deletions(-) diff --git a/display/trustedvm-kera-sde-display-cdp.dtsi b/display/trustedvm-kera-sde-display-cdp.dtsi index 77b43890..c42cf3a7 100644 --- a/display/trustedvm-kera-sde-display-cdp.dtsi +++ b/display/trustedvm-kera-sde-display-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "trustedvm-kera-sde-display.dtsi" @@ -154,3 +154,18 @@ &sde_dsi { qcom,dsi-default-panel = <&dsi_vtdr6130_amoled_cmd>; }; + +&qupv3_se8_spi { + goodix-berlin@0 { + panel = <&dsi_vtdr6130_amoled_cmd + &dsi_vtdr6130_amoled_video + &dsi_vtdr6130_amoled_120hz_cmd + &dsi_vtdr6130_amoled_120hz_video + &dsi_vtdr6130_amoled_90hz_cmd + &dsi_vtdr6130_amoled_90hz_video + &dsi_vtdr6130_amoled_60hz_cmd + &dsi_vtdr6130_amoled_60hz_video + &dsi_vtdr6130_amoled_qsync_144hz_cmd + &dsi_vtdr6130_amoled_qsync_144hz_video>; + }; +}; diff --git a/display/trustedvm-kera-sde-display-mtp.dtsi b/display/trustedvm-kera-sde-display-mtp.dtsi index 77b43890..c42cf3a7 100644 --- a/display/trustedvm-kera-sde-display-mtp.dtsi +++ b/display/trustedvm-kera-sde-display-mtp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "trustedvm-kera-sde-display.dtsi" @@ -154,3 +154,18 @@ &sde_dsi { qcom,dsi-default-panel = <&dsi_vtdr6130_amoled_cmd>; }; + +&qupv3_se8_spi { + goodix-berlin@0 { + panel = <&dsi_vtdr6130_amoled_cmd + &dsi_vtdr6130_amoled_video + &dsi_vtdr6130_amoled_120hz_cmd + &dsi_vtdr6130_amoled_120hz_video + &dsi_vtdr6130_amoled_90hz_cmd + &dsi_vtdr6130_amoled_90hz_video + &dsi_vtdr6130_amoled_60hz_cmd + &dsi_vtdr6130_amoled_60hz_video + &dsi_vtdr6130_amoled_qsync_144hz_cmd + &dsi_vtdr6130_amoled_qsync_144hz_video>; + }; +}; diff --git a/display/trustedvm-kera-sde-display-qrd.dtsi b/display/trustedvm-kera-sde-display-qrd.dtsi index 77b43890..c42cf3a7 100644 --- a/display/trustedvm-kera-sde-display-qrd.dtsi +++ b/display/trustedvm-kera-sde-display-qrd.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "trustedvm-kera-sde-display.dtsi" @@ -154,3 +154,18 @@ &sde_dsi { qcom,dsi-default-panel = <&dsi_vtdr6130_amoled_cmd>; }; + +&qupv3_se8_spi { + goodix-berlin@0 { + panel = <&dsi_vtdr6130_amoled_cmd + &dsi_vtdr6130_amoled_video + &dsi_vtdr6130_amoled_120hz_cmd + &dsi_vtdr6130_amoled_120hz_video + &dsi_vtdr6130_amoled_90hz_cmd + &dsi_vtdr6130_amoled_90hz_video + &dsi_vtdr6130_amoled_60hz_cmd + &dsi_vtdr6130_amoled_60hz_video + &dsi_vtdr6130_amoled_qsync_144hz_cmd + &dsi_vtdr6130_amoled_qsync_144hz_video>; + }; +}; From 7716134fc5f840a9ebf0d2b0e4457b556601ef1f Mon Sep 17 00:00:00 2001 From: Abhinav Saurabh Date: Fri, 3 Jan 2025 15:30:22 +0530 Subject: [PATCH 08/11] ARM: dts: msm: update in sharp qhd+ panel GPIO name in tuna Update in Sharp qhd+ panel GPIO name as per recent change from supplier in tuna. Change-Id: I64422b2242d78b73a39ba30a4d5377cd442d20c9 Signed-off-by: Abhinav Saurabh Signed-off-by: lnxdisplay --- display/tuna-sde-display-cdp.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/display/tuna-sde-display-cdp.dtsi b/display/tuna-sde-display-cdp.dtsi index 3d5e34aa..59f78a28 100644 --- a/display/tuna-sde-display-cdp.dtsi +++ b/display/tuna-sde-display-cdp.dtsi @@ -1,11 +1,11 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "tuna-sde-display.dtsi" -&pm8550vs_g_gpios { +&pm8550vs_d_gpios { lcd_backlight_ctrl { lcd_backlight_en_default: lcd_backlight_en_default { pins = "gpio4"; @@ -19,7 +19,7 @@ }; }; -&pm8550vs_f_gpios { +&pm8550ve_f_gpios { display_panel_avdd_default: display_panel_avdd_default { pins = "gpio8"; function = "normal"; @@ -38,7 +38,7 @@ regulator-min-microvolt = <5500000>; regulator-max-microvolt = <5500000>; regulator-enable-ramp-delay = <233>; - gpio = <&pm8550vs_f_gpios 8 0>; + gpio = <&pm8550ve_f_gpios 8 0>; enable-active-high; regulator-boot-on; proxy-supply = <&display_panel_avdd>; @@ -265,7 +265,7 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-reset-gpio = <&tlmm 14 0>; - qcom,platform-bklight-en-gpio = <&pm8550vs_g_gpios 4 0>; + qcom,platform-bklight-en-gpio = <&pm8550vs_d_gpios 4 0>; }; &dsi_sharp_qhd_plus_dsc_video { @@ -274,7 +274,7 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-reset-gpio = <&tlmm 14 0>; - qcom,platform-bklight-en-gpio = <&pm8550vs_g_gpios 4 0>; + qcom,platform-bklight-en-gpio = <&pm8550vs_d_gpios 4 0>; }; &dsi_sim_cmd { From a8dacd89026e7852925eaae6d222addd29ab06ea Mon Sep 17 00:00:00 2001 From: Yadong Wang Date: Fri, 27 Dec 2024 11:04:25 +0800 Subject: [PATCH 09/11] ARM: dts: msm: add physical width/height config for NT37801 panel This change adds physical width/height configurations for NT37801 panel Change-Id: Ifa4b1c719e7046aa1d4a00156fb9e97f2027f64c Signed-off-by: Yadong Wang Signed-off-by: lnxdisplay --- display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi | 2 ++ display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi index 29afd64e..f7807289 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi @@ -29,6 +29,8 @@ qcom,mdss-dsi-dma-trigger = "trigger_sw"; qcom,mdss-dsi-mdp-trigger = "none"; qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <74>; + qcom,mdss-pan-physical-height-dimension = <161>; qcom,mdss-dsi-te-pin-select = <1>; qcom,mdss-dsi-wr-mem-start = <0x2c>; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi index 26b49ed2..fd8f2e99 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi @@ -24,6 +24,8 @@ qcom,mdss-dsi-dma-trigger = "trigger_sw"; qcom,mdss-dsi-mdp-trigger = "none"; qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <74>; + qcom,mdss-pan-physical-height-dimension = <161>; qcom,mdss-dsi-tx-eot-append; qcom,adjust-timer-wakeup-ms = <1>; qcom,panel-cphy-mode; From 88e82855ef7606e0034e84f189963e9ed5981a49 Mon Sep 17 00:00:00 2001 From: Jinfeng Gu Date: Mon, 20 Jan 2025 15:24:10 +0800 Subject: [PATCH 10/11] ARM: dts: msm: update qsync min fps support for nt37801 vid mode panel This change updates qsync min refresh rate support from 80Hz to 90Hz for nt37801 video mode panel. Change-Id: Id3db122e121b59163e16e7413cc7be1256c3f397 Signed-off-by: Jinfeng Gu Signed-off-by: lnxdisplay --- display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi | 4 ++-- display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi index 7840c1c2..f1fd60ce 100644 --- a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi +++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ &mdss_mdp { @@ -37,7 +37,7 @@ qcom,mdss-dsi-wr-mem-start = <0x2c>; qcom,mdss-dsi-wr-mem-continue = <0x3c>; qcom,qsync-enable; - qcom,mdss-dsi-qsync-min-refresh-rate = <80>; + qcom,mdss-dsi-qsync-min-refresh-rate = <90>; qcom,mdss-dsi-display-timings { timing@0 { cell-index = <0>; diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi index 93fd3234..9b8dfcd4 100644 --- a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi +++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ &mdss_mdp { @@ -34,7 +34,7 @@ qcom,mdss-dsi-wr-mem-continue = <0x3c>; qcom,spr-pack-type = "pentile"; qcom,qsync-enable; - qcom,mdss-dsi-qsync-min-refresh-rate = <80>; + qcom,mdss-dsi-qsync-min-refresh-rate = <90>; qcom,mdss-dsi-panel-hdr-enabled; qcom,mdss-dsi-panel-hdr-color-primaries = <15150 15750 34250 15700 12250 35800 6750 2550>; From 820ccdbe30d53ab346f673ac366b7fc494606b0f Mon Sep 17 00:00:00 2001 From: Huayang Zhong Date: Fri, 3 Jan 2025 12:56:36 +0800 Subject: [PATCH 11/11] ARM: dts: msm: enable dfps for sharp quadpipe panel This change enables dfps for sharp video mode panel on sun target. Change-Id: I710fc6dd6d4f910f44db32e1e9ee3dbafa688dea Signed-off-by: Huayang Zhong Signed-off-by: lnxdisplay --- display/sun-sde-display-common.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index 98eaab75..a6b1b5b2 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi" @@ -808,6 +808,10 @@ &dsi_sharp_qhd_plus_dsc_video { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,dsi-supported-dfps-list = <120 90 60>; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp"; + qcom,mdss-dsi-display-timings { timing@0 { /* 120 FPS */ qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 16 15 07