From 7d2f2106a6cd58308b19c35eea2227ad0b3d4198 Mon Sep 17 00:00:00 2001 From: Sampurna Bolloju Date: Mon, 11 Nov 2024 11:58:50 +0530 Subject: [PATCH] ARM: dts: msm: add display DT node for Kera target This change adds display DT node for Kera target. Change-Id: I19694c8cd0fc9c684fe21edcd21cd7b5035f502e Signed-off-by: Sampurna Bolloju Signed-off-by: lnxdisplay --- display/kera-sde-common.dtsi | 317 ++++++++++++++++++++++++++++++++++ display/kera-sde-display.dtsi | 9 +- display/kera-sde.dtsi | 64 +++++++ 3 files changed, 389 insertions(+), 1 deletion(-) diff --git a/display/kera-sde-common.dtsi b/display/kera-sde-common.dtsi index 4f0e2247..b3621384 100644 --- a/display/kera-sde-common.dtsi +++ b/display/kera-sde-common.dtsi @@ -7,6 +7,323 @@ &soc { mdss_mdp: qcom,mdss_mdp@ae00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "qcom,sde-kms"; + reg = <0x0ae00000 0x93800>, + <0x0aeb0000 0x2008>, + <0x0af80000 0x7000>, + <0x400000 0x2000>; + reg-names = "mdp_phys", + "vbif_phys", + "regdma_phys", + "ipcc_reg"; + + /* interrupt config */ + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + #cooling-cells = <2>; + + /* hw blocks */ + qcom,sde-off = <0x1000>; + qcom,sde-len = <0x488>; + + qcom,sde-ctl-off = <0x16000 0x17000 0x18000 0x19000>; + qcom,sde-ctl-size = <0x1000>; + qcom,sde-ctl-display-pref = "primary", "none", "none", "none"; + + qcom,sde-mixer-off = <0x45000 0x46000 0x47000 + 0x48000 0x0f0f 0x0f0f + 0x0f0f 0x0f0f>; + qcom,sde-mixer-size = <0x400>; + qcom,sde-mixer-display-pref = "primary", "primary", "none", + "none", "none", "none", "none", "none"; + + qcom,sde-mixer-dcwb-pref = "none", "none", "none", "none", + "dcwb", "dcwb", "dcwb", "dcwb"; + + qcom,sde-dspp-top-off = <0x1300>; + qcom,sde-dspp-top-size = <0x8c>; + + qcom,sde-dspp-off = <0x55000 0x57000 0x59000>; + qcom,sde-dspp-size = <0x1800>; + + qcom,sde-dspp-rc-version = <0x00010001>; + qcom,sde-dspp-rc-off = <0x15800 0x14800 0x13800>; + qcom,sde-dspp-rc-size = <0x100>; + qcom,sde-dspp-rc-mem-size = <2720>; + qcom,sde-dspp-rc-min-region-width = <20>; + + qcom,sde-dnsc-blur-version = <0x100>; + qcom,sde-dnsc-blur-off = <0x7D000>; + qcom,sde-dnsc-blur-size = <0x40>; + qcom,sde-dnsc-blur-gaus-lut-off = <0x100>; + qcom,sde-dnsc-blur-gaus-lut-size = <0x400>; + qcom,sde-dnsc-blur-dither-off = <0x5E0>; + qcom,sde-dnsc-blur-dither-size = <0x20>; + + qcom,sde-dest-scaler-top-off = <0x0008F000>; + qcom,sde-dest-scaler-top-size = <0x1C>; + qcom,sde-dest-scaler-off = <0x0 0x1000 0x2000>; + qcom,sde-dest-scaler-size = <0x800>; + + qcom,sde-wb-off = <0x66000>; + qcom,sde-wb-size = <0x2c8>; + qcom,sde-wb-xin-id = <6>; + qcom,sde-wb-id = <2>; + + qcom,sde-intf-off = <0x35000 0x36000 0x37000 0x38000>; + qcom,sde-intf-size = <0x4BC>; + qcom,sde-intf-type = "dp", "dsi", "dsi", "dp"; + qcom,sde-intf-tear-irq-off = <0 0x36800 0x37800 0>; + + qcom,sde-pp-off = <0x6a000 0x6b000 0x6c000 0x6d000 + 0x67000 0x67400 0x7f000 0x7f400>; + qcom,sde-pp-slave = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; + qcom,sde-pp-size = <0x2c>; + qcom,sde-pp-merge-3d-id = <0x0 0x0 0x1 0x1 0x2 0x2 0x3 0x3>; + + qcom,sde-merge-3d-off = <0x4f000 0x50000 0x67700 0x7f700>; + qcom,sde-merge-3d-size = <0x1c>; + qcom,sde-pp-cwb = <0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1>; + + qcom,sde-cdm-off = <0x7a200>; + qcom,sde-cdm-size = <0x240>; + + qcom,sde-dsc-off = <0x81000 0x81000 0x82000>; + qcom,sde-dsc-size = <0x8>; + qcom,sde-dsc-pair-mask = <2 1 0>; + qcom,sde-dsc-hw-rev = "dsc_1_2"; + qcom,sde-dsc-enc = <0x100 0x200 0x100>; + qcom,sde-dsc-enc-size = <0x100>; + qcom,sde-dsc-ctl = <0xF00 0xF80 0xF00>; + qcom,sde-dsc-ctl-size = <0x24>; + qcom,sde-dsc-native422-supp = <1 1 1>; + + qcom,sde-dither-off = <0xe0 0xe0 0xe0 0xe0 0xe0 0xe0 0xe0 0xe0>; + qcom,sde-cwb-dither = <0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1>; + qcom,sde-dither-version = <0x00020000>; + qcom,sde-dither-size = <0x20>; + + qcom,sde-sspp-type = "vig", "vig", + "dma", "dma", "dma", "dma"; + qcom,sde-sspp-off = <0x5000 0x7000 + 0x25000 0x27000 0x29000 0x2b000>; + qcom,sde-sspp-src-size = <0x344>; + + qcom,sde-sspp-xin-id = <0 4 1 5 9 13>; + qcom,sde-sspp-excl-rect = <1 1 1 1 1 1>; + qcom,sde-sspp-smart-dma-priority = <5 6 1 2 3 4>; + qcom,sde-smart-dma-rev = "smart_dma_v2p5"; + + qcom,sde-mixer-pair-mask = <2 1 4 3 6 5 8 7>; + + qcom,sde-mixer-blend-op-off = <0x40 0x70 0xa0 0xd0 0x100 0x130 + 0x160 0x190 0x1c0 0x1f0 0x220>; + + qcom,sde-max-per-pipe-bw-kbps = <4300000 4300000 + 4300000 4300000 + 4300000 4300000>; + + qcom,sde-max-per-pipe-bw-high-kbps = <4300000 4300000 + 4300000 4300000 + 4300000 4300000>; + + /* offsets are relative to "mdp_phys + qcom,sde-off */ + qcom,sde-sspp-clk-ctrl = + <0x4330 0>, <0x6330 0>, + <0x24330 0>, <0x26330 0>, <0x28330 0>, <0x2a330 0>; + qcom,sde-sspp-clk-status = + <0x4334 0>, <0x6334 0>, + <0x24334 0>, <0x26334 0>, <0x28334 0>, <0x2a334 0>; + qcom,sde-sspp-csc-off = <0x1a00>; + qcom,sde-csc-type = "csc-10bit"; + qcom,sde-qseed-sw-lib-rev = "qseedv3lite"; + qcom,sde-qseed-scalar-version = <0x3004>; + qcom,sde-sspp-qseed-off = <0xa00>; + qcom,sde-mixer-linewidth = <2560>; + qcom,sde-sspp-linewidth = <5120>; + qcom,sde-wb-linewidth = <4096>; + qcom,sde-dsc-linewidth = <2560>; + qcom,sde-max-dest-scaler-input-linewidth = <2048>; + qcom,sde-max-dest-scaler-output-linewidth = <2560>; + qcom,sde-wb-linewidth-linear = <8192>; + qcom,sde-mixer-blendstages = <0xb>; + qcom,sde-highest-bank-bit = <0x8 0x2>; + qcom,sde-ubwc-version = <0x40000000>; + qcom,sde-ubwc-swizzle = <0x6>; + qcom,sde-ubwc-bw-calc-version = <0x1>; + qcom,sde-ubwc-static = <0x1>; + qcom,sde-macrotile-mode = <0x1>; + qcom,sde-smart-panel-align-mode = <0xc>; + qcom,sde-panic-per-pipe; + qcom,sde-has-cdp; + qcom,sde-has-src-split; + qcom,sde-pipe-order-version = <0x1>; + qcom,sde-has-dim-layer; + qcom,sde-has-dest-scaler; + qcom,sde-max-trusted-vm-displays = <1>; + + qcom,sde-max-bw-low-kbps = <6800000>; + qcom,sde-max-bw-high-kbps = <14200000>; + qcom,sde-min-core-ib-kbps = <2500000>; + qcom,sde-min-llcc-ib-kbps = <0>; + qcom,sde-min-dram-ib-kbps = <1600000>; + qcom,sde-dram-channels = <2>; + qcom,sde-num-nrt-paths = <0>; + qcom,sde-num-ddr-channels = <2>; + + qcom,sde-dspp-spr-off = <0x15400 0x14400 0x13400>; + qcom,sde-dspp-spr-size = <0x200>; + qcom,sde-dspp-spr-version = <0x00020000>; + + qcom,sde-dspp-demura-off = <0x15600 0x14600 0x13600>; + qcom,sde-dspp-demura-size = <0x150>; + qcom,sde-dspp-demura-version = <0x00030000>; + + qcom,sde-lm-noise-off = <0x320>; + qcom,sde-lm-noise-version = <0x00010000>; + + qcom,sde-uidle-off = <0x80000>; + qcom,sde-uidle-size = <0x80>; + + qcom,sde-vbif-off = <0>; + qcom,sde-vbif-size = <0x1074>; + qcom,sde-vbif-id = <0>; + qcom,sde-vbif-memtype-0 = <3 3 3 3 3 3 3 3>; + qcom,sde-vbif-memtype-1 = <3 3 3 3 3 3 3 3>; + + qcom,sde-vbif-default-ot-rd-limit = <40>; + qcom,sde-vbif-default-ot-wr-limit = <32>; + qcom,sde-vbif-dynamic-ot-wr-limit = <62208000 2 124416000 6 497664000 16>; + + qcom,sde-vbif-qos-rt-remap = <4 4 5 5 5 5 5 6 4 4 5 5 5 5 5 6>; + qcom,sde-vbif-qos-nrt-remap = <3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3>; + qcom,sde-vbif-qos-cwb-remap = <4 4 5 5 5 5 5 6 4 4 5 5 5 5 5 6>; + qcom,sde-vbif-qos-lutdma-remap = <4 4 4 4 5 5 5 5 4 4 4 4 5 5 5 5>; + qcom,sde-vbif-qos-offline-wb-remap = <3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3>; + qcom,sde-vbif-qos-cnoc-remap = <3 3 4 4 5 5 5 5 3 3 4 4 5 5 5 5>; + qcom,sde-vbif-qos-wb-rot-remap = <4 4 5 5 5 5 5 6 4 4 5 5 5 5 5 6>; + + qcom,sde-danger-lut = <0xffff 0xffff 0xffff 0xffff 0x0 0x0 0x0 0x0 + 0x0 0x0 0xffff 0xffff 0xffff 0xffff 0x0 0x0 0xffff0000 0xffff0000>; + + qcom,sde-safe-lut = <0xff00 0xfff0 0xff00 0xfff0 0xffff 0xffff 0x0001 0x0001 + 0x03ff 0x03ff 0xff00 0xfff0 0xff00 0xfff0 0xffff 0xffff 0xff 0xff>; + + qcom,sde-creq-lut = <0x00112233 0x44556666 0x00112233 0x66666666 + 0x00112233 0x44556666 0x00112233 0x66666666 + 0x0 0x0 0x0 0x0 + 0x77776666 0x66666540 0x77776666 0x66666540 + 0x77776541 0x0 0x77776541 0x0 + 0x00112233 0x44556666 0x00112233 0x66666666 + 0x00112233 0x44556666 0x00112233 0x66666666 + 0x0 0x0 0x0 0x0 + 0x55555544 0x33221100 0x55555544 0x33221100>; + + qcom,sde-cdp-setting = <1 1>, <1 0>; + + qcom,sde-qos-cpu-mask = <0x3>; + qcom,sde-qos-cpu-mask-performance = <0x7>; + qcom,sde-qos-cpu-dma-latency = <300>; + qcom,sde-qos-cpu-irq-latency = <300>; + + qcom,sde-ipcc-protocol-id = <0x4>; + qcom,sde-ipcc-client-dpu-phys-id = <0x14>; + qcom,sde-hw-fence-mdp-ctl-offset = <0x20000>; + + /* offsets are relative to "mdp_phys + qcom,sde-off */ + qcom,sde-reg-dma-off = <0 0x800>; + qcom,sde-reg-dma-id = <0 1>; + qcom,sde-reg-dma-version = <0x00030000>; + qcom,sde-reg-dma-trigger-off = <0x119c>; + qcom,sde-reg-dma-xin-id = <7>; + qcom,sde-reg-dma-clk-ctrl = <0x2bc 20>; + + qcom,sde-secure-sid-mask = <0x801>; + + qcom,sde-reg-bus,vectors-KBps = <0 0>, + <0 14000>, + <0 140000>, + <0 310000>; + + qcom,sde-sspp-vig-blocks { + vcm@0 { + cell-index = <0>; + qcom,sde-vig-top-off = <0x700>; + qcom,sde-vig-csc-off = <0x1a00>; + qcom,sde-vig-qseed-off = <0xa00>; + qcom,sde-vig-qseed-size = <0xe0>; + qcom,sde-vig-gamut = <0x1d00 0x00060001>; + qcom,sde-vig-igc = <0x1d00 0x00060000>; + qcom,sde-vig-inverse-pma; + qcom,sde-fp16-igc = <0x200 0x00010000>; + qcom,sde-fp16-unmult = <0x200 0x00010000>; + qcom,sde-fp16-gc = <0x200 0x00010000>; + qcom,sde-fp16-csc = <0x200 0x00010000>; + qcom,sde-ucsc-igc = <0x700 0x00010001>; + qcom,sde-ucsc-unmult = <0x700 0x00010001>; + qcom,sde-ucsc-gc = <0x700 0x00010001>; + qcom,sde-ucsc-csc = <0x700 0x00010001>; + qcom,sde-ucsc-alpha-dither = <0x700 0x00010000>; + }; + + vcm@1 { + cell-index = <1>; + qcom,sde-fp16-igc = <0x280 0x00010000>; + qcom,sde-fp16-unmult = <0x280 0x00010000>; + qcom,sde-fp16-gc = <0x280 0x00010000>; + qcom,sde-fp16-csc = <0x280 0x00010000>; + qcom,sde-ucsc-igc = <0x1700 0x00010001>; + qcom,sde-ucsc-unmult = <0x1700 0x00010001>; + qcom,sde-ucsc-gc = <0x1700 0x00010001>; + qcom,sde-ucsc-csc = <0x1700 0x00010001>; + qcom,sde-ucsc-alpha-dither = <0x1700 0x00010000>; + }; + }; + + qcom,sde-sspp-dma-blocks { + dgm@0 { + cell-index = <0>; + qcom,sde-dma-top-off = <0x700>; + qcom,sde-fp16-igc = <0x200 0x00010000>; + qcom,sde-fp16-unmult = <0x200 0x00010000>; + qcom,sde-fp16-gc = <0x200 0x00010000>; + qcom,sde-fp16-csc = <0x200 0x00010000>; + qcom,sde-ucsc-igc = <0x700 0x00010001>; + qcom,sde-ucsc-unmult = <0x700 0x00010001>; + qcom,sde-ucsc-gc = <0x700 0x00010001>; + qcom,sde-ucsc-csc = <0x700 0x00010001>; + qcom,sde-ucsc-alpha-dither = <0x700 0x00010000>; + }; + + dgm@1 { + cell-index = <1>; + qcom,sde-fp16-igc = <0x200 0x00010000>; + qcom,sde-fp16-unmult = <0x200 0x00010000>; + qcom,sde-fp16-gc = <0x200 0x00010000>; + qcom,sde-fp16-csc = <0x200 0x00010000>; + qcom,sde-ucsc-igc = <0x1700 0x00010001>; + qcom,sde-ucsc-unmult = <0x1700 0x00010001>; + qcom,sde-ucsc-gc = <0x1700 0x00010001>; + qcom,sde-ucsc-csc = <0x1700 0x00010001>; + qcom,sde-ucsc-alpha-dither = <0x1700 0x00010000>; + }; + }; + + qcom,sde-dspp-blocks { + qcom,sde-dspp-igc = <0x1260 0x00050000>; + qcom,sde-dspp-hsic = <0x800 0x00010007>; + qcom,sde-dspp-memcolor = <0x880 0x00010007>; + qcom,sde-dspp-hist = <0x800 0x00010007>; + qcom,sde-dspp-sixzone = <0x900 0x00020000>; + qcom,sde-dspp-vlut = <0xa00 0x00010008>; + qcom,sde-dspp-gamut = <0x1000 0x00040003>; + qcom,sde-dspp-pcc = <0x1700 0x00060000>; + qcom,sde-dspp-gc = <0x17c0 0x00020000>; + qcom,sde-dspp-dither = <0x82c 0x00010007>; + }; }; mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 { diff --git a/display/kera-sde-display.dtsi b/display/kera-sde-display.dtsi index 2159dfde..cbb5d7de 100644 --- a/display/kera-sde-display.dtsi +++ b/display/kera-sde-display.dtsi @@ -7,6 +7,13 @@ #include "kera-sde-display-common.dtsi" &soc { + sde_wb2: qcom,wb-display@2 { + compatible = "qcom,wb-display"; + cell-index = <0>; + label = "wb_display2"; + clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "mdp_core_clk"; + }; }; &sde_dsi { @@ -68,7 +75,7 @@ }; &mdss_mdp { - connectors = <&sde_dsi &sde_dsi1>; + connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &smmu_sde_sec &sde_wb2>; }; &dsi_vtdr6130_amoled_cmd { diff --git a/display/kera-sde.dtsi b/display/kera-sde.dtsi index 83cf63be..f9a5b91c 100644 --- a/display/kera-sde.dtsi +++ b/display/kera-sde.dtsi @@ -9,6 +9,8 @@ #include #include #include "kera-sde-common.dtsi" +#include +#include &soc { ext_disp: qcom,msm-ext-disp { @@ -177,9 +179,71 @@ }; }; }; + + smmu_sde_iommu_region_partition: smmu_sde_iommu_region_partition { + iommu-addresses = <&smmu_sde_unsec 0x0 0x00060000>, + <&smmu_sde_sec 0x0 0x00020000>; + }; + + smmu_sde_unsec: qcom,smmu_sde_unsec_cb { + compatible = "qcom,smmu_sde_unsec"; + iommus = <&apps_smmu 0x800 0x2>; + memory-region = <&smmu_sde_iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-earlymap; /* for cont-splash */ + dma-coherent; + clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "mdp_core_clk"; + }; + + smmu_sde_sec: qcom,smmu_sde_sec_cb { + compatible = "qcom,smmu_sde_sec"; + iommus = <&apps_smmu 0x801 0x0>; + memory-region = <&smmu_sde_iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xa>; + clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "mdp_core_clk"; + }; }; &mdss_mdp { + clocks = + <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK_SRC>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>; + + clock-names = "gcc_bus", + "iface_clk", "branch_clk", "core_clk", "vsync_clk", + "lut_clk"; + clock-rate = <0 0 660000000 660000000 19200000 660000000>; + clock-max-rate = <0 0 660000000 660000000 19200000 660000000>; + + qcom,hw-fence-sw-version = <0x1>; + + power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>; + + qti,smmu-proxy-cb-id = ; + + qcom,sde-vm-exclude-reg-names = "ipcc_reg"; + + /* data and reg bus scale settings */ + interconnects = <&mmss_noc MASTER_MDP &gem_noc SLAVE_LLCC>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_DISPLAY_CFG>; + interconnect-names = "qcom,sde-data-bus0", + "qcom,sde-ebi-bus", "qcom,sde-reg-bus"; + + qcom,sde-has-idle-pc; + + qcom,sde-ib-bw-vote = <2500000 0 1600000>; + qcom,sde-dspp-ltm-version = <0x00010003>; + /* offsets are based off dspp 0, 1, 2, and 3 */ + qcom,sde-dspp-ltm-off = <0x15300 0x14300 0x13300>; }; &mdss_dsi0 {