Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0

CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3812803           I01035e33 ARM: dts: msm: add CSOT vid with SPR config

CRs-Included: 3812803 .

Change-Id: I4d762a618a041c38213dbe9a59e8c83d56499a47
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This commit is contained in:
lnxdisplay
2024-06-17 12:51:35 +05:30
6 changed files with 208 additions and 5 deletions

View File

@@ -0,0 +1,134 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&mdss_mdp {
dsi_nt37801_amoled_vid_spr: qcom,mdss_dsi_nt37801_wqhd_plus_vid_spr {
qcom,mdss-dsi-panel-name =
"nt37801 amoled vid mode dsi csot panel with DSC and AP SPR";
qcom,mdss-dsi-panel-type = "dsi_video_mode";
qcom,mdss-dsi-panel-physical-type = "oled";
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-border-color = <0>;
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-sec-ctrl-num = <1>;
qcom,dsi-sec-phy-num = <1>;
qcom,mdss-dsi-traffic-mode = "burst_mode";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
qcom,mdss-dsi-tx-eot-append;
qcom,adjust-timer-wakeup-ms = <1>;
qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,spr-pack-type = "pentile";
qcom,mdss-dsi-display-timings {
timing@0 {
cell-index = <0>;
qcom,mdss-dsi-panel-framerate = <120>;
qcom,mdss-dsi-panel-width = <1440>;
qcom,mdss-dsi-panel-height = <3200>;
qcom,mdss-dsi-h-front-porch = <100>;
qcom,mdss-dsi-h-back-porch = <20>;
qcom,mdss-dsi-h-pulse-width = <20>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <20>;
qcom,mdss-dsi-v-front-porch = <44>;
qcom,mdss-dsi-v-pulse-width = <2>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsc-version = <0x12>;
qcom,src-chroma-format = <1>;
qcom,mdss-dsi-on-command = [
39 01 00 00 00 00 06 F0 55 AA 52 08 00
39 01 00 00 00 00 02 C2 81
39 01 00 00 00 00 06 F0 55 AA 52 08 03
39 01 00 00 00 00 02 C6 A2
39 01 00 00 00 00 06 F0 55 AA 52 08 05
39 01 00 00 00 00 02 6F 08
39 01 00 00 00 00 06 EC 10 00 00 00 FF
39 01 00 00 00 00 02 17 01
39 01 00 00 00 00 05 3B 00 14 00 2C
39 01 00 00 00 00 06 F0 55 AA 52 08 01
39 01 00 00 00 00 02 C3 19
39 01 00 00 00 00 02 6F 01
39 01 00 00 00 00 04 C5 0B 0B 0B
39 01 00 00 00 00 05 FF AA 55 A5 80
39 01 00 00 00 00 02 6F 02
39 01 00 00 00 00 02 F5 10
39 01 00 00 00 00 02 6F 1B
39 01 00 00 00 00 02 F4 55
39 01 00 00 00 00 02 6F 18
39 01 00 00 00 00 02 F8 19
39 01 00 00 00 00 02 6F 0F
39 01 00 00 00 00 02 FC 00
39 01 00 00 00 00 05 2A 00 00 05 9F
39 01 00 00 00 00 05 2B 00 00 0C 7F
39 01 00 00 00 00 03 90 03 03
39 01 00 00 00 00 13 91 89 28 00 28 D2
00 02 86 04 3A 00 0A 02 AB 01 E9 10
F0
39 01 00 00 00 00 02 6F 06
39 01 00 00 00 00 02 F3 DC
39 01 00 00 00 00 02 26 00
39 01 00 00 00 00 02 35 00
39 01 00 00 00 00 02 53 20
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
FF
39 01 00 00 00 00 02 5A 01
39 01 00 00 00 00 02 5F 00
39 01 00 00 00 00 02 9C 01
05 01 00 00 00 00 01 2C
39 01 00 00 00 00 02 2f 00
39 01 00 00 00 00 06 F0 55 AA 52 08 01
39 01 00 00 00 00 05 B2 55 01 FF 03
39 01 00 00 00 00 06 F0 55 AA 52 08 03
39 01 00 00 00 00 02 6F 08
39 01 00 00 00 00 02 DE 00
39 01 00 00 00 00 02 6F 09
39 01 00 00 00 00 07 DE 10 34 25 30 14 25
39 01 00 00 00 00 05 FF AA 55 A5 81
39 01 00 00 00 00 02 6F 1D
39 01 00 00 00 00 02 FB 6F
39 01 00 00 00 00 06 F0 55 AA 52 08 07
39 01 00 00 00 00 02 B0 24
39 01 00 00 00 00 02 03 10
05 01 00 00 78 00 01 11
05 01 00 00 14 00 01 29
];
qcom,mdss-dsi-off-command = [
05 01 00 00 14 00 02 28 00
05 01 00 00 78 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,compression-mode = "dsc";
qcom,mdss-dsc-slice-height = <40>;
qcom,mdss-dsc-slice-width = <720>;
qcom,mdss-dsc-slice-per-pkt = <1>;
qcom,mdss-dsc-bit-per-component = <8>;
qcom,mdss-dsc-bit-per-pixel = <8>;
qcom,mdss-dsc-block-prediction-enable;
};
};
};
};

View File

@@ -100,6 +100,19 @@
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
};
&dsi_nt37801_amoled_vid_spr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 98 0>;
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
};
&dsi_nt37801_amoled_qsync_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
@@ -277,6 +290,7 @@
&dsi_nt37801_amoled_dsc_10b_video
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_cmd_spr
&dsi_nt37801_amoled_vid_spr
&dsi_nt37801_amoled_qsync_cmd
&dsi_nt37801_amoled_qsync_video
&dsi_nt37801_amoled_fhd_plus_cmd
@@ -292,6 +306,7 @@
&dsi_nt37801_amoled_cmd_cphy
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_cmd_spr>;
&dsi_nt37801_amoled_cmd_spr
&dsi_nt37801_amoled_vid_spr>;
};
};

View File

@@ -10,6 +10,7 @@
#include "dsi-panel-nt37801-dsc-10bit-cmd.dtsi"
#include "dsi-panel-nt37801-dsc-10bit-video.dtsi"
#include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi"
#include "dsi-panel-nt37801-dsc-wqhd-plus-video-spr.dtsi"
#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi"
#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi"
#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi"
@@ -564,6 +565,26 @@
};
};
&dsi_nt37801_amoled_vid_spr {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
0b 0a 02 04 00 21 0f];
qcom,display-topology = <2 2 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_nt37801_amoled_qsync_cmd {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";

View File

@@ -97,6 +97,16 @@
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_nt37801_amoled_vid_spr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_nt37801_amoled_qsync_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
@@ -264,6 +274,7 @@
&dsi_nt37801_amoled_dsc_10b_cmd
&dsi_nt37801_amoled_dsc_10b_video
&dsi_nt37801_amoled_cmd_spr
&dsi_nt37801_amoled_vid_spr
&dsi_nt37801_amoled_qsync_cmd
&dsi_nt37801_amoled_qsync_video
&dsi_nt37801_amoled_fhd_plus_cmd
@@ -277,5 +288,6 @@
&dsi_nt37801_amoled_cmd_cphy
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_cmd_spr>;
&dsi_nt37801_amoled_cmd_spr
&dsi_nt37801_amoled_vid_spr>;
};

View File

@@ -63,6 +63,15 @@
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_nt37801_amoled_vid_spr {
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_vtdr6130_amoled_120hz_video {
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
@@ -158,7 +167,8 @@
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_dsc_10b_video
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_cmd_spr>;
&dsi_nt37801_amoled_cmd_spr
&dsi_nt37801_amoled_vid_spr>;
};
};
@@ -169,6 +179,7 @@
&dsi_nt37801_amoled_cmd_cphy
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_cmd_spr>;
&dsi_nt37801_amoled_cmd_spr
&dsi_nt37801_amoled_vid_spr>;
};
};

View File

@@ -32,6 +32,15 @@
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_nt37801_amoled_vid_spr {
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_sim_panel_au {
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
@@ -84,6 +93,7 @@
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_dsc_10b_video
&dsi_nt37801_amoled_cmd_spr>;
&dsi_nt37801_amoled_cmd_spr
&dsi_nt37801_amoled_vid_spr>;
};
};