From 78d7547e4ab7c891cad081c67351c96c8d373e62 Mon Sep 17 00:00:00 2001
From: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
Date: Tue, 26 Mar 2024 16:22:47 -0700
Subject: [PATCH] ARM: dts: msm: Add register entry to ssusb in sun

Adding a 4-byte register entry for tcsr_dyn-en-dis to enable/disable USB
dynamically from dwc3-msm-core.

Change-Id: If9c2aa8f91c4067483e0e917ca7e84d4a6894cd5
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
---
 qcom/sun-usb.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/qcom/sun-usb.dtsi b/qcom/sun-usb.dtsi
index 0a0d8f5e..d8a1d1cb 100644
--- a/qcom/sun-usb.dtsi
+++ b/qcom/sun-usb.dtsi
@@ -9,8 +9,10 @@
 &soc {
 	usb0: ssusb@a600000 {
 		compatible = "qcom,dwc-usb3-msm";
-		reg = <0xa600000 0x100000>;
-		reg-names = "core_base";
+		reg = <0xa600000 0x100000>,
+			<0x1fc6000 0x4>;
+		reg-names = "core_base",
+			"tcsr_dyn_en_dis";
 
 		#address-cells = <2>;
 		#size-cells = <2>;