From 78c03916feb50972214efd6f628e90169e230a58 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 25 Feb 2025 19:50:24 +0530 Subject: [PATCH] ARM: dts: msm: update clk div factor entry for TX and VA macros Update clk div factor entries for TX and VA macros to reflect proper HW configuration. Change-Id: Ic5456d7e30245a484b6a4888835c7e6f838eb92b Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-overlay.dtsi | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index ceea5f64..a3f4786c 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -32,8 +32,20 @@ compatible = "qcom,lpass-cdc-va-macro"; clock-names = "lpass_audio_hw_vote"; clocks = <&lpass_audio_hw_vote 0>; - qcom,va-dmic-sample-rate = <600000>; qcom,va-clk-mux-select = <1>; + /* + * Clk divding factors for each DMIC pair. + * Valid entries for each DMIC pair: + * 2, 3, 4, 6, 8, 16 + * + * These factors are translated to corresponding config values + * for the following registers, + * -- LPASS_VA_TOP_CSR_DMIC0_CTL, + * -- LPASS_VA_TOP_CSR_DMIC1_CTL, + * -- LPASS_VA_TOP_CSR_DMIC2_CTL, + * -- LPASS_VA_TOP_CSR_DMIC3_CTL, + */ + qcom,va-dmic-clk-div-factor = <16 16 16 16>; qcom,default-clk-id = ; qcom,use-clk-id = ; qcom,is-used-swr-gpio = <1>; @@ -82,7 +94,19 @@ tx_macro: tx-macro@6AE0000 { compatible = "qcom,lpass-cdc-tx-macro"; qcom,default-clk-id = ; - qcom,tx-dmic-sample-rate = <2400000>; + /* + * Clk divding factors for each DMIC pair. + * Valid entries for each DMIC pair: + * 2, 3, 4, 6, 8, 16 + * + * These factors are translated to corresponding config values + * for the following registers, + * -- LPASS_VA_TOP_CSR_DMIC0_CTL, + * -- LPASS_VA_TOP_CSR_DMIC1_CTL, + * -- LPASS_VA_TOP_CSR_DMIC2_CTL, + * -- LPASS_VA_TOP_CSR_DMIC3_CTL, + */ + qcom,tx-dmic-clk-div-factor = <4 4 4 4>; qcom,is-used-swr-gpio = <0>; };