samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge "arm64: dts: msm: Update iommu address field in DT"

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This commit is contained in:
qctecmdr
2024-03-21 04:27:21 -07:00
committed by Gerrit - the friendly Code Review server
parent 3969e073bd d6c8f03029
commit 76b52ca390
2 changed files with 5 additions and 19 deletions
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6
sun/sun-dsp-trustedvm.dtsi
View File

@@ -2,11 +2,15 @@
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
&soc { &soc {
fastrpc_gen_pool_region : fastrpc_gen_pool_region {
iommu-addresses = <&fastrpc_compute_cb1 0x8000 0x11000>;
};
fastrpc_compute_cb1: compute-cb@13 { fastrpc_compute_cb1: compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb"; compatible = "qcom,fastrpc-compute-cb";
reg = <11>; reg = <11>;
iommus = <&apps_smmu 0xC0B 0x0>; iommus = <&apps_smmu 0xC0B 0x0>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; memory-region = <&fastrpc_gen_pool_region>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qrtr-gen-pool = <&fastrpc_compute_cb1>; qrtr-gen-pool = <&fastrpc_compute_cb1>;

18
sun/sun-dsp.dtsi
View File

@@ -12,7 +12,6 @@
reg = <3>; reg = <3>;
iommus = <&apps_smmu 0x1003 0x0080>, iommus = <&apps_smmu 0x1003 0x0080>,
<&apps_smmu 0x1043 0x0020>; <&apps_smmu 0x1043 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -24,7 +23,6 @@
reg = <4>; reg = <4>;
iommus = <&apps_smmu 0x1004 0x0080>, iommus = <&apps_smmu 0x1004 0x0080>,
<&apps_smmu 0x1044 0x0020>; <&apps_smmu 0x1044 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,nsessions = <8>; qcom,nsessions = <8>;
dma-coherent; dma-coherent;
@@ -37,7 +35,6 @@
reg = <5>; reg = <5>;
iommus = <&apps_smmu 0x1005 0x0080>, iommus = <&apps_smmu 0x1005 0x0080>,
<&apps_smmu 0x1045 0x0020>; <&apps_smmu 0x1045 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -49,7 +46,6 @@
reg = <6>; reg = <6>;
iommus = <&apps_smmu 0x1006 0x0080>, iommus = <&apps_smmu 0x1006 0x0080>,
<&apps_smmu 0x1046 0x0020>; <&apps_smmu 0x1046 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -62,7 +58,6 @@
iommus = <&apps_smmu 0x1007 0x0040>, iommus = <&apps_smmu 0x1007 0x0040>,
<&apps_smmu 0x1067 0x0000>, <&apps_smmu 0x1067 0x0000>,
<&apps_smmu 0x1087 0x0000>; <&apps_smmu 0x1087 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -75,7 +70,6 @@
reg = <8>; reg = <8>;
iommus = <&apps_smmu 0x1008 0x0080>, iommus = <&apps_smmu 0x1008 0x0080>,
<&apps_smmu 0x1048 0x0020>; <&apps_smmu 0x1048 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -101,7 +95,6 @@
iommus = <&apps_smmu 0x19C1 0x0000>, iommus = <&apps_smmu 0x19C1 0x0000>,
<&apps_smmu 0x0C21 0x0000>, <&apps_smmu 0x0C21 0x0000>,
<&apps_smmu 0x0C01 0x0040>; <&apps_smmu 0x0C01 0x0040>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -115,7 +108,6 @@
<&apps_smmu 0x0C02 0x0020>, <&apps_smmu 0x0C02 0x0020>,
<&apps_smmu 0x0C42 0x0000>, <&apps_smmu 0x0C42 0x0000>,
<&apps_smmu 0x19C2 0x0000>; <&apps_smmu 0x19C2 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -130,7 +122,6 @@
<&apps_smmu 0x0C23 0x0000>, <&apps_smmu 0x0C23 0x0000>,
<&apps_smmu 0x0C03 0x0040>, <&apps_smmu 0x0C03 0x0040>,
<&apps_smmu 0x19C3 0x0000>; <&apps_smmu 0x19C3 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -145,7 +136,6 @@
<&apps_smmu 0x0C24 0x0000>, <&apps_smmu 0x0C24 0x0000>,
<&apps_smmu 0x0C04 0x0040>, <&apps_smmu 0x0C04 0x0040>,
<&apps_smmu 0x19C4 0x0000>; <&apps_smmu 0x19C4 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -160,7 +150,6 @@
<&apps_smmu 0x0C25 0x0000>, <&apps_smmu 0x0C25 0x0000>,
<&apps_smmu 0x0C05 0x0040>, <&apps_smmu 0x0C05 0x0040>,
<&apps_smmu 0x19C5 0x0000>; <&apps_smmu 0x19C5 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -175,7 +164,6 @@
<&apps_smmu 0x0C06 0x0020>, <&apps_smmu 0x0C06 0x0020>,
<&apps_smmu 0x0C46 0x0000>, <&apps_smmu 0x0C46 0x0000>,
<&apps_smmu 0x19C6 0x0000>; <&apps_smmu 0x19C6 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -190,7 +178,6 @@
<&apps_smmu 0x0C27 0x0000>, <&apps_smmu 0x0C27 0x0000>,
<&apps_smmu 0x0C07 0x0040>, <&apps_smmu 0x0C07 0x0040>,
<&apps_smmu 0x19C7 0x0000>; <&apps_smmu 0x19C7 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -205,7 +192,6 @@
<&apps_smmu 0x0C08 0x0020>, <&apps_smmu 0x0C08 0x0020>,
<&apps_smmu 0x0C48 0x0000>, <&apps_smmu 0x0C48 0x0000>,
<&apps_smmu 0x19C8 0x0000>; <&apps_smmu 0x19C8 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -221,7 +207,6 @@
<&apps_smmu 0x0C29 0x0000>, <&apps_smmu 0x0C29 0x0000>,
<&apps_smmu 0x0C09 0x0040>, <&apps_smmu 0x0C09 0x0040>,
<&apps_smmu 0x19C9 0x0000>; <&apps_smmu 0x19C9 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
qcom,nsessions = <3>; qcom,nsessions = <3>;
@@ -237,7 +222,6 @@
<&apps_smmu 0x0C2C 0x0000>, <&apps_smmu 0x0C2C 0x0000>,
<&apps_smmu 0x0C0C 0x0040>, <&apps_smmu 0x0C0C 0x0040>,
<&apps_smmu 0x19CC 0x0000>; <&apps_smmu 0x19CC 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -253,7 +237,6 @@
<&apps_smmu 0x0C2E 0x0000>, <&apps_smmu 0x0C2E 0x0000>,
<&apps_smmu 0x0C4D 0x0000>, <&apps_smmu 0x0C4D 0x0000>,
<&apps_smmu 0x19CD 0x0000>; <&apps_smmu 0x19CD 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;
@@ -267,7 +250,6 @@
iommus = <&apps_smmu 0x196E 0x0000>, iommus = <&apps_smmu 0x196E 0x0000>,
<&apps_smmu 0x0C0E 0x0040>, <&apps_smmu 0x0C0E 0x0040>,
<&apps_smmu 0x19CE 0x0000>; <&apps_smmu 0x19CE 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent; dma-coherent;
qcom,iova-best-fit; qcom,iova-best-fit;