From 15a824df869b360464aa8162883b342ca2143be1 Mon Sep 17 00:00:00 2001
From: Patrick Daly <quic_pdaly@quicinc.com>
Date: Tue, 18 Apr 2023 14:47:47 -0700
Subject: [PATCH 1/2] ARM: dts: msm: Add memory map v1 for sun

Describe the chip memory map.

Change-Id: I44b4113a1c646072a744a0f7526d9b966b4595f4
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
---
 qcom/sun.dtsi | 228 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 228 insertions(+)

diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index 0d59c70e..655bcf61 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -236,3 +236,231 @@
 	};
 };
 
+&reserved_memory {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	gunyah_hyp_mem: gunyah_hyp_region@80000000 {
+		no-map;
+		reg = <0x0 0x80000000 0x0 0xe00000>;
+	};
+
+	cpusys_vm_mem: cpusys_vm_region@80e00000 {
+		no-map;
+		reg = <0x0 0x80e00000 0x0 0x400000>;
+	};
+
+	cpucp_mem: cpucp_region@81200000 {
+		no-map;
+		reg = <0x0 0x81200000 0x0 0x200000>;
+	};
+
+	/*
+	 * hyp_tags_mem is dynamically removed from the RAM
+	 * partition tables before boot occurs. Size of region
+	 * varies.
+	 */
+
+	/* merged xbl_dtlog, xbl_ramdump and aop_image regions */
+	xbl_aop_merged_mem: xbl_aop_merged_region@81a00000 {
+		no-map;
+		reg = <0x0 0x81a00000 0x0 0x260000>;
+	};
+
+	aop_cmd_db_mem: aop_cmd_db_region@81c60000 {
+		compatible = "qcom,cmd-db";
+		no-map;
+		reg = <0x0 0x81c60000 0x0 0x20000>;
+	};
+
+	/* merged aop_config, tme_crash_dump, tme_log and uefi_log regions */
+	aop_tme_uefi_merged_mem: aop_tme_uefi_merged_region@81c80000 {
+		no-map;
+		reg = <0x0 0x81c80000 0x0 0x74000>;
+	};
+
+	/* secdata region can be reused by apps */
+
+	smem_mem: smem_region@81d00000 {
+		no-map;
+		reg = <0x0 0x81d00000 0x0 0x200000>;
+	};
+
+	adsp_mhi_mem: adsp_mhi_region@81f00000 {
+		no-map;
+		reg = <0x0 0x81f00000 0x0 0x20000>;
+	};
+
+	cpucp_scandump_mem: cpucp_scandump_region@81f20000 {
+		no-map;
+		reg = <0x0 0x81f20000 0x0 0x380000>;
+	};
+
+	pdp_ns_shared_mem: pdp_ns_shared_region@822a0000 {
+		no-map;
+		reg = <0x0 0x822a0000 0x0 0x100000>;
+	};
+
+	soccp_sdi_mem: soccp_sdi_region@823a0000 {
+		no-map;
+		reg = <0x0 0x823a0000 0x0 0x40000>;
+	};
+
+	pmic_minii_dump_mem: pmic_minii_dump_region@823e0000 {
+		no-map;
+		reg = <0x0 0x823e0000 0x0 0x80000>;
+	};
+
+	pvm_fw_mem: pvm_fw_region@824a0000 {
+		no-map;
+		reg = <0x0 0x824a0000 0x0 0x100000>;
+	};
+
+	/* hyp_mem_database_mem is removed by HYP in the RAM partition table */
+
+	global_sync_mem: global_sync_region@82600000 {
+		no-map;
+		reg = <0x0 0x82600000 0x0 0x100000>;
+	};
+
+	tz_stat_mem: tz_stat_region@82700000 {
+		no-map;
+		reg = <0x0 0x82700000 0x0 0x100000>;
+	};
+
+	qdss_apps_mem: qdss_apps_region@82800000 {
+		compatible = "shared-dma-pool";
+		reg = <0x0 0x82800000 0x0 0x2000000>;
+		reusable;
+	};
+
+	dsm_partition_1_mem: dsm_partition_1_region@86b00000 {
+		no-map;
+		reg = <0x0 0x86b00000 0x0 0x4900000>;
+	};
+
+	dsm_partition_2_mem: dsm_partition_2_region@8b400000 {
+		no-map;
+		reg = <0x0 0x8b400000 0x0 0x800000>;
+	};
+
+	mpss_mem: mpss_region@8bc00000 {
+		no-map;
+		reg = <0x0 0x8bc00000 0x0 0xf400000>;
+	};
+
+	q6_mpss_dtb_mem: q6_mpss_dtb_region@9b000000 {
+		no-map;
+		reg = <0x0 0x9b000000 0x0 0x80000>;
+	};
+
+	ipa_fw_mem: ipa_fw_region@9b080000 {
+		no-map;
+		reg = <0x0 0x9b080000 0x0 0x10000>;
+	};
+
+	ipa_gsi_mem: ipa_gsi_region@9b090000 {
+		no-map;
+		reg = <0x0 0x9b090000 0x0 0xa000>;
+	};
+
+	gpu_microcode_mem: gpu_microcode_region@9b09a000 {
+		no-map;
+		reg = <0x0 0x9b09a000 0x0 0x2000>;
+	};
+
+	spss_region_mem: spss_region_region@9b100000 {
+		no-map;
+		reg = <0x0 0x9b100000 0x0 0x180000>;
+	};
+
+	spu_secure_shared_memory_mem: spu_secure_shared_memory_region@9b280000 {
+		no-map;
+		reg = <0x0 0x9b280000 0x0 0x80000>;
+	};
+
+	camera_mem: camera_region@9b300000 {
+		no-map;
+		reg = <0x0 0x9b300000 0x0 0x800000>;
+	};
+
+	video_mem: video_region@9bb00000 {
+		no-map;
+		reg = <0x0 0x9bb00000 0x0 0x800000>;
+	};
+
+	cvp_mem: cvp_region@9c300000 {
+		no-map;
+		reg = <0x0 0x9c300000 0x0 0x700000>;
+	};
+
+	cdsp_mem: cdsp_region@9ca00000 {
+		no-map;
+		reg = <0x0 0x9ca00000 0x0 0x2000000>;
+	};
+
+	q6_cdsp_dtb_mem: q6_cdsp_dtb_region@9ea00000 {
+		no-map;
+		reg = <0x0 0x9ea00000 0x0 0x80000>;
+	};
+
+	q6_adsp_dtb_mem: q6_adsp_dtb_region@9ea80000 {
+		no-map;
+		reg = <0x0 0x9ea80000 0x0 0x80000>;
+	};
+
+	adspslpi_mem: adspslpi_region@9eb00000 {
+		no-map;
+		reg = <0x0 0x9eb00000 0x0 0x4080000>;
+	};
+
+	soccp_mem: soccp_region@a2b80000 {
+		no-map;
+		reg = <0x0 0xa2b80000 0x0 0x100000>;
+	};
+
+	/* uefi region can be reused by apps */
+
+	/* Linux kernel image is loaded at 0xa8000000 */
+
+	/* merged tz_reserved, xbl_sc, and qtee regions */
+	tz_merged_mem: tz_merged_region@d8000000 {
+		no-map;
+		reg = <0x0 0xd8000000 0x0 0x600000>;
+	};
+
+	/*
+	 * ta/tags mem is dynamically removed from the RAM
+	 * partition tables before boot occurs. Size of region
+	 * varies.
+	 */
+
+	trust_ui_vm_mem: trust_ui_vm_region@f3800000 {
+		compatible = "shared-dma-pool";
+		reg = <0x0 0xf3800000 0x0 0x4400000>;
+		reusable;
+		alignment = <0x0 0x400000>;
+	};
+
+	oem_vm_mem: oem_vm_region@f7c00000 {
+		compatible = "shared-dma-pool";
+		reg = <0x0 0xf7c00000 0x0 0x4c00000>;
+		reusable;
+		alignment = <0x0 0x400000>;
+	};
+
+	llcc_lpi_mem: llcc_lpi_region@ff800000 {
+		no-map;
+		reg = <0x0 0xff800000 0x0 0x800000>;
+	};
+
+	system_cma: linux,cma {
+		compatible = "shared-dma-pool";
+		alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
+		reusable;
+		alignment = <0x0 0x400000>;
+		size = <0x0 0x400000>;
+		linux,cma-default;
+	};
+};

From a93a4ec33dba41db0aee42c1e6502951437930e5 Mon Sep 17 00:00:00 2001
From: Patrick Daly <quic_pdaly@quicinc.com>
Date: Tue, 18 Apr 2023 14:49:17 -0700
Subject: [PATCH 2/2] ARM: dts: msm: Add arm-smmu device for sun

Describe the registers and interrupts of the arm-smmu device.

Change-Id: Ib228045ccfdc4a16204428b9bdbf7e1d6ff06a92
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
---
 qcom/msm-arm-smmu-sun.dtsi | 133 +++++++++++++++++++++++++++++++++++++
 qcom/sun.dtsi              |   2 +
 2 files changed, 135 insertions(+)
 create mode 100644 qcom/msm-arm-smmu-sun.dtsi

diff --git a/qcom/msm-arm-smmu-sun.dtsi b/qcom/msm-arm-smmu-sun.dtsi
new file mode 100644
index 00000000..3323bc4d
--- /dev/null
+++ b/qcom/msm-arm-smmu-sun.dtsi
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&soc {
+	apps_smmu: apps-smmu@15000000 {
+		compatible = "arm,smmu-v2";
+		reg = <0x15000000 0x100000>;
+		#iommu-cells = <2>;
+		#global-interrupts = <1>;
+		dma-coherent;
+
+		interrupts =	<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>,
+				/* cb interrupts above 96 are not functional yet */
+				<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 493 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH>,
+				/* cb interrupt 108 missing data on ipcat; set it to 499 */
+				<GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+};
diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index 655bcf61..95ed9ebc 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -464,3 +464,5 @@
 		linux,cma-default;
 	};
 };
+
+#include "msm-arm-smmu-sun.dtsi"