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ARM: dts: msm: add 111 topology support for VTDR6130 panel on Kera

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Add 111 topology support for VTDR6130 panel on Kera target.

Change-Id: I4daae3b5f1db36eec8b256a1c8e53540f39c8e1b
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This commit is contained in:
Abhinav Saurabh
2025-01-13 15:07:32 +05:30
committed by lnxdisplay
parent 53d4aef404
commit 7364fffb72
1 changed files with 23 additions and 12 deletions
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35
display/kera-sde-display-common.dtsi
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@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "dsi-panel-sim-cmd.dtsi"
@@ -137,7 +137,8 @@
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
07 08 02 04 00 19 0c];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>;
};
@@ -145,7 +146,8 @@
timing@1 {
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
07 08 02 04 00 19 0c];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>;
};
@@ -153,7 +155,8 @@
timing@2 {
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
07 08 02 04 00 19 0c];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>;
};
@@ -161,7 +164,8 @@
timing@3 {
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
07 08 02 04 00 19 0c];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>;
};
@@ -192,7 +196,8 @@
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
07 08 02 04 00 19 0c];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
qcom,dsi-dyn-clk-list = <847480320 844537680 841595040>;
};
@@ -216,21 +221,24 @@
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07
06 07 02 04 00 16 0b];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
};
timing@1 {
qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07
06 07 02 04 00 16 0b];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
};
timing@2 {
qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07
06 07 02 04 00 16 0b];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
};
};
@@ -257,7 +265,8 @@
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07
06 07 02 04 00 16 0b];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
};
};
@@ -383,7 +392,8 @@
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
07 08 02 04 00 19 0c];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
};
};
@@ -405,7 +415,8 @@
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
07 08 02 04 00 19 0c];
qcom,display-topology = <2 2 1>;
qcom,display-topology = <2 2 1>,
<1 1 1>;
qcom,default-topology-index = <0>;
};
};