From 4264c3a1d5c78a807d8016241b08a3e99144f968 Mon Sep 17 00:00:00 2001 From: Tingguo Cheng Date: Tue, 11 Feb 2025 15:55:49 +0800 Subject: [PATCH 01/12] ARM: dts: msm: Update slave address of smb1393 for Kera qrd Update the slave address for slave charger debug support. As well as update the slave address for glink adc channels to fix reading I/O errors. Change-Id: If1a0725aeeb1a67d7a19a3a5629ca2be44ff674c Signed-off-by: Tingguo Cheng --- qcom/kera-qrd.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/qcom/kera-qrd.dtsi b/qcom/kera-qrd.dtsi index 97e04abe..ef35eedf 100644 --- a/qcom/kera-qrd.dtsi +++ b/qcom/kera-qrd.dtsi @@ -80,9 +80,9 @@ #size-cells = <0>; qcom,bus-type = "i2c"; - qcom,smb1393@34 { + qcom,smb1393@35 { compatible = "qcom,i2c-pmic"; - reg = <0x34>; + reg = <0x35>; qcom,can-sleep; }; }; @@ -92,17 +92,17 @@ status = "ok"; smb1393_1_iin { - reg = <0x1053401>; + reg = <0x1053501>; label = "smb1393_1_iin"; }; smb1393_1_ichg { - reg = <0x1053402>; + reg = <0x1053502>; label = "smb1393_1_ichg"; }; smb1393_1_die_temp { - reg = <0x1053403>; + reg = <0x1053503>; label = "smb1393_1_die_temp"; }; }; From c7cb6a9a924196ca27de73cd7b662b9476dda4a2 Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Mon, 30 Dec 2024 11:50:10 +0530 Subject: [PATCH 02/12] ARM: dts: qcom: Add stats and sys-pm-vx devices for sdxkova Add devices to track CPU LPMs, SoC level LPMs, and system pm violators. Change-Id: I65a0dfeb814b47bdfcc4468ec8f1e7f63338581c Signed-off-by: Sneh Mankad --- qcom/sdxkova.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi index 5eee344a..a2945014 100644 --- a/qcom/sdxkova.dtsi +++ b/qcom/sdxkova.dtsi @@ -298,6 +298,29 @@ compatible = "qcom,sdxkova-pcie-pdc", "qcom,pcie-pdc"; reg = <0x0 0xb2b0000 0x0 0x30000>; }; + + cpuss-sleep-stats@17800054 { + compatible = "qcom,cpuss-sleep-stats-v2"; + reg = <0x0 0x17800054 0x0 0x4>, <0x0 0x17810054 0x0 0x4>, <0x0 0x17820054 0x0 0x4>, + <0x0 0x17830054 0x0 0x4>, <0x0 0x17880098 0x0 0x4>, <0x0 0x178c0000 0x0 0x10000>; + reg-names = "seq_lpm_cntr_cfg_cpu0", "seq_lpm_cntr_cfg_cpu1", + "seq_lpm_cntr_cfg_cpu2", "seq_lpm_cntr_cfg_cpu3", + "l3_seq_lpm_cntr_cfg", "apss_seq_mem_base"; + num-cpus = <4>; + }; + + sram@c3f0000 { + compatible = "qcom,rpmh-stats-v4"; + reg = <0x0 0xc3f0000 0x0 0x400>; + qcom,qmp = <&aoss_qmp>; + ss-name = "modem", "apss"; + }; + + sys-pm-vx@c300000 { + compatible = "qcom,sys-pm-violators", "qcom,sys-pm-sdxkova"; + reg = <0x0 0xc300000 0x0 0x400>; + qcom,qmp = <&aoss_qmp>; + }; }; firmware: firmware { }; From a52b4bbdb500694fb4958f67252824715d26f3ee Mon Sep 17 00:00:00 2001 From: Brindha T Date: Mon, 6 Jan 2025 15:59:15 +0530 Subject: [PATCH 03/12] dt-bindings: soc: qcom: Add qcom,pmic-ecid bindings Add bindings documentation for qcom,pmic-ecid. PMIC ECID provides the PMIC specific information for identification. Change-Id: I012670359ad1b1c4aea92f59b9430efc6e446f5f Signed-off-by: Brindha T --- bindings/soc/qcom/qcom,pmic-ecid.yaml | 45 +++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 bindings/soc/qcom/qcom,pmic-ecid.yaml diff --git a/bindings/soc/qcom/qcom,pmic-ecid.yaml b/bindings/soc/qcom/qcom,pmic-ecid.yaml new file mode 100644 index 00000000..9a037f07 --- /dev/null +++ b/bindings/soc/qcom/qcom,pmic-ecid.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,pmic-ecid.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm PMIC ECID Identification + +maintainers: + - Brindha T + +description: | + PMIC ECID (Exclusive Chip Identifier) device to provide information on PMIC specific part identification. + +properties: + compatible: + const: qcom,pmic-ecid + + reg: + description: Specifies the SPMI base address of PMIC ECID + maxItems: 1 + + qcom,pmic-name: + $ref: /schemas/types.yaml#/definitions/string + description: Specifies the PMIC name + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pmic { + #address-cells = <1>; + #size-cells = <0>; + + qcom-pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550"; + }; + }; +... From 285a63e7b40cab18bcb44dd7fc309ba5b43ec2f3 Mon Sep 17 00:00:00 2001 From: Yingchao Deng Date: Wed, 26 Feb 2025 16:03:49 +0800 Subject: [PATCH 04/12] ARM: dts: msm: Reserve 16kb to dcc on TZ for kera Reserve 16kb to dcc on TZ while HLOS have 16 KB. Change-Id: I2063be0924b5719bd2c3abfffc84c0044d74ae37 Signed-off-by: Yingchao Deng --- qcom/kera-debug.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qcom/kera-debug.dtsi b/qcom/kera-debug.dtsi index 0106841b..13c1d501 100644 --- a/qcom/kera-debug.dtsi +++ b/qcom/kera-debug.dtsi @@ -20,12 +20,12 @@ dcc: dcc_v2@100ff000 { compatible = "qcom,dcc-v2"; reg = <0x100ff000 0x1000>, - <0x10080000 0x8000>; + <0x10084000 0x4000>; qcom,transaction_timeout = <0>; reg-names = "dcc-base", "dcc-ram-base"; - dcc-ram-offset = <0x0>; + dcc-ram-offset = <0x4000>; }; mem_dump { From 2e2af38cfe603f727483251f640e41166540a0be Mon Sep 17 00:00:00 2001 From: Uttkarsh Aggarwal Date: Thu, 27 Feb 2025 13:40:02 +0530 Subject: [PATCH 05/12] ARM: dts: msm: add qcom,pm-qos-latency for kera It will help for USB KPI. Change-Id: Icd313491c6228095a02144ba4473a5a61fb96f80 Signed-off-by: Uttkarsh Aggarwal --- qcom/kera-usb.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/qcom/kera-usb.dtsi b/qcom/kera-usb.dtsi index 040524c8..07792752 100644 --- a/qcom/kera-usb.dtsi +++ b/qcom/kera-usb.dtsi @@ -41,6 +41,7 @@ qcom,core-clk-rate = <200000000>; qcom,core-clk-rate-hs = <66666667>; qcom,core-clk-rate-disconnected = <133333333>; + qcom,pm-qos-latency = <2>; qcom,use-pdc-interrupts; qcom,use-eusb2-phy; From e5bd2c80c24bc549204c25c7a1526807482726af Mon Sep 17 00:00:00 2001 From: Saranya R Date: Thu, 20 Feb 2025 12:22:33 +0530 Subject: [PATCH 06/12] dt-bindings: nvmem: Add parrot qfprom compatible string Add parrot qfprom compatible string so that data can be attached to it in the driver. Change-Id: Ib69c0438446f6493d4a66c3453f1a878ccc0b10a Signed-off-by: Saranya R --- bindings/nvmem/qcom,qfprom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/bindings/nvmem/qcom,qfprom.yaml b/bindings/nvmem/qcom,qfprom.yaml index 93199018..2018e344 100644 --- a/bindings/nvmem/qcom,qfprom.yaml +++ b/bindings/nvmem/qcom,qfprom.yaml @@ -24,6 +24,7 @@ properties: - qcom,msm8996-qfprom - qcom,msm8998-qfprom - qcom,qcs404-qfprom + - qcom,parrot-qfprom - qcom,sc7180-qfprom - qcom,sc7280-qfprom - qcom,sdm630-qfprom From 70ca685e86a1a87a2ff187914e874915596672e8 Mon Sep 17 00:00:00 2001 From: Shivangi Kesharwani Date: Sun, 16 Feb 2025 13:51:41 -0800 Subject: [PATCH 07/12] ARM: dts: msm: Add HWKM node Add dtsi node to enable Hardware key manager for monaco target. And add the device tree bindings for the Hardware key manager driver. Change-Id: If1e38c3c71148fd85058eb31d4eee5f806e47fef Signed-off-by: Shivangi Kesharwani --- bindings/firmware/qcom,hwkm.yaml | 57 ++++++++++++++++++++++++++++++++ qcom/monaco.dtsi | 12 ++++++- 2 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 bindings/firmware/qcom,hwkm.yaml diff --git a/bindings/firmware/qcom,hwkm.yaml b/bindings/firmware/qcom,hwkm.yaml new file mode 100644 index 00000000..cd313e8a --- /dev/null +++ b/bindings/firmware/qcom,hwkm.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/qcom,hwkm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HWKM (Hardware Key Manager) + +maintainers: + - Neeraj Soni + - Debraj Mukhopadhyay + - Gaurav Kashyap + +description: | + The HWKM driver is a platform device driver that helps + communicating with both the master and slave blocks of the + hardware key manager to issue commands to perform key operations + mainly required for storage encryption. + +properties: + compatible: + const: "qcom,hwkm" + + reg: + description: | + Register set for both master and slaves. + + reg-names: + description: | + Identifiers for parsing master and slave regs. + + clocks: + description: | + clocks needed for operating master and the slave. + + clock-names: + description: | + name identifiers corresponding to the clocks. + qcom,enable-hwkm-clk: to ensure clocks can be handled by HLOS. + qcom,op-freq-hz: Max frequency of the listed clocks. + +required: + - compatible + +additionalProperties: false + +examples: + - | + qcom_hwkm: hwkm@10c0000 { + compatible = "qcom,hwkm"; + reg = <0x10c0000 0x9000>, <0x1d90000 0x9000>; + reg-names = "km_master", "ice_slave"; + qcom,enable-hwkm-clk; + clock-names = "km_clk_src"; + clocks = <&clock_rpmh RPMH_HWKM_CLK>; + qcom,op-freq-hz = <75000000>; + }; diff --git a/qcom/monaco.dtsi b/qcom/monaco.dtsi index 66587965..8caec9be 100644 --- a/qcom/monaco.dtsi +++ b/qcom/monaco.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -611,6 +611,16 @@ compatible = "qcom,smcinvoke"; }; + qcom_hwkm: hwkm@4440000 { + compatible = "qcom,hwkm"; + reg = <0x4440000 0x9000>; + reg-names = "km_master"; + qcom,enable-hwkm-clk; + clock-names = "km_clk_src"; + clocks = <&rpmcc RPM_SMD_HWKM_CLK>; + qcom,op-freq-hz = <75000000>; + }; + qcom_tzlog: tz-log@c125720 { compatible = "qcom,tz-log"; reg = <0xc125720 0x3000>; From ffcd57a92c4e912bc97955b38d035fa2e8f9b5f7 Mon Sep 17 00:00:00 2001 From: Saranya R Date: Thu, 16 Jan 2025 11:26:36 +0530 Subject: [PATCH 08/12] ARM: dts: msm: Add qfprom compatible string for parrot Add the soc-specific compatible string as it is required to apply appropriate keepout regions. Change-Id: I59fe0c9dffdf182bfb52468ef5a0d564ad7a8b38 Signed-off-by: Saranya R --- qcom/parrot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/parrot.dtsi b/qcom/parrot.dtsi index 1c9b60ba..b01a2cc7 100644 --- a/qcom/parrot.dtsi +++ b/qcom/parrot.dtsi @@ -2554,7 +2554,7 @@ qfprom: qfprom@221c8000 { - compatible = "qcom,qfprom"; + compatible = "qcom,parrot-qfprom", "qcom,qfprom"; reg = <0x221c8000 0x1000>; #address-cells = <1>; #size-cells = <1>; From a3a111ed9574de2c833252e46c7bb84ef6592816 Mon Sep 17 00:00:00 2001 From: Vivek Pernamitta Date: Thu, 16 Jan 2025 11:33:09 +0530 Subject: [PATCH 09/12] ARM: dts: msm: Increase pipe clock toggles during L1SS entry Increase the number of pipe clock toggles that will occur after phystatus goes high at the output of the PHY during L1SS/P2 entry in PCS_PCIE_POWER_STATE_CONFIG6 register, so that if the phy and controller goes out of sync this may help us. The number of pipe clock toggles is equal to (4*value)+1. Change-Id: I7a31882f18879ef990825aa2d978fc7f39233472 Signed-off-by: Vivek Pernamitta Signed-off-by: Krishna Chaitanya Chundru --- qcom/sun-pcie.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/qcom/sun-pcie.dtsi b/qcom/sun-pcie.dtsi index c46df45c..82952a8e 100644 --- a/qcom/sun-pcie.dtsi +++ b/qcom/sun-pcie.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -214,6 +214,7 @@ 0x0814 0x07 0x0 0x0820 0xc1 0x0 0x0894 0x00 0x0 + 0x08f8 0x1f 0x0 0x05d0 0x8c 0x0 0x0568 0x17 0x0 0x0570 0x2e 0x0 From 4285de821bab8fe823c25f2bacaf02c86f1ca97c Mon Sep 17 00:00:00 2001 From: songchai Date: Mon, 10 Feb 2025 17:07:51 +0800 Subject: [PATCH 10/12] Revert "ARM: dts: msm: add dcc registers into dt for tuna" This reverts commit f3fae6c2e9bdfd75b2d446012d98e8a099684e33. Change-Id: I59abb9129af619bec885cd2d52110070524b229d Signed-off-by: songchai --- qcom/tuna-debug.dtsi | 1325 ------------------------------------------ 1 file changed, 1325 deletions(-) diff --git a/qcom/tuna-debug.dtsi b/qcom/tuna-debug.dtsi index 9377c517..13c1d501 100644 --- a/qcom/tuna-debug.dtsi +++ b/qcom/tuna-debug.dtsi @@ -26,1331 +26,6 @@ reg-names = "dcc-base", "dcc-ram-base"; dcc-ram-offset = <0x4000>; - - link_list_0 { - qcom,curr-link-list = <6>; - qcom,data-sink = "sram"; - qcom,ap-qad-override; - qcom,link-list = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - - link_list_1 { - qcom,curr-link-list = <4>; - qcom,data-sink = "sram"; - qcom,ap-qad-override; - qcom,link-list = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - - link_list_2 { - qcom,curr-link-list = <3>; - qcom,data-sink = "sram"; - qcom,ap-qad-override; - qcom,link-list = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; }; mem_dump { From 3fb8ec2740e48b3f443028ecd8be43fcb166b533 Mon Sep 17 00:00:00 2001 From: Brindha T Date: Fri, 31 Jan 2025 19:46:24 +0530 Subject: [PATCH 11/12] ARM: dts: qcom: Add PMIC ECID devices for sun Add PMIC ECID (Exclusive Chip Identifier) changes to sun variants. Change-Id: I814b2c676d0b45791c8724a568a548039f18a7e0 Signed-off-by: Brindha T --- qcom/pm8010.dtsi | 14 +++++++++++++- qcom/pm8550.dtsi | 8 +++++++- qcom/pm8550ve.dtsi | 26 +++++++++++++++++++++++++- qcom/pm8550vs.dtsi | 38 +++++++++++++++++++++++++++++++++++++- qcom/pmd802x.dtsi | 8 +++++++- qcom/pmih010x.dtsi | 8 +++++++- qcom/pmk8550.dtsi | 8 +++++++- qcom/pmr735d.dtsi | 8 +++++++- 8 files changed, 110 insertions(+), 8 deletions(-) diff --git a/qcom/pm8010.dtsi b/qcom/pm8010.dtsi index 8f0821af..4337b92c 100644 --- a/qcom/pm8010.dtsi +++ b/qcom/pm8010.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -18,6 +18,12 @@ #address-cells = <1>; #size-cells = <0>; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8010_m"; + }; + pm8010m_tz: pm8010m-temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400>; @@ -32,6 +38,12 @@ #address-cells = <1>; #size-cells = <0>; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8010_n"; + }; + pm8010n_tz: pm8010n-temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400>; diff --git a/qcom/pm8550.dtsi b/qcom/pm8550.dtsi index 8a4da186..9aaeb604 100644 --- a/qcom/pm8550.dtsi +++ b/qcom/pm8550.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -19,6 +19,12 @@ #address-cells = <1>; #size-cells = <0>; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550"; + }; + pm8550_tz: pm8550-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; diff --git a/qcom/pm8550ve.dtsi b/qcom/pm8550ve.dtsi index 05649593..8ef3637a 100644 --- a/qcom/pm8550ve.dtsi +++ b/qcom/pm8550ve.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -19,6 +19,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550ve_d"; + }; + pm8550ve_d_tz: pm8550ve-d-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; @@ -43,6 +49,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550ve_f"; + }; + pm8550ve_f_tz: pm8550ve-f-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; @@ -67,6 +79,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550ve_g"; + }; + pm8550ve_g_tz: pm8550ve-g-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; @@ -91,6 +109,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550ve_i"; + }; + pm8550ve_i_tz: pm8550ve-i-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; diff --git a/qcom/pm8550vs.dtsi b/qcom/pm8550vs.dtsi index 00e704cc..e009cc8d 100644 --- a/qcom/pm8550vs.dtsi +++ b/qcom/pm8550vs.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -19,6 +19,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550vs_c"; + }; + pm8550vs_c_tz: pm8550vs-c-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; @@ -43,6 +49,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550vs_d"; + }; + pm8550vs_d_tz: pm8550vs-d-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; @@ -67,6 +79,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550vs_e"; + }; + pm8550vs_e_tz: pm8550vs-e-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; @@ -91,6 +109,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550vs_f"; + }; + pm8550vs_f_tz: pm8550vs-f-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; @@ -115,6 +139,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550vs_g"; + }; + pm8550vs_g_tz: pm8550vs-g-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; @@ -139,6 +169,12 @@ #size-cells = <0>; status = "disabled"; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pm8550vs_j"; + }; + pm8550vs_j_tz: pm8550vs-j-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; diff --git a/qcom/pmd802x.dtsi b/qcom/pmd802x.dtsi index 4bfae0c3..01876e9c 100644 --- a/qcom/pmd802x.dtsi +++ b/qcom/pmd802x.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -18,6 +18,12 @@ #address-cells = <1>; #size-cells = <0>; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pmd802x"; + }; + pmd802x_tz: pmd802x-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; diff --git a/qcom/pmih010x.dtsi b/qcom/pmih010x.dtsi index d35855b9..e024c91a 100644 --- a/qcom/pmih010x.dtsi +++ b/qcom/pmih010x.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -19,6 +19,12 @@ #address-cells = <1>; #size-cells = <0>; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pmih010x"; + }; + pmih010x_tz: pmih010x-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; diff --git a/qcom/pmk8550.dtsi b/qcom/pmk8550.dtsi index 6c15ff6f..53b8a139 100644 --- a/qcom/pmk8550.dtsi +++ b/qcom/pmk8550.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -24,6 +24,12 @@ #address-cells = <1>; #size-cells = <0>; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pmk8550"; + }; + pmk8550_sdam_1: sdam@7000 { compatible = "qcom,spmi-sdam"; reg = <0x7000>; diff --git a/qcom/pmr735d.dtsi b/qcom/pmr735d.dtsi index 9cbffcfe..28cb515a 100644 --- a/qcom/pmr735d.dtsi +++ b/qcom/pmr735d.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -18,6 +18,12 @@ #address-cells = <1>; #size-cells = <0>; + pmic-ecid@100 { + compatible = "qcom,pmic-ecid"; + reg = <0x100>; + qcom,pmic-name = "pmr735d"; + }; + pmr735d_tz: pmr735d-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; From 8b14c948559087e98b3bb41df859e835cb6586a7 Mon Sep 17 00:00:00 2001 From: Anvita T Date: Wed, 8 Jan 2025 11:47:48 +0530 Subject: [PATCH 12/12] dt-bindings: pci: qcom: Add MHI DT Bindings on sdxkova Add MHI device related DT bindings on sdxkova. Change-Id: I4bbdfc6e29555d6011cd474f5d0e54d9cd6517d7 Signed-off-by: Anvita T --- bindings/pci/qcom,msm_mhi_dev.yaml | 112 +++++++++++++++++++++++++ bindings/pci/qcom,msm_mhi_net_dev.yaml | 35 ++++++++ 2 files changed, 147 insertions(+) create mode 100644 bindings/pci/qcom,msm_mhi_dev.yaml create mode 100644 bindings/pci/qcom,msm_mhi_net_dev.yaml diff --git a/bindings/pci/qcom,msm_mhi_dev.yaml b/bindings/pci/qcom,msm_mhi_dev.yaml new file mode 100644 index 00000000..abfa4598 --- /dev/null +++ b/bindings/pci/qcom,msm_mhi_dev.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,msm_mhi_dev.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. (QTI) MSM MHI Device + +maintainers: + - Anvita T + +properties: + compatible: + enum: + - qcom,msm-mhi-dev + + reg: + minItems: 1 + items: + - description: MHI MMIO physical register space. + - description: IPA uC Command Ring doorbell mail box address. + - description: IPA uC Event Ring doorbell mail box address. + + reg-names: + minItems: 1 + items: + - const: mhi_mmio_base + - const: ipa_uc_mbox_crdb + - const: ipa_uc_mbox_erdb + + interrupts: + items: + - description: Interrupt line for the device. + + interrupt-names: + items: + - const: mhi-device-inta + + qcom,mhi-ifc-id: + description: ID of HW interface via which MHI on device side communicates with host side. + + qcom,mhi-ep-msi: + description: End point MSI number. + + qcom,mhi-version: + description: MHI specification version supported by the device. + + qcom,use-mhi-dma-software-channel: + description: Uses IPA hardware accelerated path for MHI software channel data transfers between host and device. + + qcom,mhi-config-iatu: + description: Maps the control and data region between host and device using iatu. + + qcom,mhi-interrupt: + description: Registers for mhi interrupt. + + qcom,mhi-local-pa-base: + description: The physical base address on the device used by the MHI device driver to map + the control and data region with the MHI driver on the host. This property is + required if iatu property qcom,mhi-config-iatu is present. + + qcom,enable-m2: + description: M2 autonomous is enabled. + + qcom,mhi-has-smmu: + description: Uses mapped address to route the doorbell addresses to IPA. + + qcom,mhi-num-ipc-pages-dev-fac: + description: Reduces the MHI ipc logging size based on the divisor factor. + This property also represents the divisor factor. + + qcom,no-m0-timeout: + description: Device waits for M0 state without any timeout period. + + mhi-virt-device-int-x: + description: To be used if the target supports virtual functions. + The property lists the interrupt number for the virtual functions. + Replace x with the appropriate interrupt number. + + qcom,use-pcie-edma: + description: Uses eDMA as DMA for MHI software channel data transfers between host and device. + + qcom,mhi-chan-hw-base: + description: If the target uses any other h/w channel than ch-100 as the start of the hardware + accelerated channel, then use this property to mention the start h/w channel. + + qcom,mhi-is-flashless: + description: If the target uses flashless boot (boot over PCIe) then mention this property. + +required: + - compatible + - reg + - reg-names + - qcom,mhi-ifc-id + - qcom,mhi-ep-msi + - qcom,mhi-version + +unevaluatedProperties: false + +examples: + - | + mhi: qcom,msm-mhi-dev { + compatible = "qcom,msm-mhi-dev"; + reg = <0xfc527000 0x1000>, + <0xfd4fa000 0x1>, + <0xfd4fa080 0x1>; + reg-names = "mhi_mmio_base", "ipa_uc_mbox_crdb","ipa_uc_mbox_erdb"; + qcom,mhi-ifc-id = <0x030017cb>; + qcom,mhi-ep-msi = <1>; + qcom,mhi-version = <0x1000000>; + }; + diff --git a/bindings/pci/qcom,msm_mhi_net_dev.yaml b/bindings/pci/qcom,msm_mhi_net_dev.yaml new file mode 100644 index 00000000..c15899d3 --- /dev/null +++ b/bindings/pci/qcom,msm_mhi_net_dev.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,msm_mhi_net_dev.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. (QTI) MSM MHI NET Device + +maintainers: + - Anvita T + +properties: + compatible: + enum: + - qcom,msm-mhi-dev-net + + qcom,mhi-ethernet-interface-ch-list: + description: Channels list which expects Ethernet packet parsing support. + + qcom,tx_rx_reqs: + description: If property present it will override the number of elements in + rx and tx queues for mhi_dev_net device.(Default:128) + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + qcom,mhi_net_dev { + compatible = "qcom,msm-mhi-dev-net"; + qcom,mhi-ethernet-interface; + }; +