ARM: dts: qcom: Add SPU related register to sun dtsi

Added SP PBL Patch Version Register to read the SP-PBL
patch version to handle SPSS attach timed out scenario.

Change-Id: Id7ee4df5d09d9c09410bc24fc475ee2a36fca246
Signed-off-by: Magesh M <quic_murugan@quicinc.com>
This commit is contained in:
Magesh M
2024-01-24 23:50:04 -08:00
parent 6b23c4a6b3
commit 70cc7ae5e7
2 changed files with 16 additions and 9 deletions

View File

@@ -10,7 +10,8 @@ maintainers:
- Nurit Lichtenstein <quic_nuritl@quicinc.com> - Nurit Lichtenstein <quic_nuritl@quicinc.com>
description: description:
This document defines the binding for a component that loads and boots firmware on the QTI Secure Processor. This document defines the binding for a component that loads
and boots firmware on the QTI Secure Processor.
properties: properties:
compatible: compatible:
@@ -29,6 +30,7 @@ properties:
- description: RMB error register - description: RMB error register
- description: RMB general purpose register - description: RMB general purpose register
- description: RMB error spare2 register - description: RMB error spare2 register
- description: SP PBL patch version register
reg-names: reg-names:
items: items:
@@ -38,9 +40,9 @@ properties:
- const: rmb_err - const: rmb_err
- const: rmb_general_purpose - const: rmb_general_purpose
- const: rmb_err_spare2 - const: rmb_err_spare2
- const: sp_pbl_patch_ver
interrupts: interrupts:
minItems: 1
items: items:
- description: Generic interrupt - description: Generic interrupt
@@ -78,6 +80,8 @@ required:
- clock-names - clock-names
- memory-region - memory-region
additionalProperties: false
examples: examples:
# The following example represents the qcom,spss node on a sun device. # The following example represents the qcom,spss node on a sun device.
- | - |
@@ -89,9 +93,11 @@ examples:
<0x1881028 0x4>, <0x1881028 0x4>,
<0x188103c 0x4>, <0x188103c 0x4>,
<0x1881100 0x4>, <0x1881100 0x4>,
<0x1882014 0x4>; <0x1882014 0x4>,
<0x221C8490 0x4>;
reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", "sp2soc_irq_mask", reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", "sp2soc_irq_mask",
"rmb_err", "rmb_general_purpose", "rmb_err_spare2"; "rmb_err", "rmb_general_purpose", "rmb_err_spare2",
"sp_pbl_patch_ver";
interrupts = <0 352 1>; interrupts = <0 352 1>;
cx-supply = <&VDD_CX_LEVEL>; cx-supply = <&VDD_CX_LEVEL>;

View File

@@ -1463,9 +1463,10 @@
<0x1881028 0x4>, <0x1881028 0x4>,
<0x188103c 0x4>, <0x188103c 0x4>,
<0x1881100 0x4>, <0x1881100 0x4>,
<0x1882014 0x4>; <0x1882014 0x4>,
<0x221C8490 0x4>;
reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", "sp2soc_irq_mask", reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", "sp2soc_irq_mask",
"rmb_err", "rmb_general_purpose", "rmb_err_spare2"; "rmb_err", "rmb_general_purpose", "rmb_err_spare2", "sp_pbl_patch_ver";
interrupts = <0 352 1>; interrupts = <0 352 1>;
cx-supply = <&VDD_CX_LEVEL>; cx-supply = <&VDD_CX_LEVEL>;