ARM: dts: msm: Add HWKM node

Add dtsi node to enable Hardware key manager for monaco target.
And add the device tree bindings for the Hardware key manager driver.

Change-Id: If1e38c3c71148fd85058eb31d4eee5f806e47fef
Signed-off-by: Shivangi Kesharwani <quic_skesharw@quicinc.com>

bindings/firmware/qcom,hwkm.yaml

@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/qcom,hwkm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HWKM (Hardware Key Manager)
+
+maintainers:
+  - Neeraj Soni <quic_neersoni@quicinc.com>
+  - Debraj Mukhopadhyay <quic_dmukhopa@quicinc.com>
+  - Gaurav Kashyap <quic_gaurkash@quicinc.com>
+
+description: |
+  The HWKM driver is a platform device driver that helps
+  communicating with both the master and slave blocks of the
+  hardware key manager to issue commands to perform key operations
+  mainly required for storage encryption.
+
+properties:
+  compatible:
+    const: "qcom,hwkm"
+
+  reg:
+    description: |
+      Register set for both master and slaves.
+
+  reg-names:
+    description: |
+      Identifiers for parsing master and slave regs.
+
+  clocks:
+    description: |
+      clocks needed for operating master and the slave.
+
+  clock-names:
+    description: |
+      name identifiers corresponding to the clocks.
+      qcom,enable-hwkm-clk: to ensure clocks can be handled by HLOS.
+      qcom,op-freq-hz: Max frequency of the listed clocks.
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    qcom_hwkm: hwkm@10c0000 {
+        compatible = "qcom,hwkm";
+        reg = <0x10c0000 0x9000>, <0x1d90000 0x9000>;
+        reg-names = "km_master", "ice_slave";
+        qcom,enable-hwkm-clk;
+        clock-names = "km_clk_src";
+        clocks = <&clock_rpmh RPMH_HWKM_CLK>;
+        qcom,op-freq-hz = <75000000>;
+    };

qcom/monaco.dtsi

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -611,6 +611,16 @@
 		compatible = "qcom,smcinvoke";
 	};
 
+	qcom_hwkm: hwkm@4440000 {
+		compatible = "qcom,hwkm";
+		reg = <0x4440000 0x9000>;
+		reg-names = "km_master";
+		qcom,enable-hwkm-clk;
+		clock-names = "km_clk_src";
+		clocks = <&rpmcc RPM_SMD_HWKM_CLK>;
+		qcom,op-freq-hz = <75000000>;
+	};
+
 	qcom_tzlog: tz-log@c125720 {
 		compatible = "qcom,tz-log";
 		reg = <0xc125720 0x3000>;