video: devicetree: Align with upstream osdt
According to upstream requirement moving devicetree form vendor/qcom/proprietary/video-devicetree to vendor/qcom/opensource/video-devicetree by creating new project. All the changes to the devicetree need to be done in this project to be merged. All changes will need Signed-off-by: tags and will need to use open source emails. Change-Id: I2865fb1fa9e1dae6bf2bf4f2a01bd000d928dba9 Signed-off-by: Megha Byahatti <quic_mbyahatt@quicinc.com>
This commit is contained in:
Megha Byahatti
22
Kbuild
Normal file
22
Kbuild
Normal file
@@ -0,0 +1,22 @@
|
|||||||
|
|
||||||
|
ifeq ($(CONFIG_ARCH_WAIPIO), y)
|
||||||
|
dtbo-y += waipio-vidc.dtbo
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_ARCH_KALAMA), y)
|
||||||
|
dtbo-y += kalama-vidc.dtbo
|
||||||
|
dtbo-y += kalama-vidc-v2.dtbo
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
|
||||||
|
dtbo-y += pineapple-vidc.dtbo
|
||||||
|
dtbo-y += pineapple-vidc-v2.dtbo
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_ARCH_SUN), y)
|
||||||
|
dtbo-y += sun-vidc.dtbo
|
||||||
|
endif
|
||||||
|
|
||||||
|
always-y := $(dtb-y) $(dtbo-y)
|
||||||
|
subdir-y := $(dts-dirs)
|
||||||
|
clean-files := *.dtb *.dtbo
|
||||||
9
Makefile
Normal file
9
Makefile
Normal file
@@ -0,0 +1,9 @@
|
|||||||
|
KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=.
|
||||||
|
|
||||||
|
all: dtbs
|
||||||
|
|
||||||
|
clean:
|
||||||
|
$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
|
||||||
|
|
||||||
|
%:
|
||||||
|
$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)
|
||||||
20
kalama-vidc-v2.dts
Normal file
20
kalama-vidc-v2.dts
Normal file
@@ -0,0 +1,20 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/plugin/;
|
||||||
|
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
#include <dt-bindings/clock/qcom,gcc-kalama.h>
|
||||||
|
#include <dt-bindings/interconnect/qcom,kalama.h>
|
||||||
|
#include <dt-bindings/clock/qcom,videocc-kalama.h>
|
||||||
|
#include "kalama-vidc-v2.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Qualcomm Technologies, Inc. Kalama";
|
||||||
|
compatible = "qcom,kalama";
|
||||||
|
qcom,msm-id = <519 0x20000>, <536 0x20000>;
|
||||||
|
qcom,board-id = <0 0>;
|
||||||
|
};
|
||||||
12
kalama-vidc-v2.dtsi
Normal file
12
kalama-vidc-v2.dtsi
Normal file
@@ -0,0 +1,12 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "kalama-vidc.dtsi"
|
||||||
|
|
||||||
|
/* KalamaV2-specific changes */
|
||||||
|
&msm_vidc {
|
||||||
|
compatible = "qcom,sm8550-vidc-v2";
|
||||||
|
};
|
||||||
|
|
||||||
20
kalama-vidc.dts
Normal file
20
kalama-vidc.dts
Normal file
@@ -0,0 +1,20 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/plugin/;
|
||||||
|
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
#include <dt-bindings/clock/qcom,gcc-kalama.h>
|
||||||
|
#include <dt-bindings/interconnect/qcom,kalama.h>
|
||||||
|
#include <dt-bindings/clock/qcom,videocc-kalama.h>
|
||||||
|
#include "kalama-vidc.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Qualcomm Technologies, Inc. Kalama";
|
||||||
|
compatible = "qcom,kalama";
|
||||||
|
qcom,msm-id = <519 0x10000>, <536 0x10000>;
|
||||||
|
qcom,board-id = <0 0>;
|
||||||
|
};
|
||||||
94
kalama-vidc.dtsi
Normal file
94
kalama-vidc.dtsi
Normal file
@@ -0,0 +1,94 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
&soc {
|
||||||
|
msm_vidc: qcom,vidc@aa00000 {
|
||||||
|
compatible = "qcom,sm8550-vidc";
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* IOMMU Config */
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
reg = <0x0aa00000 0xF0000>;
|
||||||
|
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
||||||
|
/* Supply */
|
||||||
|
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||||
|
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||||
|
|
||||||
|
/* Clocks */
|
||||||
|
clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||||
|
clock-names =
|
||||||
|
"gcc_video_axi0",
|
||||||
|
"core_clk",
|
||||||
|
"vcodec_clk",
|
||||||
|
"video_cc_mvs0_clk_src";
|
||||||
|
|
||||||
|
/* Bus Interconnects */
|
||||||
|
interconnects =
|
||||||
|
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>,
|
||||||
|
<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||||
|
<&mmss_noc MASTER_VIDEO &gem_noc SLAVE_LLCC>;
|
||||||
|
interconnect-names =
|
||||||
|
"venus-cnoc",
|
||||||
|
"venus-ddr",
|
||||||
|
"venus-llcc";
|
||||||
|
|
||||||
|
/* FW load region */
|
||||||
|
memory-region = <&video_mem>;
|
||||||
|
|
||||||
|
/* Clock Resets */
|
||||||
|
resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
|
||||||
|
reset-names = "video_axi_reset";
|
||||||
|
|
||||||
|
/* MMUs */
|
||||||
|
non_secure_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-ns-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1947 0x0000>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
dma-coherent;
|
||||||
|
};
|
||||||
|
|
||||||
|
non_secure_cb {
|
||||||
|
compatible = "qcom,vidc,cb-ns";
|
||||||
|
iommus = <&apps_smmu 0x1940 0x0000>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
dma-coherent;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_non_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1944 0x0000>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_bitstream_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||||
|
iommus = <&apps_smmu 0x1941 0x0004>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1943 0x0000>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
20
pineapple-vidc-v2.dts
Normal file
20
pineapple-vidc-v2.dts
Normal file
@@ -0,0 +1,20 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/plugin/;
|
||||||
|
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
#include <dt-bindings/clock/qcom,gcc-pineapple.h>
|
||||||
|
#include <dt-bindings/interconnect/qcom,pineapple.h>
|
||||||
|
#include <dt-bindings/clock/qcom,videocc-pineapple.h>
|
||||||
|
#include "pineapple-vidc-v2.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Qualcomm Technologies, Inc. pineapple";
|
||||||
|
compatible = "qcom,pineapple";
|
||||||
|
qcom,msm-id = <557 0x20000>, <577 0x20000>;
|
||||||
|
qcom,board-id = <0 0>;
|
||||||
|
};
|
||||||
12
pineapple-vidc-v2.dtsi
Normal file
12
pineapple-vidc-v2.dtsi
Normal file
@@ -0,0 +1,12 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "pineapple-vidc.dtsi"
|
||||||
|
|
||||||
|
/* Pineapple V2-specific changes */
|
||||||
|
&msm_vidc {
|
||||||
|
compatible = "qcom,sm8650-vidc-v2";
|
||||||
|
};
|
||||||
|
|
||||||
20
pineapple-vidc.dts
Normal file
20
pineapple-vidc.dts
Normal file
@@ -0,0 +1,20 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/plugin/;
|
||||||
|
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
#include <dt-bindings/clock/qcom,gcc-pineapple.h>
|
||||||
|
#include <dt-bindings/interconnect/qcom,pineapple.h>
|
||||||
|
#include <dt-bindings/clock/qcom,videocc-pineapple.h>
|
||||||
|
#include "pineapple-vidc.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Qualcomm Technologies, Inc. Pineapple";
|
||||||
|
compatible = "qcom,pineapple";
|
||||||
|
qcom,msm-id = <557 0x10000>, <577 0x10000>;
|
||||||
|
qcom,board-id = <0 0>;
|
||||||
|
};
|
||||||
112
pineapple-vidc.dtsi
Normal file
112
pineapple-vidc.dtsi
Normal file
@@ -0,0 +1,112 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
&soc {
|
||||||
|
msm_vidc: qcom,vidc@aa00000 {
|
||||||
|
compatible = "qcom,sm8650-vidc";
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* IOMMU Config */
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
reg = <0x0aa00000 0xF0000>;
|
||||||
|
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
||||||
|
/* Supply */
|
||||||
|
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||||
|
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||||
|
|
||||||
|
/* Clocks */
|
||||||
|
clocks =
|
||||||
|
<&gcc GCC_VIDEO_AXI0_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||||
|
clock-names =
|
||||||
|
"gcc_video_axi0_clk",
|
||||||
|
"video_cc_mvs0c_clk",
|
||||||
|
"video_cc_mvs0_clk",
|
||||||
|
"video_cc_mvs0_clk_src";
|
||||||
|
|
||||||
|
/* Bus Interconnects */
|
||||||
|
interconnects =
|
||||||
|
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>,
|
||||||
|
<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||||
|
<&mmss_noc MASTER_VIDEO &gem_noc SLAVE_LLCC>;
|
||||||
|
interconnect-names =
|
||||||
|
"venus-cnoc",
|
||||||
|
"venus-ddr",
|
||||||
|
"venus-llcc";
|
||||||
|
|
||||||
|
/* FW load region */
|
||||||
|
memory-region = <&video_mem>;
|
||||||
|
|
||||||
|
/* Clock Resets */
|
||||||
|
resets =
|
||||||
|
<&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||||
|
<&videocc VIDEO_CC_XO_CLK_ARES>,
|
||||||
|
<&videocc VIDEO_CC_MVS0C_CLK_ARES>;
|
||||||
|
reset-names =
|
||||||
|
"video_axi_reset",
|
||||||
|
"video_xo_reset",
|
||||||
|
"video_mvs0c_reset";
|
||||||
|
|
||||||
|
/* MMUs */
|
||||||
|
non_secure_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-ns-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1947 0x0000>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
/* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */
|
||||||
|
qcom,iova-max-align-shift = <8>;
|
||||||
|
dma-coherent;
|
||||||
|
};
|
||||||
|
|
||||||
|
non_secure_cb {
|
||||||
|
compatible = "qcom,vidc,cb-ns";
|
||||||
|
iommus = <&apps_smmu 0x1940 0x0000>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||||
|
dma-coherent;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_non_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1944 0x0000>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_bitstream_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||||
|
iommus = <&apps_smmu 0x1941 0x0004>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1943 0x0000>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
20
sun-vidc.dts
Normal file
20
sun-vidc.dts
Normal file
@@ -0,0 +1,20 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/plugin/;
|
||||||
|
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
#include <dt-bindings/clock/qcom,gcc-sun.h>
|
||||||
|
#include <dt-bindings/interconnect/qcom,sun.h>
|
||||||
|
#include <dt-bindings/clock/qcom,videocc-sun.h>
|
||||||
|
#include "sun-vidc.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Qualcomm Technologies, Inc. Sun";
|
||||||
|
compatible = "qcom,sun";
|
||||||
|
qcom,msm-id = <618 0x10000>, <639 0x10000>;
|
||||||
|
qcom,board-id = <0 0>;
|
||||||
|
};
|
||||||
134
sun-vidc.dtsi
Normal file
134
sun-vidc.dtsi
Normal file
@@ -0,0 +1,134 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
&soc {
|
||||||
|
msm_vidc: qcom,vidc@aa00000 {
|
||||||
|
compatible = "qcom,sm8750-vidc";
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* IOMMU Config */
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
reg = <0x0aa00000 0xF0000>;
|
||||||
|
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
||||||
|
/* Supply */
|
||||||
|
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||||
|
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||||
|
|
||||||
|
/* Clocks */
|
||||||
|
clocks =
|
||||||
|
<&gcc GCC_VIDEO_AXI1_CLK>,
|
||||||
|
<&gcc GCC_VIDEO_AXI0_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0C_FREERUN_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0_FREERUN_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0_CLK>,
|
||||||
|
<&videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||||
|
clock-names =
|
||||||
|
"gcc_video_axi1_clk",
|
||||||
|
"gcc_video_axi0_clk",
|
||||||
|
"video_cc_mvs0c_freerun_clk",
|
||||||
|
"video_cc_mvs0_freerun_clk",
|
||||||
|
"video_cc_mvs0c_clk",
|
||||||
|
"video_cc_mvs0_clk",
|
||||||
|
"video_cc_mvs0_clk_src";
|
||||||
|
|
||||||
|
/* Bus Interconnects */
|
||||||
|
interconnects =
|
||||||
|
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>,
|
||||||
|
<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||||
|
<&mmss_noc MASTER_VIDEO_MVP &gem_noc SLAVE_LLCC>;
|
||||||
|
interconnect-names =
|
||||||
|
"venus-cnoc",
|
||||||
|
"venus-ddr",
|
||||||
|
"venus-llcc";
|
||||||
|
|
||||||
|
/* FW load region */
|
||||||
|
memory-region = <&video_mem>;
|
||||||
|
|
||||||
|
/* Clock Resets */
|
||||||
|
resets =
|
||||||
|
<&gcc GCC_VIDEO_AXI1_CLK_ARES>,
|
||||||
|
<&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||||
|
<&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>,
|
||||||
|
<&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>;
|
||||||
|
reset-names =
|
||||||
|
"video_axi1_reset",
|
||||||
|
"video_axi0_reset",
|
||||||
|
"video_mvs0c_freerun_reset",
|
||||||
|
"video_mvs0_freerun_reset";
|
||||||
|
|
||||||
|
/* MMUs */
|
||||||
|
iommu_region_partition: iommu_region_partition {
|
||||||
|
/* These IOVA regions are unique per context bank */
|
||||||
|
iommu-addresses = <&non_secure_pixel_cb 0x0 0x00100000>,
|
||||||
|
<&non_secure_pixel_cb 0xe0000000 0x20000000>,
|
||||||
|
<&non_secure_cb 0x0 0x25800000>,
|
||||||
|
<&non_secure_cb 0xe0000000 0x20000000>,
|
||||||
|
<&secure_non_pixel_cb 0x0 0x01000000>,
|
||||||
|
<&secure_non_pixel_cb 0x25800000 0xda800000>,
|
||||||
|
<&secure_bitstream_cb 0x0 0x00500000>,
|
||||||
|
<&secure_bitstream_cb 0xe0000000 0x20000000>,
|
||||||
|
<&secure_pixel_cb 0x0 0x00500000>,
|
||||||
|
<&secure_pixel_cb 0xe0000000 0x20000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
non_secure_pixel_cb: non_secure_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-ns-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1947 0x0000>;
|
||||||
|
memory-region = <&iommu_region_partition>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
/* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */
|
||||||
|
qcom,iova-max-align-shift = <8>;
|
||||||
|
dma-coherent;
|
||||||
|
};
|
||||||
|
|
||||||
|
non_secure_cb: non_secure_cb {
|
||||||
|
compatible = "qcom,vidc,cb-ns";
|
||||||
|
iommus = <&apps_smmu 0x1940 0x0000>;
|
||||||
|
memory-region = <&iommu_region_partition>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||||
|
dma-coherent;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_non_pixel_cb: secure_non_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1944 0x0000>;
|
||||||
|
memory-region = <&iommu_region_partition>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_bitstream_cb: secure_bitstream_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||||
|
iommus = <&apps_smmu 0x1941 0x0004>;
|
||||||
|
memory-region = <&iommu_region_partition>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_pixel_cb: secure_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-pxl";
|
||||||
|
iommus = <&apps_smmu 0x1943 0x0000>;
|
||||||
|
memory-region = <&iommu_region_partition>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||||
|
qcom,iova-best-fit;
|
||||||
|
qcom,iova-max-align-shift = <8>; /* 1 MB */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
21
waipio-vidc.dts
Normal file
21
waipio-vidc.dts
Normal file
@@ -0,0 +1,21 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/plugin/;
|
||||||
|
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
#include <dt-bindings/clock/qcom,gcc-waipio.h>
|
||||||
|
#include <dt-bindings/interconnect/qcom,waipio.h>
|
||||||
|
#include <dt-bindings/clock/qcom,videocc-waipio.h>
|
||||||
|
#include "waipio-vidc.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Qualcomm Technologies, Inc. waipio v1 SoC";
|
||||||
|
compatible = "qcom,waipio";
|
||||||
|
qcom,msm-id = <457 0x10000>, <482 0x10000>,
|
||||||
|
<457 0x20000>, <482 0x20000>;
|
||||||
|
qcom,board-id = <0 0>;
|
||||||
|
};
|
||||||
103
waipio-vidc.dtsi
Normal file
103
waipio-vidc.dtsi
Normal file
@@ -0,0 +1,103 @@
|
|||||||
|
// SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
*/
|
||||||
|
|
||||||
|
&soc {
|
||||||
|
msm_vidc: qcom,vidc@aa00000 {
|
||||||
|
compatible = "qcom,sm8450-vidc";
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* IOMMU Config */
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
reg = <0x0aa00000 0xF0000>;
|
||||||
|
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
||||||
|
/* Supply */
|
||||||
|
iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
|
||||||
|
vcodec-supply = <&video_cc_mvs0_gdsc>;
|
||||||
|
|
||||||
|
/* Clocks */
|
||||||
|
clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
|
||||||
|
<&clock_videocc VIDEO_CC_MVS0C_CLK>,
|
||||||
|
<&clock_videocc VIDEO_CC_MVS0_CLK>,
|
||||||
|
<&clock_videocc VIDEO_CC_MVS0_CLK_SRC>;
|
||||||
|
clock-names =
|
||||||
|
"gcc_video_axi0",
|
||||||
|
"core_clk",
|
||||||
|
"vcodec_clk",
|
||||||
|
"video_cc_mvs0_clk_src";
|
||||||
|
|
||||||
|
/* Bus Interconnects */
|
||||||
|
interconnects =
|
||||||
|
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>,
|
||||||
|
<&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||||
|
<&mmss_noc MASTER_VIDEO_P0 &gem_noc SLAVE_LLCC>;
|
||||||
|
interconnect-names =
|
||||||
|
"venus-cnoc",
|
||||||
|
"venus-ddr",
|
||||||
|
"venus-llcc";
|
||||||
|
|
||||||
|
/* FW load region */
|
||||||
|
memory-region = <&video_mem>;
|
||||||
|
|
||||||
|
/* Clock Resets */
|
||||||
|
resets =
|
||||||
|
<&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||||
|
<&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>;
|
||||||
|
reset-names =
|
||||||
|
"video_axi_reset",
|
||||||
|
"video_core_reset";
|
||||||
|
|
||||||
|
/* MMUs */
|
||||||
|
non_secure_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-ns-pxl";
|
||||||
|
iommus = <&apps_smmu 0x2187 0x0400>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal", "stall-disable";
|
||||||
|
qcom,iommu-pagetable = "LLC";
|
||||||
|
dma-coherent;
|
||||||
|
};
|
||||||
|
|
||||||
|
non_secure_cb {
|
||||||
|
compatible = "qcom,vidc,cb-ns";
|
||||||
|
iommus = <&apps_smmu 0x2180 0x0400>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
|
||||||
|
qcom,iommu-faults = "non-fatal", "stall-disable";
|
||||||
|
qcom,iommu-pagetable = "LLC";
|
||||||
|
dma-coherent;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_non_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-non-pxl";
|
||||||
|
iommus = <&apps_smmu 0x2184 0x0400>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
|
||||||
|
qcom,iommu-faults = "non-fatal", "stall-disable";
|
||||||
|
qcom,iommu-pagetable = "LLC";
|
||||||
|
qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_bitstream_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-bitstream";
|
||||||
|
iommus = <&apps_smmu 0x2181 0x0404>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-pagetable = "LLC";
|
||||||
|
qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
|
||||||
|
secure_pixel_cb {
|
||||||
|
compatible = "qcom,vidc,cb-sec-pxl";
|
||||||
|
iommus = <&apps_smmu 0x2183 0x0400>;
|
||||||
|
qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
|
||||||
|
qcom,iommu-faults = "non-fatal";
|
||||||
|
qcom,iommu-pagetable = "LLC";
|
||||||
|
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||||
|
qcom,secure-context-bank;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
Reference in New Issue
Block a user