dt-bindings: Add devicetree bindings
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
This commit is contained in:
Melody Olvera
104
bindings/usb/allwinner,sun4i-a10-musb.yaml
Normal file
104
bindings/usb/allwinner,sun4i-a10-musb.yaml
Normal file
@@ -0,0 +1,104 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/allwinner,sun4i-a10-musb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Allwinner A10 mUSB OTG Controller
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
- Maxime Ripard <mripard@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: allwinner,sun4i-a10-musb
|
||||
- const: allwinner,sun6i-a31-musb
|
||||
- const: allwinner,sun8i-a33-musb
|
||||
- const: allwinner,sun8i-h3-musb
|
||||
- items:
|
||||
- enum:
|
||||
- allwinner,sun8i-a83t-musb
|
||||
- allwinner,sun20i-d1-musb
|
||||
- allwinner,sun50i-h6-musb
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||||
- const: allwinner,sun8i-a33-musb
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- items:
|
||||
- const: allwinner,sun50i-h616-musb
|
||||
- const: allwinner,sun8i-h3-musb
|
||||
|
||||
reg:
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||||
maxItems: 1
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||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
const: mc
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
const: usb
|
||||
|
||||
extcon:
|
||||
description: Extcon specifier for the OTG PHY
|
||||
|
||||
dr_mode:
|
||||
enum:
|
||||
- host
|
||||
- otg
|
||||
- peripheral
|
||||
|
||||
allwinner,sram:
|
||||
description: Phandle to the device SRAM
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
|
||||
required:
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||||
- compatible
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||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- clocks
|
||||
- phys
|
||||
- phy-names
|
||||
- dr_mode
|
||||
- extcon
|
||||
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- allwinner,sun6i-a31-musb
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||||
- allwinner,sun8i-a33-musb
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||||
- allwinner,sun8i-h3-musb
|
||||
|
||||
then:
|
||||
required:
|
||||
- resets
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||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
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||||
- |
|
||||
usb_otg: usb@1c13000 {
|
||||
compatible = "allwinner,sun4i-a10-musb";
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||||
reg = <0x01c13000 0x0400>;
|
||||
clocks = <&ahb_gates 0>;
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||||
interrupts = <38>;
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||||
interrupt-names = "mc";
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phys = <&usbphy 0>;
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||||
phy-names = "usb";
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||||
extcon = <&usbphy 0>;
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||||
dr_mode = "peripheral";
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};
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||||
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||||
...
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200
bindings/usb/am33xx-usb.txt
Normal file
200
bindings/usb/am33xx-usb.txt
Normal file
@@ -0,0 +1,200 @@
|
||||
AM33xx MUSB
|
||||
~~~~~~~~~~~~~~~
|
||||
- compatible: ti,am33xx-usb
|
||||
- reg: offset and length of the usbss register sets
|
||||
- ti,hwmods : must be "usb_otg_hs"
|
||||
|
||||
The glue layer contains multiple child nodes. It is required to have
|
||||
at least a control module node, USB node and a PHY node. The second USB
|
||||
node and its PHY node are optional. The DMA node is also optional.
|
||||
|
||||
Reset module
|
||||
~~~~~~~~~~~~
|
||||
- compatible: ti,am335x-usb-ctrl-module
|
||||
- reg: offset and length of the "USB control registers" in the "Control
|
||||
Module" block. A second offset and length for the USB wake up control
|
||||
in the same memory block.
|
||||
- reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
|
||||
the USB wake up control register.
|
||||
|
||||
USB PHY
|
||||
~~~~~~~
|
||||
compatible: ti,am335x-usb-phy
|
||||
reg: offset and length of the "USB PHY" register space
|
||||
ti,ctrl_mod: reference to the "reset module" node
|
||||
reg-names: phy
|
||||
The PHY should have a "phy" alias numbered properly in the alias
|
||||
node.
|
||||
|
||||
USB
|
||||
~~~
|
||||
- compatible: ti,musb-am33xx
|
||||
- reg: offset and length of "USB Controller Registers", and offset and
|
||||
length of "USB Core" register space.
|
||||
- reg-names: control for the ""USB Controller Registers" and "mc" for
|
||||
"USB Core" register space
|
||||
- interrupts: USB interrupt number
|
||||
- interrupt-names: mc
|
||||
- dr_mode: Should be one of "host", "peripheral" or "otg".
|
||||
- mentor,multipoint: Should be "1" indicating the musb controller supports
|
||||
multipoint. This is a MUSB configuration-specific setting.
|
||||
- mentor,num-eps: Specifies the number of endpoints. This is also a
|
||||
MUSB configuration-specific setting. Should be set to "16"
|
||||
- mentor,ram-bits: Specifies the ram address size. Should be set to "12"
|
||||
- mentor,power: Should be "500". This signifies the controller can supply up to
|
||||
500mA when operating in host mode.
|
||||
- phys: reference to the USB phy
|
||||
- dmas: specifies the dma channels
|
||||
- dma-names: specifies the names of the channels. Use "rxN" for receive
|
||||
and "txN" for transmit endpoints. N specifies the endpoint number.
|
||||
|
||||
The controller should have an "usb" alias numbered properly in the alias
|
||||
node.
|
||||
|
||||
DMA
|
||||
~~~
|
||||
- compatible: ti,am3359-cppi41
|
||||
- reg: offset and length of the following register spaces: USBSS, USB
|
||||
CPPI DMA Controller, USB CPPI DMA Scheduler, USB Queue Manager
|
||||
- reg-names: glue, controller, scheduler, queuemgr
|
||||
- #dma-cells: should be set to 2. The first number represents the
|
||||
endpoint number (0 … 14 for endpoints 1 … 15 on instance 0 and 15 … 29
|
||||
for endpoints 1 … 15 on instance 1). The second number is 0 for RX and
|
||||
1 for TX transfers.
|
||||
- dma-channels: should be set to 30 representing the 15 endpoints for
|
||||
each USB instance.
|
||||
- #dma-channels: deprecated
|
||||
|
||||
Example:
|
||||
~~~~~~~~
|
||||
The following example contains all the nodes as used on am335x-evm:
|
||||
|
||||
aliases {
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
phy0 = &usb0_phy;
|
||||
phy1 = &usb1_phy;
|
||||
};
|
||||
|
||||
usb: usb@47400000 {
|
||||
compatible = "ti,am33xx-usb";
|
||||
reg = <0x47400000 0x1000>;
|
||||
ranges;
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||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ti,hwmods = "usb_otg_hs";
|
||||
|
||||
ctrl_mod: control@44e10000 {
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||||
compatible = "ti,am335x-usb-ctrl-module";
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||||
reg = <0x44e10620 0x10
|
||||
0x44e10648 0x4>;
|
||||
reg-names = "phy_ctrl", "wakeup";
|
||||
};
|
||||
|
||||
usb0_phy: usb-phy@47401300 {
|
||||
compatible = "ti,am335x-usb-phy";
|
||||
reg = <0x47401300 0x100>;
|
||||
reg-names = "phy";
|
||||
ti,ctrl_mod = <&ctrl_mod>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
usb0: usb@47401000 {
|
||||
compatible = "ti,musb-am33xx";
|
||||
reg = <0x47401400 0x400
|
||||
0x47401000 0x200>;
|
||||
reg-names = "mc", "control";
|
||||
|
||||
interrupts = <18>;
|
||||
interrupt-names = "mc";
|
||||
dr_mode = "otg"
|
||||
mentor,multipoint = <1>;
|
||||
mentor,num-eps = <16>;
|
||||
mentor,ram-bits = <12>;
|
||||
mentor,power = <500>;
|
||||
phys = <&usb0_phy>;
|
||||
|
||||
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
|
||||
&cppi41dma 2 0 &cppi41dma 3 0
|
||||
&cppi41dma 4 0 &cppi41dma 5 0
|
||||
&cppi41dma 6 0 &cppi41dma 7 0
|
||||
&cppi41dma 8 0 &cppi41dma 9 0
|
||||
&cppi41dma 10 0 &cppi41dma 11 0
|
||||
&cppi41dma 12 0 &cppi41dma 13 0
|
||||
&cppi41dma 14 0 &cppi41dma 0 1
|
||||
&cppi41dma 1 1 &cppi41dma 2 1
|
||||
&cppi41dma 3 1 &cppi41dma 4 1
|
||||
&cppi41dma 5 1 &cppi41dma 6 1
|
||||
&cppi41dma 7 1 &cppi41dma 8 1
|
||||
&cppi41dma 9 1 &cppi41dma 10 1
|
||||
&cppi41dma 11 1 &cppi41dma 12 1
|
||||
&cppi41dma 13 1 &cppi41dma 14 1>;
|
||||
dma-names =
|
||||
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
||||
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
||||
"rx14", "rx15",
|
||||
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
||||
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
||||
"tx14", "tx15";
|
||||
};
|
||||
|
||||
usb1_phy: usb-phy@47401b00 {
|
||||
compatible = "ti,am335x-usb-phy";
|
||||
reg = <0x47401b00 0x100>;
|
||||
reg-names = "phy";
|
||||
ti,ctrl_mod = <&ctrl_mod>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
usb1: usb@47401800 {
|
||||
compatible = "ti,musb-am33xx";
|
||||
reg = <0x47401c00 0x400
|
||||
0x47401800 0x200>;
|
||||
reg-names = "mc", "control";
|
||||
interrupts = <19>;
|
||||
interrupt-names = "mc";
|
||||
dr_mode = "host"
|
||||
mentor,multipoint = <1>;
|
||||
mentor,num-eps = <16>;
|
||||
mentor,ram-bits = <12>;
|
||||
mentor,power = <500>;
|
||||
phys = <&usb1_phy>;
|
||||
|
||||
dmas = <&cppi41dma 15 0 &cppi41dma 16 0
|
||||
&cppi41dma 17 0 &cppi41dma 18 0
|
||||
&cppi41dma 19 0 &cppi41dma 20 0
|
||||
&cppi41dma 21 0 &cppi41dma 22 0
|
||||
&cppi41dma 23 0 &cppi41dma 24 0
|
||||
&cppi41dma 25 0 &cppi41dma 26 0
|
||||
&cppi41dma 27 0 &cppi41dma 28 0
|
||||
&cppi41dma 29 0 &cppi41dma 15 1
|
||||
&cppi41dma 16 1 &cppi41dma 17 1
|
||||
&cppi41dma 18 1 &cppi41dma 19 1
|
||||
&cppi41dma 20 1 &cppi41dma 21 1
|
||||
&cppi41dma 22 1 &cppi41dma 23 1
|
||||
&cppi41dma 24 1 &cppi41dma 25 1
|
||||
&cppi41dma 26 1 &cppi41dma 27 1
|
||||
&cppi41dma 28 1 &cppi41dma 29 1>;
|
||||
dma-names =
|
||||
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
||||
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
||||
"rx14", "rx15",
|
||||
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
||||
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
||||
"tx14", "tx15";
|
||||
};
|
||||
|
||||
cppi41dma: dma-controller@7402000 {
|
||||
compatible = "ti,am3359-cppi41";
|
||||
reg = <0x47400000 0x1000
|
||||
0x47402000 0x1000
|
||||
0x47403000 0x1000
|
||||
0x47404000 0x4000>;
|
||||
reg-names = "glue", "controller", "scheduler", "queuemgr";
|
||||
interrupts = <17>;
|
||||
interrupt-names = "glue";
|
||||
#dma-cells = <2>;
|
||||
dma-channels = <30>;
|
||||
dma-requests = <256>;
|
||||
};
|
||||
};
|
||||
236
bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
Normal file
236
bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
Normal file
@@ -0,0 +1,236 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2019 BayLibre, SAS
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Amlogic Meson G12A DWC3 USB SoC Controller Glue
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
|
||||
in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
|
||||
only.
|
||||
|
||||
A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
|
||||
|
||||
One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
|
||||
|
||||
The DWC3 Glue controls the PHY routing and power, an interrupt line is
|
||||
connected to the Glue to serve as OTG ID change detection.
|
||||
|
||||
The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in
|
||||
host-only mode.
|
||||
|
||||
The Amlogic GXL, GXM & AXG SoCs doesn't embed an USB3 PHY.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-gxl-usb-ctrl
|
||||
- amlogic,meson-gxm-usb-ctrl
|
||||
- amlogic,meson-axg-usb-ctrl
|
||||
- amlogic,meson-g12a-usb-ctrl
|
||||
- amlogic,meson-a1-usb-ctrl
|
||||
|
||||
ranges: true
|
||||
|
||||
"#address-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
resets:
|
||||
minItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
dr_mode: true
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
vbus-supply:
|
||||
description: VBUS power supply when used in OTG switchable mode
|
||||
|
||||
patternProperties:
|
||||
"^usb@[0-9a-f]+$":
|
||||
oneOf:
|
||||
- $ref: dwc2.yaml#
|
||||
- $ref: snps,dwc3.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
- clocks
|
||||
- resets
|
||||
- reg
|
||||
- interrupts
|
||||
- phy-names
|
||||
- phys
|
||||
- dr_mode
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-g12a-usb-ctrl
|
||||
|
||||
then:
|
||||
properties:
|
||||
phy-names:
|
||||
items:
|
||||
- const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
|
||||
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
|
||||
- const: usb3-phy0 # USB3 PHY if USB3_0 is used
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-gxl-usb-ctrl
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: usb_ctrl
|
||||
- const: ddr
|
||||
phy-names:
|
||||
items:
|
||||
- const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
|
||||
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
|
||||
required:
|
||||
- clock-names
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-gxm-usb-ctrl
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: usb_ctrl
|
||||
- const: ddr
|
||||
phy-names:
|
||||
items:
|
||||
- const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
|
||||
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
|
||||
- const: usb2-phy2 # USB2 PHY2 if USBOTG_C port is used
|
||||
|
||||
required:
|
||||
- clock-names
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-axg-usb-ctrl
|
||||
|
||||
then:
|
||||
properties:
|
||||
phy-names:
|
||||
items:
|
||||
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
|
||||
clocks:
|
||||
minItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: usb_ctrl
|
||||
- const: ddr
|
||||
required:
|
||||
- clock-names
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-a1-usb-ctrl
|
||||
|
||||
then:
|
||||
properties:
|
||||
phy-names:
|
||||
items:
|
||||
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
|
||||
clocks:
|
||||
minItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: usb_ctrl
|
||||
- const: usb_bus
|
||||
- const: xtal_usb_ctrl
|
||||
required:
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb: usb@ffe09000 {
|
||||
compatible = "amlogic,meson-g12a-usb-ctrl";
|
||||
reg = <0xffe09000 0xa0>;
|
||||
interrupts = <16>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
clocks = <&clkc_usb>;
|
||||
resets = <&reset_usb>;
|
||||
|
||||
dr_mode = "otg";
|
||||
|
||||
phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>;
|
||||
phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
|
||||
|
||||
dwc2: usb@ff400000 {
|
||||
compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
|
||||
reg = <0xff400000 0x40000>;
|
||||
interrupts = <31>;
|
||||
clocks = <&clkc_usb1>;
|
||||
clock-names = "otg";
|
||||
phys = <&usb2_phy1>;
|
||||
dr_mode = "peripheral";
|
||||
g-rx-fifo-size = <192>;
|
||||
g-np-tx-fifo-size = <128>;
|
||||
g-tx-fifo-size = <128 128 16 16 16>;
|
||||
};
|
||||
|
||||
dwc3: usb@ff500000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0xff500000 0x100000>;
|
||||
interrupts = <30>;
|
||||
dr_mode = "host";
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,quirk-frame-length-adjustment = <0x20>;
|
||||
};
|
||||
};
|
||||
83
bindings/usb/analogix,anx7411.yaml
Normal file
83
bindings/usb/analogix,anx7411.yaml
Normal file
@@ -0,0 +1,83 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/analogix,anx7411.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analogix ANX7411 Type-C controller bindings
|
||||
|
||||
maintainers:
|
||||
- Xin Ji <xji@analogixsemi.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- analogix,anx7411
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
connector:
|
||||
type: object
|
||||
$ref: ../connector/usb-connector.yaml
|
||||
unevaluatedProperties: false
|
||||
|
||||
description:
|
||||
Properties for usb c connector.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: usb-c-connector
|
||||
|
||||
power-role: true
|
||||
|
||||
data-role: true
|
||||
|
||||
try-power-role: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- connector
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
typec@2c {
|
||||
compatible = "analogix,anx7411";
|
||||
reg = <0x2c>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
|
||||
typec_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
power-role = "dual";
|
||||
data-role = "dual";
|
||||
try-power-role = "source";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
typec_con_ep: endpoint {
|
||||
remote-endpoint = <&usbotg_hs_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
52
bindings/usb/aspeed,ast2600-udc.yaml
Normal file
52
bindings/usb/aspeed,ast2600-udc.yaml
Normal file
@@ -0,0 +1,52 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 Facebook Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/aspeed,ast2600-udc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ASPEED USB 2.0 Device Controller
|
||||
|
||||
maintainers:
|
||||
- Neal Liu <neal_liu@aspeedtech.com>
|
||||
|
||||
description: |+
|
||||
The ASPEED USB 2.0 Device Controller implements 1 control endpoint and
|
||||
4 generic endpoints for AST260x.
|
||||
|
||||
Supports independent DMA channel for each generic endpoint.
|
||||
Supports 32/256 stages descriptor mode for all generic endpoints.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- aspeed,ast2600-udc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/aspeed-clock.h>
|
||||
udc: usb@1e6a2000 {
|
||||
compatible = "aspeed,ast2600-udc";
|
||||
reg = <0x1e6a2000 0x300>;
|
||||
interrupts = <9>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb2bd_default>;
|
||||
};
|
||||
139
bindings/usb/aspeed,usb-vhub.yaml
Normal file
139
bindings/usb/aspeed,usb-vhub.yaml
Normal file
@@ -0,0 +1,139 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 Facebook Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/aspeed,usb-vhub.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ASPEED USB 2.0 Virtual Hub Controller
|
||||
|
||||
maintainers:
|
||||
- Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
|
||||
description: |+
|
||||
The ASPEED USB 2.0 Virtual Hub Controller implements 1 set of USB Hub
|
||||
register and several sets of Device and Endpoint registers to support
|
||||
the Virtual Hub's downstream USB devices.
|
||||
|
||||
Supported number of devices and endpoints vary depending on hardware
|
||||
revisions. AST2400 and AST2500 Virtual Hub supports 5 downstream devices
|
||||
and 15 generic endpoints, while AST2600 Virtual Hub supports 7 downstream
|
||||
devices and 21 generic endpoints.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- aspeed,ast2400-usb-vhub
|
||||
- aspeed,ast2500-usb-vhub
|
||||
- aspeed,ast2600-usb-vhub
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
aspeed,vhub-downstream-ports:
|
||||
description: Number of downstream ports supported by the Virtual Hub
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 5
|
||||
minimum: 1
|
||||
maximum: 7
|
||||
|
||||
aspeed,vhub-generic-endpoints:
|
||||
description: Number of generic endpoints supported by the Virtual Hub
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 15
|
||||
minimum: 1
|
||||
maximum: 21
|
||||
|
||||
vhub-vendor-id:
|
||||
description: vhub Vendor ID
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
maximum: 65535
|
||||
|
||||
vhub-product-id:
|
||||
description: vhub Product ID
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
maximum: 65535
|
||||
|
||||
vhub-device-revision:
|
||||
description: vhub Device Revision in binary-coded decimal
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
maximum: 65535
|
||||
|
||||
vhub-strings:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
'^string@[0-9a-f]+$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
description: string descriptors of the specific language
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: 16-bit Language Identifier defined by USB-IF
|
||||
|
||||
manufacturer:
|
||||
description: vhub manufacturer
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
product:
|
||||
description: vhub product name
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
serial-number:
|
||||
description: vhub device serial number
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- interrupts
|
||||
- aspeed,vhub-downstream-ports
|
||||
- aspeed,vhub-generic-endpoints
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/aspeed-clock.h>
|
||||
vhub: usb-vhub@1e6a0000 {
|
||||
compatible = "aspeed,ast2500-usb-vhub";
|
||||
reg = <0x1e6a0000 0x300>;
|
||||
interrupts = <5>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
|
||||
aspeed,vhub-downstream-ports = <5>;
|
||||
aspeed,vhub-generic-endpoints = <15>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb2ad_default>;
|
||||
|
||||
vhub-vendor-id = <0x1d6b>;
|
||||
vhub-product-id = <0x0107>;
|
||||
vhub-device-revision = <0x0100>;
|
||||
vhub-strings {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
string@409 {
|
||||
reg = <0x409>;
|
||||
manufacturer = "ASPEED";
|
||||
product = "USB Virtual Hub";
|
||||
serial-number = "0000";
|
||||
};
|
||||
};
|
||||
};
|
||||
125
bindings/usb/atmel-usb.txt
Normal file
125
bindings/usb/atmel-usb.txt
Normal file
@@ -0,0 +1,125 @@
|
||||
Atmel SOC USB controllers
|
||||
|
||||
OHCI
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "atmel,at91rm9200-ohci" for USB controllers
|
||||
used in host mode.
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain ohci interrupt
|
||||
- clocks: Should reference the peripheral, host and system clocks
|
||||
- clock-names: Should contain three strings
|
||||
"ohci_clk" for the peripheral clock
|
||||
"hclk" for the host clock
|
||||
"uhpck" for the system clock
|
||||
- num-ports: Number of ports.
|
||||
- atmel,vbus-gpio: If present, specifies a gpio that needs to be
|
||||
activated for the bus to be powered.
|
||||
- atmel,oc-gpio: If present, specifies a gpio that needs to be
|
||||
activated for the overcurrent detection.
|
||||
|
||||
usb0: ohci@500000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x100000>;
|
||||
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
interrupts = <20 4>;
|
||||
num-ports = <2>;
|
||||
};
|
||||
|
||||
EHCI
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "atmel,at91sam9g45-ehci" for USB controllers
|
||||
used in host mode.
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain ehci interrupt
|
||||
- clocks: Should reference the peripheral and the UTMI clocks
|
||||
- clock-names: Should contain two strings
|
||||
"ehci_clk" for the peripheral clock
|
||||
"usb_clk" for the UTMI clock
|
||||
|
||||
Optional properties:
|
||||
- phy_type : For multi port host USB controllers, should be one of
|
||||
"utmi", or "hsic".
|
||||
|
||||
usb1: ehci@800000 {
|
||||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00800000 0x100000>;
|
||||
interrupts = <22 4>;
|
||||
clocks = <&utmi>, <&uhphs_clk>;
|
||||
clock-names = "usb_clk", "ehci_clk";
|
||||
};
|
||||
|
||||
AT91 USB device controller
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be one of the following
|
||||
"atmel,at91rm9200-udc"
|
||||
"atmel,at91sam9260-udc"
|
||||
"atmel,at91sam9261-udc"
|
||||
"atmel,at91sam9263-udc"
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain macb interrupt
|
||||
- clocks: Should reference the peripheral and the AHB clocks
|
||||
- clock-names: Should contain two strings
|
||||
"pclk" for the peripheral clock
|
||||
"hclk" for the AHB clock
|
||||
|
||||
Optional properties:
|
||||
- atmel,vbus-gpio: If present, specifies a gpio that needs to be
|
||||
activated for the bus to be powered.
|
||||
|
||||
usb1: gadget@fffa4000 {
|
||||
compatible = "atmel,at91rm9200-udc";
|
||||
reg = <0xfffa4000 0x4000>;
|
||||
interrupts = <10 4>;
|
||||
clocks = <&udc_clk>, <&udpck>;
|
||||
clock-names = "pclk", "hclk";
|
||||
atmel,vbus-gpio = <&pioC 5 0>;
|
||||
};
|
||||
|
||||
Atmel High-Speed USB device controller
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be one of the following
|
||||
"atmel,at91sam9rl-udc"
|
||||
"atmel,at91sam9g45-udc"
|
||||
"atmel,sama5d3-udc"
|
||||
"microchip,sam9x60-udc"
|
||||
"microchip,lan9662-udc"
|
||||
For "microchip,lan9662-udc" the fallback "atmel,sama5d3-udc"
|
||||
is required.
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain usba interrupt
|
||||
- clocks: Should reference the peripheral and host clocks
|
||||
- clock-names: Should contain two strings
|
||||
"pclk" for the peripheral clock
|
||||
"hclk" for the host clock
|
||||
|
||||
Deprecated property:
|
||||
- ep childnode: To specify the number of endpoints and their properties.
|
||||
|
||||
Optional properties:
|
||||
- atmel,vbus-gpio: If present, specifies a gpio that allows to detect whether
|
||||
vbus is present (USB is connected).
|
||||
|
||||
Deprecated child node properties:
|
||||
- name: Name of the endpoint.
|
||||
- reg: Num of the endpoint.
|
||||
- atmel,fifo-size: Size of the fifo.
|
||||
- atmel,nb-banks: Number of banks.
|
||||
- atmel,can-dma: Boolean to specify if the endpoint support DMA.
|
||||
- atmel,can-isoc: Boolean to specify if the endpoint support ISOC.
|
||||
|
||||
usb2: gadget@fff78000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91sam9rl-udc";
|
||||
reg = <0x00600000 0x80000
|
||||
0xfff78000 0x400>;
|
||||
interrupts = <27 4 0>;
|
||||
clocks = <&utmi>, <&udphs_clk>;
|
||||
clock-names = "hclk", "pclk";
|
||||
atmel,vbus-gpio = <&pioB 19 0>;
|
||||
};
|
||||
11
bindings/usb/brcm,bcm3384-usb.txt
Normal file
11
bindings/usb/brcm,bcm3384-usb.txt
Normal file
@@ -0,0 +1,11 @@
|
||||
* Broadcom USB controllers
|
||||
|
||||
Required properties:
|
||||
- compatible: "brcm,bcm3384-ohci", "brcm,bcm3384-ehci"
|
||||
|
||||
These currently use the generic-ohci and generic-ehci drivers. On some
|
||||
systems, special handling may be needed in the following cases:
|
||||
|
||||
- Restoring state after systemwide power save modes
|
||||
- Sharing PHYs with the USBD (UDC) hardware
|
||||
- Figuring out which controllers are disabled on ASIC bondout variants
|
||||
59
bindings/usb/brcm,bcm7445-ehci.yaml
Normal file
59
bindings/usb/brcm,bcm7445-ehci.yaml
Normal file
@@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/brcm,bcm7445-ehci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom STB USB EHCI Controller
|
||||
|
||||
allOf:
|
||||
- $ref: "usb-hcd.yaml"
|
||||
|
||||
maintainers:
|
||||
- Al Cooper <alcooperx@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: brcm,bcm7445-ehci
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description: Clock specifier for the EHCI clock
|
||||
|
||||
clock-names:
|
||||
const: sw_usb
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
const: usbphy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- phys
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb@f0b00300 {
|
||||
compatible = "brcm,bcm7445-ehci";
|
||||
reg = <0xf0b00300 0xa8>;
|
||||
interrupts = <0x0 0x5a 0x0>;
|
||||
phys = <&usbphy_0 0x0>;
|
||||
phy-names = "usbphy";
|
||||
clocks = <&usb20>;
|
||||
clock-names = "sw_usb";
|
||||
};
|
||||
|
||||
...
|
||||
50
bindings/usb/brcm,bdc.yaml
Normal file
50
bindings/usb/brcm,bdc.yaml
Normal file
@@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/brcm,bdc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom USB Device Controller (BDC)
|
||||
|
||||
maintainers:
|
||||
- Al Cooper <alcooperx@gmail.com>
|
||||
- Florian Fainelli <f.fainelli@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- brcm,bdc-udc-v2
|
||||
- brcm,bdc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB 2.0 or 3.0 PHY
|
||||
- description: USB 3.0 PHY if there is a dedicated 2.0 PHY
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb@f0b02000 {
|
||||
compatible = "brcm,bdc-udc-v2";
|
||||
reg = <0xf0b02000 0xfc4>;
|
||||
interrupts = <0x0 0x60 0x0>;
|
||||
phys = <&usbphy_0 0x0>;
|
||||
clocks = <&sw_usbd>;
|
||||
};
|
||||
73
bindings/usb/brcm,usb-pinmap.yaml
Normal file
73
bindings/usb/brcm,usb-pinmap.yaml
Normal file
@@ -0,0 +1,73 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/brcm,usb-pinmap.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom USB pin map Controller
|
||||
|
||||
maintainers:
|
||||
- Al Cooper <alcooperx@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: brcm,usb-pinmap
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: Interrupt for signals mirrored to out-gpios.
|
||||
|
||||
in-gpios:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
description: Array of one or two GPIO pins used for input signals.
|
||||
|
||||
brcm,in-functions:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description: Array of input signal names, one per gpio in in-gpios.
|
||||
|
||||
brcm,in-masks:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
description: Array of enable and mask pairs, one per gpio in-gpios.
|
||||
|
||||
out-gpios:
|
||||
maxItems: 1
|
||||
description: Array of one GPIO pin used for output signals.
|
||||
|
||||
brcm,out-functions:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description: Array of output signal names, one per gpio in out-gpios.
|
||||
|
||||
brcm,out-masks:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
description: Array of enable, value, changed and clear masks, one
|
||||
per gpio in out-gpios.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
dependencies:
|
||||
in-gpios: [ interrupts ]
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb_pinmap: usb-pinmap@22000d0 {
|
||||
compatible = "brcm,usb-pinmap";
|
||||
reg = <0x22000d0 0x4>;
|
||||
in-gpios = <&gpio 18 0>, <&gpio 19 0>;
|
||||
brcm,in-functions = "VBUS", "PWRFLT";
|
||||
brcm,in-masks = <0x8000 0x40000 0x10000 0x80000>;
|
||||
out-gpios = <&gpio 20 0>;
|
||||
brcm,out-functions = "PWRON";
|
||||
brcm,out-masks = <0x20000 0x800000 0x400000 0x200000>;
|
||||
interrupts = <0x0 0xb2 0x4>;
|
||||
};
|
||||
|
||||
...
|
||||
102
bindings/usb/cdns,usb3.yaml
Normal file
102
bindings/usb/cdns,usb3.yaml
Normal file
@@ -0,0 +1,102 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/cdns,usb3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cadence USBSS-DRD controller bindings
|
||||
|
||||
maintainers:
|
||||
- Pawel Laszczak <pawell@cadence.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cdns,usb3
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: OTG controller registers
|
||||
- description: XHCI Host controller registers
|
||||
- description: DEVICE controller registers
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: otg
|
||||
- const: xhci
|
||||
- const: dev
|
||||
|
||||
interrupts:
|
||||
minItems: 3
|
||||
items:
|
||||
- description: XHCI host controller interrupt
|
||||
- description: Device controller interrupt
|
||||
- description: OTG/DRD controller interrupt
|
||||
- description: interrupt used to wake up core, e.g when usbcmd.rs is
|
||||
cleared by xhci core, this interrupt is optional
|
||||
|
||||
interrupt-names:
|
||||
minItems: 3
|
||||
items:
|
||||
- const: host
|
||||
- const: peripheral
|
||||
- const: otg
|
||||
- const: wakeup
|
||||
|
||||
dr_mode:
|
||||
enum: [host, otg, peripheral]
|
||||
|
||||
maximum-speed:
|
||||
enum: [super-speed, high-speed, full-speed]
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
anyOf:
|
||||
- const: cdns3,usb2-phy
|
||||
- const: cdns3,usb3-phy
|
||||
|
||||
cdns,on-chip-buff-size:
|
||||
description:
|
||||
size of memory intended as internal memory for endpoints
|
||||
buffers expressed in KB
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
cdns,phyrst-a-enable:
|
||||
description: Enable resetting of PHY if Rx fail is detected
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@6000000 {
|
||||
compatible = "cdns,usb3";
|
||||
reg = <0x00 0x6000000 0x00 0x10000>,
|
||||
<0x00 0x6010000 0x00 0x10000>,
|
||||
<0x00 0x6020000 0x00 0x10000>;
|
||||
reg-names = "otg", "xhci", "dev";
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "host", "peripheral", "otg";
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
};
|
||||
158
bindings/usb/ci-hdrc-usb2.txt
Normal file
158
bindings/usb/ci-hdrc-usb2.txt
Normal file
@@ -0,0 +1,158 @@
|
||||
* USB2 ChipIdea USB controller for ci13xxx
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of:
|
||||
"fsl,imx23-usb"
|
||||
"fsl,imx27-usb"
|
||||
"fsl,imx28-usb"
|
||||
"fsl,imx6q-usb"
|
||||
"fsl,imx6sl-usb"
|
||||
"fsl,imx6sx-usb"
|
||||
"fsl,imx6ul-usb"
|
||||
"fsl,imx7d-usb"
|
||||
"fsl,imx7ulp-usb"
|
||||
"lsi,zevio-usb"
|
||||
"qcom,ci-hdrc"
|
||||
"chipidea,usb2"
|
||||
"xlnx,zynq-usb-2.20a"
|
||||
"nvidia,tegra20-udc"
|
||||
"nvidia,tegra30-udc"
|
||||
"nvidia,tegra114-udc"
|
||||
"nvidia,tegra124-udc"
|
||||
- reg: base address and length of the registers
|
||||
- interrupts: interrupt for the USB controller
|
||||
|
||||
Recommended properies:
|
||||
- phy_type: the type of the phy connected to the core. Should be one
|
||||
of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
|
||||
property the PORTSC register won't be touched.
|
||||
- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
|
||||
|
||||
Deprecated properties:
|
||||
- usb-phy: phandle for the PHY device. Use "phys" instead.
|
||||
- fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.
|
||||
|
||||
Optional properties:
|
||||
- clocks: reference to the USB clock
|
||||
- phys: reference to the USB PHY
|
||||
- phy-names: should be "usb-phy"
|
||||
- vbus-supply: reference to the VBUS regulator
|
||||
- maximum-speed: limit the maximum connection speed to "full-speed".
|
||||
- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
|
||||
- itc-setting: interrupt threshold control register control, the setting
|
||||
should be aligned with ITC bits at register USBCMD.
|
||||
- ahb-burst-config: it is vendor dependent, the required value should be
|
||||
aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This
|
||||
property is used to change AHB burst configuration, check the chipidea
|
||||
spec for meaning of each value. If this property is not existed, it
|
||||
will use the reset value.
|
||||
- tx-burst-size-dword: it is vendor dependent, the tx burst size in dword
|
||||
(4 bytes), This register represents the maximum length of a the burst
|
||||
in 32-bit words while moving data from system memory to the USB
|
||||
bus, the value of this property will only take effect if property
|
||||
"ahb-burst-config" is set to 0, if this property is missing the reset
|
||||
default of the hardware implementation will be used.
|
||||
- rx-burst-size-dword: it is vendor dependent, the rx burst size in dword
|
||||
(4 bytes), This register represents the maximum length of a the burst
|
||||
in 32-bit words while moving data from the USB bus to system memory,
|
||||
the value of this property will only take effect if property
|
||||
"ahb-burst-config" is set to 0, if this property is missing the reset
|
||||
default of the hardware implementation will be used.
|
||||
- extcon: phandles to external connector devices. First phandle should point to
|
||||
external connector, which provide "USB" cable events, the second should point
|
||||
to external connector device, which provide "USB-HOST" cable events. If one
|
||||
of the external connector devices is not required, empty <0> phandle should
|
||||
be specified.
|
||||
- phy-clkgate-delay-us: the delay time (us) between putting the PHY into
|
||||
low power mode and gating the PHY clock.
|
||||
- non-zero-ttctrl-ttha: after setting this property, the value of register
|
||||
ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default
|
||||
value. It needs to be very carefully for setting this property, it is
|
||||
recommended that consult with your IC engineer before setting this value.
|
||||
On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this
|
||||
property only affects siTD.
|
||||
If this property is not set, the max packet size is 1023 bytes, and if
|
||||
the total of packet size for pervious transactions are more than 256 bytes,
|
||||
it can't accept any transactions within this frame. The use case is single
|
||||
transaction, but higher frame rate.
|
||||
If this property is set, the max packet size is 188 bytes, it can handle
|
||||
more transactions than above case, it can accept transactions until it
|
||||
considers the left room size within frame is less than 188 bytes, software
|
||||
needs to make sure it does not send more than 90%
|
||||
maximum_periodic_data_per_frame. The use case is multiple transactions, but
|
||||
less frame rate.
|
||||
- mux-controls: The mux control for toggling host/device output of this
|
||||
controller. It's expected that a mux state of 0 indicates device mode and a
|
||||
mux state of 1 indicates host mode.
|
||||
- mux-control-names: Shall be "usb_switch" if mux-controls is specified.
|
||||
- pinctrl-names: Names for optional pin modes in "default", "host", "device".
|
||||
In case of HSIC-mode, "idle" and "active" pin modes are mandatory. In this
|
||||
case, the "idle" state needs to pull down the data and strobe pin
|
||||
and the "active" state needs to pull up the strobe pin.
|
||||
- pinctrl-n: alternate pin modes
|
||||
|
||||
i.mx specific properties
|
||||
- fsl,usbmisc: phandler of non-core register device, with one
|
||||
argument that indicate usb controller index
|
||||
- disable-over-current: disable over current detect
|
||||
- over-current-active-low: over current signal polarity is active low.
|
||||
- over-current-active-high: over current signal polarity is active high.
|
||||
It's recommended to specify the over current polarity.
|
||||
- power-active-high: power signal polarity is active high
|
||||
- external-vbus-divider: enables off-chip resistor divider for Vbus
|
||||
- samsung,picophy-pre-emp-curr-control: HS Transmitter Pre-Emphasis Current
|
||||
Control. This signal controls the amount of current sourced to the
|
||||
USB_OTG*_DP and USB_OTG*_DN pins after a J-to-K or K-to-J transition.
|
||||
The range is from 0x0 to 0x3, the default value is 0x1.
|
||||
Details can refer to TXPREEMPAMPTUNE0 bits of USBNC_n_PHY_CFG1.
|
||||
- samsung,picophy-dc-vol-level-adjust: HS DC Voltage Level Adjustment.
|
||||
Adjust the high-speed transmitter DC level voltage.
|
||||
The range is from 0x0 to 0xf, the default value is 0x3.
|
||||
Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
|
||||
|
||||
Example:
|
||||
|
||||
usb@f7ed0000 {
|
||||
compatible = "chipidea,usb2";
|
||||
reg = <0xf7ed0000 0x10000>;
|
||||
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&chip CLKID_USB0>;
|
||||
phys = <&usb_phy0>;
|
||||
phy-names = "usb-phy";
|
||||
vbus-supply = <®_usb0_vbus>;
|
||||
itc-setting = <0x4>; /* 4 micro-frames */
|
||||
/* Incremental burst of unspecified length */
|
||||
ahb-burst-config = <0x0>;
|
||||
tx-burst-size-dword = <0x10>; /* 64 bytes */
|
||||
rx-burst-size-dword = <0x10>;
|
||||
extcon = <0>, <&usb_id>;
|
||||
phy-clkgate-delay-us = <400>;
|
||||
mux-controls = <&usb_switch>;
|
||||
mux-control-names = "usb_switch";
|
||||
};
|
||||
|
||||
Example for HSIC:
|
||||
|
||||
usb@2184400 {
|
||||
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
|
||||
reg = <0x02184400 0x200>;
|
||||
interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6QDL_CLK_USBOH3>;
|
||||
fsl,usbphy = <&usbphynop1>;
|
||||
fsl,usbmisc = <&usbmisc 2>;
|
||||
phy_type = "hsic";
|
||||
dr_mode = "host";
|
||||
ahb-burst-config = <0x0>;
|
||||
tx-burst-size-dword = <0x10>;
|
||||
rx-burst-size-dword = <0x10>;
|
||||
pinctrl-names = "idle", "active";
|
||||
pinctrl-0 = <&pinctrl_usbh2_idle>;
|
||||
pinctrl-1 = <&pinctrl_usbh2_active>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usbnet: ethernet@1 {
|
||||
compatible = "usb424,9730";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
81
bindings/usb/da8xx-usb.txt
Normal file
81
bindings/usb/da8xx-usb.txt
Normal file
@@ -0,0 +1,81 @@
|
||||
TI DA8xx MUSB
|
||||
~~~~~~~~~~~~~
|
||||
For DA8xx/OMAP-L1x/AM17xx/AM18xx platforms.
|
||||
|
||||
Required properties:
|
||||
~~~~~~~~~~~~~~~~~~~~
|
||||
- compatible : Should be set to "ti,da830-musb".
|
||||
|
||||
- reg: Offset and length of the USB controller register set.
|
||||
|
||||
- interrupts: The USB interrupt number.
|
||||
|
||||
- interrupt-names: Should be set to "mc".
|
||||
|
||||
- dr_mode: The USB operation mode. Should be one of "host", "peripheral" or "otg".
|
||||
|
||||
- phys: Phandle for the PHY device
|
||||
|
||||
- phy-names: Should be "usb-phy"
|
||||
|
||||
- dmas: specifies the dma channels
|
||||
|
||||
- dma-names: specifies the names of the channels. Use "rxN" for receive
|
||||
and "txN" for transmit endpoints. N specifies the endpoint number.
|
||||
|
||||
Optional properties:
|
||||
~~~~~~~~~~~~~~~~~~~~
|
||||
- vbus-supply: Phandle to a regulator providing the USB bus power.
|
||||
|
||||
DMA
|
||||
~~~
|
||||
- compatible: ti,da830-cppi41
|
||||
- reg: offset and length of the following register spaces: CPPI DMA Controller,
|
||||
CPPI DMA Scheduler, Queue Manager
|
||||
- reg-names: "controller", "scheduler", "queuemgr"
|
||||
- #dma-cells: should be set to 2. The first number represents the
|
||||
channel number (0 … 3 for endpoints 1 … 4).
|
||||
The second number is 0 for RX and 1 for TX transfers.
|
||||
- dma-channels: should be set to 4 representing the 4 endpoints.
|
||||
- #dma-channels: deprecated
|
||||
|
||||
Example:
|
||||
usb_phy: usb-phy {
|
||||
compatible = "ti,da830-usb-phy";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
usb0: usb@200000 {
|
||||
compatible = "ti,da830-musb";
|
||||
reg = <0x00200000 0x1000>;
|
||||
ranges;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupts = <58>;
|
||||
interrupt-names = "mc";
|
||||
|
||||
dr_mode = "host";
|
||||
vbus-supply = <&usb_vbus>;
|
||||
phys = <&usb_phy 0>;
|
||||
phy-names = "usb-phy";
|
||||
|
||||
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
|
||||
&cppi41dma 2 0 &cppi41dma 3 0
|
||||
&cppi41dma 0 1 &cppi41dma 1 1
|
||||
&cppi41dma 2 1 &cppi41dma 3 1>;
|
||||
dma-names =
|
||||
"rx1", "rx2", "rx3", "rx4",
|
||||
"tx1", "tx2", "tx3", "tx4";
|
||||
|
||||
|
||||
cppi41dma: dma-controller@201000 {
|
||||
compatible = "ti,da830-cppi41";
|
||||
reg = <0x201000 0x1000
|
||||
0x202000 0x1000
|
||||
0x204000 0x4000>;
|
||||
reg-names = "controller", "scheduler", "queuemgr";
|
||||
interrupts = <58>;
|
||||
#dma-cells = <2>;
|
||||
dma-channels = <4>;
|
||||
};
|
||||
|
||||
};
|
||||
193
bindings/usb/dwc2.yaml
Normal file
193
bindings/usb/dwc2.yaml
Normal file
@@ -0,0 +1,193 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/dwc2.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: DesignWare HS OTG USB 2.0 controller Bindings
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: usb-drd.yaml#
|
||||
- $ref: usb-hcd.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: brcm,bcm2835-usb
|
||||
- const: hisilicon,hi6220-usb
|
||||
- const: ingenic,jz4775-otg
|
||||
- const: ingenic,jz4780-otg
|
||||
- const: ingenic,x1000-otg
|
||||
- const: ingenic,x1600-otg
|
||||
- const: ingenic,x1700-otg
|
||||
- const: ingenic,x1830-otg
|
||||
- const: ingenic,x2000-otg
|
||||
- items:
|
||||
- const: rockchip,rk3066-usb
|
||||
- const: snps,dwc2
|
||||
- items:
|
||||
- enum:
|
||||
- rockchip,px30-usb
|
||||
- rockchip,rk3036-usb
|
||||
- rockchip,rk3128-usb
|
||||
- rockchip,rk3188-usb
|
||||
- rockchip,rk3228-usb
|
||||
- rockchip,rk3288-usb
|
||||
- rockchip,rk3308-usb
|
||||
- rockchip,rk3328-usb
|
||||
- rockchip,rk3368-usb
|
||||
- rockchip,rv1108-usb
|
||||
- const: rockchip,rk3066-usb
|
||||
- const: snps,dwc2
|
||||
- const: lantiq,arx100-usb
|
||||
- const: lantiq,xrx200-usb
|
||||
- items:
|
||||
- enum:
|
||||
- amlogic,meson8-usb
|
||||
- amlogic,meson8b-usb
|
||||
- amlogic,meson-gxbb-usb
|
||||
- amlogic,meson-g12a-usb
|
||||
- intel,socfpga-agilex-hsotg
|
||||
- const: snps,dwc2
|
||||
- const: amcc,dwc-otg
|
||||
- const: apm,apm82181-dwc-otg
|
||||
- const: snps,dwc2
|
||||
- const: st,stm32f4x9-fsotg
|
||||
- const: st,stm32f4x9-hsotg
|
||||
- const: st,stm32f7-hsotg
|
||||
- const: st,stm32mp15-fsotg
|
||||
- items:
|
||||
- const: st,stm32mp15-hsotg
|
||||
- const: snps,dwc2
|
||||
- const: samsung,s3c6400-hsotg
|
||||
- const: intel,socfpga-agilex-hsotg
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: otg
|
||||
|
||||
disable-over-current:
|
||||
type: boolean
|
||||
description: whether to disable detection of over-current condition.
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: common reset
|
||||
- description: ecc reset
|
||||
minItems: 1
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: dwc2
|
||||
- const: dwc2-ecc
|
||||
minItems: 1
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
const: usb2-phy
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
vbus-supply:
|
||||
description: reference to the VBUS regulator. Depending on the current mode
|
||||
this is enabled (in "host" mode") or disabled (in "peripheral" mode). The
|
||||
regulator is updated if the controller is configured in "otg" mode and the
|
||||
status changes between "host" and "peripheral".
|
||||
|
||||
vusb_d-supply:
|
||||
description: phandle to voltage regulator of digital section,
|
||||
|
||||
vusb_a-supply:
|
||||
description: phandle to voltage regulator of analog section.
|
||||
|
||||
usb33d-supply:
|
||||
description: reference to the VBUS and ID sensing comparators supply, in
|
||||
order to perform OTG operation, used on STM32MP15 SoCs.
|
||||
|
||||
dr_mode: true
|
||||
|
||||
otg-rev: true
|
||||
|
||||
hnp-disable: true
|
||||
|
||||
srp-disable: true
|
||||
|
||||
usb-role-switch: true
|
||||
|
||||
role-switch-default-mode: true
|
||||
|
||||
g-rx-fifo-size:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: size of rx fifo size in gadget mode.
|
||||
|
||||
g-np-tx-fifo-size:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: size of non-periodic tx fifo size in gadget mode.
|
||||
|
||||
g-tx-fifo-size:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
description: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
|
||||
|
||||
snps,need-phy-for-wake:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: If present indicates that the phy needs to be left on for
|
||||
remote wakeup during suspend.
|
||||
|
||||
snps,reset-phy-on-wake:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: If present indicates that we need to reset the PHY when we
|
||||
detect a wakeup. This is due to a hardware errata.
|
||||
|
||||
port:
|
||||
description:
|
||||
Any connector to the data bus of this controller should be modelled
|
||||
using the OF graph bindings specified, if the "usb-role-switch"
|
||||
property is used.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
tpl-support: true
|
||||
|
||||
dependencies:
|
||||
port: [ usb-role-switch ]
|
||||
role-switch-default-mode: [ usb-role-switch ]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb@101c0000 {
|
||||
compatible = "rockchip,rk3066-usb", "snps,dwc2";
|
||||
reg = <0x10180000 0x40000>;
|
||||
interrupts = <18>;
|
||||
clocks = <&usb_otg_ahb_clk>;
|
||||
clock-names = "otg";
|
||||
phys = <&usbphy>;
|
||||
phy-names = "usb2-phy";
|
||||
};
|
||||
|
||||
...
|
||||
28
bindings/usb/dwc3-cavium.txt
Normal file
28
bindings/usb/dwc3-cavium.txt
Normal file
@@ -0,0 +1,28 @@
|
||||
Cavium SuperSpeed DWC3 USB SoC controller
|
||||
|
||||
Required properties:
|
||||
- compatible: Should contain "cavium,octeon-7130-usb-uctl"
|
||||
|
||||
Required child node:
|
||||
A child node must exist to represent the core DWC3 IP block. The name of
|
||||
the node is not important. The content of the node is defined in dwc3.txt.
|
||||
|
||||
Example device node:
|
||||
|
||||
uctl@1180069000000 {
|
||||
compatible = "cavium,octeon-7130-usb-uctl";
|
||||
reg = <0x00011800 0x69000000 0x00000000 0x00000100>;
|
||||
ranges;
|
||||
#address-cells = <0x00000002>;
|
||||
#size-cells = <0x00000002>;
|
||||
refclk-frequency = <0x05f5e100>;
|
||||
refclk-type-ss = "dlmc_ref_clk0";
|
||||
refclk-type-hs = "dlmc_ref_clk0";
|
||||
power = <0x00000002 0x00000002 0x00000001>;
|
||||
xhci@1690000000000 {
|
||||
compatible = "cavium,octeon-7130-xhci", "snps,dwc3";
|
||||
reg = <0x00016900 0x00000000 0x00000010 0x00000000>;
|
||||
interrupt-parent = <0x00000010>;
|
||||
interrupts = <0x00000009 0x00000004>;
|
||||
};
|
||||
};
|
||||
66
bindings/usb/dwc3-st.txt
Normal file
66
bindings/usb/dwc3-st.txt
Normal file
@@ -0,0 +1,66 @@
|
||||
ST DWC3 glue logic
|
||||
|
||||
This file documents the parameters for the dwc3-st driver.
|
||||
This driver controls the glue logic used to configure the dwc3 core on
|
||||
STiH407 based platforms.
|
||||
|
||||
Required properties:
|
||||
- compatible : must be "st,stih407-dwc3"
|
||||
- reg : glue logic base address and USB syscfg ctrl register offset
|
||||
- reg-names : should be "reg-glue" and "syscfg-reg"
|
||||
- st,syscon : should be phandle to system configuration node which
|
||||
encompasses the glue registers
|
||||
- resets : list of phandle and reset specifier pairs. There should be two entries, one
|
||||
for the powerdown and softreset lines of the usb3 IP
|
||||
- reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
|
||||
See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
|
||||
See: Documentation/devicetree/bindings/reset/reset.txt
|
||||
|
||||
- #address-cells, #size-cells : should be '1' if the device has sub-nodes
|
||||
with 'reg' property
|
||||
|
||||
- pinctl-names : A pinctrl state named "default" must be defined
|
||||
See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
|
||||
|
||||
- pinctrl-0 : Pin control group
|
||||
See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
|
||||
|
||||
- ranges : allows valid 1:1 translation between child's address space and
|
||||
parent's address space
|
||||
|
||||
Sub-nodes:
|
||||
The dwc3 core should be added as subnode to ST DWC3 glue as shown in the
|
||||
example below. The DT binding details of dwc3 can be found in:
|
||||
Documentation/devicetree/bindings/usb/snps,dwc3.yaml
|
||||
|
||||
NB: The dr_mode property described in [1] is NOT optional for this driver, as the default value
|
||||
is "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st are either "host"
|
||||
or "device".
|
||||
|
||||
[1] Documentation/devicetree/bindings/usb/usb-drd.yaml
|
||||
|
||||
Example:
|
||||
|
||||
st_dwc3: dwc3@8f94000 {
|
||||
compatible = "st,stih407-dwc3";
|
||||
reg = <0x08f94000 0x1000>, <0x110 0x4>;
|
||||
reg-names = "reg-glue", "syscfg-reg";
|
||||
st,syscfg = <&syscfg_core>;
|
||||
resets = <&powerdown STIH407_USB3_POWERDOWN>,
|
||||
<&softreset STIH407_MIPHY2_SOFTRESET>;
|
||||
reset-names = "powerdown", "softreset";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb3>;
|
||||
ranges;
|
||||
|
||||
dwc3: dwc3@9900000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x09900000 0x100000>;
|
||||
interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>;
|
||||
dr_mode = "host";
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
phys = <&usb2_picophy2>, <&phy_port2 PHY_TYPE_USB3>;
|
||||
};
|
||||
};
|
||||
135
bindings/usb/dwc3-xilinx.yaml
Normal file
135
bindings/usb/dwc3-xilinx.yaml
Normal file
@@ -0,0 +1,135 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/dwc3-xilinx.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Xilinx SuperSpeed DWC3 USB SoC controller
|
||||
|
||||
maintainers:
|
||||
- Manish Narani <manish.narani@xilinx.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-dwc3
|
||||
- xlnx,versal-dwc3
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
ranges: true
|
||||
|
||||
power-domains:
|
||||
description: specifies a phandle to PM domain provider node
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description:
|
||||
A list of phandle and clock-specifier pairs for the clocks
|
||||
listed in clock-names.
|
||||
items:
|
||||
- description: Master/Core clock, has to be >= 125 MHz
|
||||
for SS operation and >= 60MHz for HS operation.
|
||||
- description: Clock source to core during PHY power down.
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus_clk
|
||||
- const: ref_clk
|
||||
|
||||
resets:
|
||||
description:
|
||||
A list of phandles for resets listed in reset-names.
|
||||
|
||||
items:
|
||||
- description: USB core reset
|
||||
- description: USB hibernation reset
|
||||
- description: USB APB reset
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: usb_crst
|
||||
- const: usb_hibrst
|
||||
- const: usb_apbrst
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- usb2-phy
|
||||
- usb3-phy
|
||||
|
||||
reset-gpios:
|
||||
description: GPIO used for the reset ulpi-phy
|
||||
maxItems: 1
|
||||
|
||||
# Required child node:
|
||||
|
||||
patternProperties:
|
||||
"^usb@[0-9a-f]+$":
|
||||
$ref: snps,dwc3.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
|
||||
#include <dt-bindings/power/xlnx-zynqmp-power.h>
|
||||
#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
|
||||
#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
|
||||
#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
axi {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@0 {
|
||||
#address-cells = <0x2>;
|
||||
#size-cells = <0x2>;
|
||||
compatible = "xlnx,zynqmp-dwc3";
|
||||
reg = <0x0 0xff9d0000 0x0 0x100>;
|
||||
clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
|
||||
clock-names = "bus_clk", "ref_clk";
|
||||
power-domains = <&zynqmp_firmware PD_USB_0>;
|
||||
resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
|
||||
<&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,
|
||||
<&zynqmp_reset ZYNQMP_RESET_USB1_APB>;
|
||||
reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";
|
||||
phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
|
||||
phy-names = "usb3-phy";
|
||||
ranges;
|
||||
|
||||
usb@fe200000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x0 0xfe200000 0x0 0x40000>;
|
||||
interrupt-names = "host", "otg";
|
||||
interrupts = <0 65 4>, <0 69 4>;
|
||||
dr_mode = "host";
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
};
|
||||
31
bindings/usb/ehci-omap.txt
Normal file
31
bindings/usb/ehci-omap.txt
Normal file
@@ -0,0 +1,31 @@
|
||||
OMAP HS USB EHCI controller
|
||||
|
||||
This device is usually the child of the omap-usb-host
|
||||
Documentation/devicetree/bindings/mfd/omap-usb-host.txt
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: should be "ti,ehci-omap"
|
||||
- reg: should contain one register range i.e. start and length
|
||||
- interrupts: description of the interrupt line
|
||||
|
||||
Optional properties:
|
||||
|
||||
- phys: list of phandles to PHY nodes.
|
||||
This property is required if at least one of the ports are in
|
||||
PHY mode i.e. OMAP_EHCI_PORT_MODE_PHY
|
||||
|
||||
To specify the port mode, see
|
||||
Documentation/devicetree/bindings/mfd/omap-usb-host.txt
|
||||
|
||||
Example for OMAP4:
|
||||
|
||||
usbhsehci: ehci@4a064c00 {
|
||||
compatible = "ti,ehci-omap";
|
||||
reg = <0x4a064c00 0x400>;
|
||||
interrupts = <0 77 0x4>;
|
||||
};
|
||||
|
||||
&usbhsehci {
|
||||
phys = <&hsusb1_phy 0 &hsusb3_phy>;
|
||||
};
|
||||
22
bindings/usb/ehci-orion.txt
Normal file
22
bindings/usb/ehci-orion.txt
Normal file
@@ -0,0 +1,22 @@
|
||||
* EHCI controller, Orion Marvell variants
|
||||
|
||||
Required properties:
|
||||
- compatible: must be one of the following
|
||||
"marvell,orion-ehci"
|
||||
"marvell,armada-3700-ehci"
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: The EHCI interrupt
|
||||
|
||||
Optional properties:
|
||||
- clocks: reference to the clock
|
||||
- phys: reference to the USB PHY
|
||||
- phy-names: name of the USB PHY, should be "usb"
|
||||
|
||||
Example:
|
||||
|
||||
ehci@50000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <19>;
|
||||
};
|
||||
38
bindings/usb/ehci-st.txt
Normal file
38
bindings/usb/ehci-st.txt
Normal file
@@ -0,0 +1,38 @@
|
||||
ST USB EHCI controller
|
||||
|
||||
Required properties:
|
||||
- compatible : must be "st,st-ehci-300x"
|
||||
- reg : physical base addresses of the controller and length of memory mapped
|
||||
region
|
||||
- interrupts : one EHCI interrupt should be described here
|
||||
- pinctrl-names : a pinctrl state named "default" must be defined
|
||||
- pinctrl-0 : phandle referencing pin configuration of the USB controller
|
||||
See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
|
||||
- clocks : phandle list of usb clocks
|
||||
- clock-names : should be "ic" for interconnect clock and "clk48"
|
||||
See: Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
- phys : phandle for the PHY device
|
||||
- phy-names : should be "usb"
|
||||
- resets : phandle + reset specifier pairs to the powerdown and softreset lines
|
||||
of the USB IP
|
||||
- reset-names : should be "power" and "softreset"
|
||||
See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
|
||||
See: Documentation/devicetree/bindings/reset/reset.txt
|
||||
|
||||
Example:
|
||||
|
||||
ehci1: usb@fe203e00 {
|
||||
compatible = "st,st-ehci-300x";
|
||||
reg = <0xfe203e00 0x100>;
|
||||
interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>;
|
||||
clocks = <&clk_s_a1_ls 0>;
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb";
|
||||
|
||||
resets = <&powerdown STIH416_USB1_POWERDOWN>,
|
||||
<&softreset STIH416_USB1_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
};
|
||||
77
bindings/usb/faraday,fotg210.yaml
Normal file
77
bindings/usb/faraday,fotg210.yaml
Normal file
@@ -0,0 +1,77 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2022 Linaro Ltd.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/faraday,fotg210.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Faraday Technology FOTG210 HS OTG USB 2.0 controller Bindings
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: usb-drd.yaml#
|
||||
- $ref: usb-hcd.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: faraday,fotg210
|
||||
- items:
|
||||
- const: cortina,gemini-usb
|
||||
- const: faraday,fotg210
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: PCLK
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
syscon:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: a phandle to the global Gemini system controller on
|
||||
Gemini systems
|
||||
|
||||
dr_mode: true
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
const: usb2-phy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/cortina,gemini-clock.h>
|
||||
#include <dt-bindings/reset/cortina,gemini-reset.h>
|
||||
usb0: usb@68000000 {
|
||||
compatible = "cortina,gemini-usb", "faraday,fotg210";
|
||||
reg = <0x68000000 0x1000>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
resets = <&syscon GEMINI_RESET_USB0>;
|
||||
clocks = <&syscon GEMINI_CLK_GATE_USB0>;
|
||||
clock-names = "PCLK";
|
||||
syscon = <&syscon>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
72
bindings/usb/fcs,fsa4480.yaml
Normal file
72
bindings/usb/fcs,fsa4480.yaml
Normal file
@@ -0,0 +1,72 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/fcs,fsa4480.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: ON Semiconductor Analog Audio Switch
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fcs,fsa4480
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
vcc-supply:
|
||||
description: power supply (2.7V-5.5V)
|
||||
|
||||
mode-switch:
|
||||
description: Flag the port as possible handle of altmode switching
|
||||
type: boolean
|
||||
|
||||
orientation-switch:
|
||||
description: Flag the port as possible handler of orientation switching
|
||||
type: boolean
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node to link the FSA4480 to a TypeC controller for the purpose of
|
||||
handling altmode muxing and orientation switching.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c13 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
fsa4480@42 {
|
||||
compatible = "fcs,fsa4480";
|
||||
reg = <0x42>;
|
||||
|
||||
interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
vcc-supply = <&vreg_bob>;
|
||||
|
||||
mode-switch;
|
||||
orientation-switch;
|
||||
|
||||
port {
|
||||
fsa4480_ept: endpoint {
|
||||
remote-endpoint = <&typec_controller>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
34
bindings/usb/fcs,fusb302.txt
Normal file
34
bindings/usb/fcs,fusb302.txt
Normal file
@@ -0,0 +1,34 @@
|
||||
Fairchild FUSB302 Type-C Port controllers
|
||||
|
||||
Required properties :
|
||||
- compatible : "fcs,fusb302"
|
||||
- reg : I2C slave address
|
||||
- interrupts : Interrupt specifier
|
||||
|
||||
Required sub-node:
|
||||
- connector : The "usb-c-connector" attached to the FUSB302 IC. The bindings
|
||||
of the connector node are specified in:
|
||||
|
||||
Documentation/devicetree/bindings/connector/usb-connector.yaml
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
fusb302: typec-portc@54 {
|
||||
compatible = "fcs,fusb302";
|
||||
reg = <0x54>;
|
||||
interrupt-parent = <&nmi_intc>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
usb_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
|
||||
PDO_VAR(3000, 12000, 3000)
|
||||
PDO_PPS_APDO(3000, 11000, 3000)>;
|
||||
op-sink-microwatt = <10000000>;
|
||||
};
|
||||
};
|
||||
125
bindings/usb/fsl,imx8mp-dwc3.yaml
Normal file
125
bindings/usb/fsl,imx8mp-dwc3.yaml
Normal file
@@ -0,0 +1,125 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 NXP
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP iMX8MP Soc USB Controller
|
||||
|
||||
maintainers:
|
||||
- Li Jun <jun.li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8mp-dwc3
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: Address and length of the register set for HSIO Block Control
|
||||
- description: Address and length of the register set for the wrapper of dwc3 core on the SOC.
|
||||
|
||||
"#address-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
dma-ranges:
|
||||
description:
|
||||
See section 2.3.9 of the DeviceTree Specification.
|
||||
|
||||
ranges: true
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: The interrupt that is asserted when a wakeup event is
|
||||
received.
|
||||
|
||||
clocks:
|
||||
description:
|
||||
A list of phandle and clock-specifier pairs for the clocks
|
||||
listed in clock-names.
|
||||
items:
|
||||
- description: system hsio root clock.
|
||||
- description: suspend clock, used for usb wakeup logic.
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: hsio
|
||||
- const: suspend
|
||||
|
||||
fsl,permanently-attached:
|
||||
type: boolean
|
||||
description:
|
||||
Indicates if the device atached to a downstream port is
|
||||
permanently attached.
|
||||
|
||||
fsl,disable-port-power-control:
|
||||
type: boolean
|
||||
description:
|
||||
Indicates whether the host controller implementation includes port
|
||||
power control. Defines Bit 3 in capability register (HCCPARAMS).
|
||||
|
||||
fsl,over-current-active-low:
|
||||
type: boolean
|
||||
description:
|
||||
Over current signal polarity is active low.
|
||||
|
||||
fsl,power-active-low:
|
||||
type: boolean
|
||||
description:
|
||||
Power pad (PWR) polarity is active low.
|
||||
|
||||
# Required child node:
|
||||
|
||||
patternProperties:
|
||||
"^usb@[0-9a-f]+$":
|
||||
$ref: snps,dwc3.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- dma-ranges
|
||||
- ranges
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx8mp-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
usb3_0: usb@32f10100 {
|
||||
compatible = "fsl,imx8mp-dwc3";
|
||||
reg = <0x32f10100 0x8>,
|
||||
<0x381f0000 0x20>;
|
||||
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
|
||||
<&clk IMX8MP_CLK_USB_ROOT>;
|
||||
clock-names = "hsio", "suspend";
|
||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
dma-ranges = <0x40000000 0x40000000 0xc0000000>;
|
||||
ranges;
|
||||
|
||||
usb@38100000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x38100000 0x10000>;
|
||||
clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
|
||||
<&clk IMX8MP_CLK_USB_CORE_REF>,
|
||||
<&clk IMX8MP_CLK_USB_ROOT>;
|
||||
clock-names = "bus_early", "ref", "suspend";
|
||||
assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
|
||||
assigned-clock-rates = <500000000>;
|
||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&usb3_phy0>, <&usb3_phy0>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
snps,dis-u2-freeclk-exists-quirk;
|
||||
};
|
||||
};
|
||||
81
bindings/usb/fsl-usb.txt
Normal file
81
bindings/usb/fsl-usb.txt
Normal file
@@ -0,0 +1,81 @@
|
||||
Freescale SOC USB controllers
|
||||
|
||||
The device node for a USB controller that is part of a Freescale
|
||||
SOC is as described in the document "Open Firmware Recommended
|
||||
Practice : Universal Serial Bus" with the following modifications
|
||||
and additions :
|
||||
|
||||
Required properties :
|
||||
- compatible : Should be "fsl-usb2-mph" for multi port host USB
|
||||
controllers, or "fsl-usb2-dr" for dual role USB controllers
|
||||
or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121.
|
||||
Wherever applicable, the IP version of the USB controller should
|
||||
also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132).
|
||||
- phy_type : For multi port host USB controllers, should be one of
|
||||
"ulpi", or "serial". For dual role USB controllers, should be
|
||||
one of "ulpi", "utmi", "utmi_wide", or "serial".
|
||||
- reg : Offset and length of the register set for the device
|
||||
- port0 : boolean; if defined, indicates port0 is connected for
|
||||
fsl-usb2-mph compatible controllers. Either this property or
|
||||
"port1" (or both) must be defined for "fsl-usb2-mph" compatible
|
||||
controllers.
|
||||
- port1 : boolean; if defined, indicates port1 is connected for
|
||||
fsl-usb2-mph compatible controllers. Either this property or
|
||||
"port0" (or both) must be defined for "fsl-usb2-mph" compatible
|
||||
controllers.
|
||||
- dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
|
||||
controllers. Can be "host", "peripheral", or "otg". Default to
|
||||
"host" if not defined for backward compatibility.
|
||||
|
||||
Recommended properties :
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
field that represents an encoding of the sense and level
|
||||
information for the interrupt. This should be encoded based on
|
||||
the information in section 2) depending on the type of interrupt
|
||||
controller you have.
|
||||
|
||||
Optional properties :
|
||||
- fsl,invert-drvvbus : boolean; for MPC5121 USB0 only. Indicates the
|
||||
port power polarity of internal PHY signal DRVVBUS is inverted.
|
||||
- fsl,invert-pwr-fault : boolean; for MPC5121 USB0 only. Indicates
|
||||
the PWR_FAULT signal polarity is inverted.
|
||||
|
||||
Example multi port host USB controller device node :
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-mph";
|
||||
reg = <22000 1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <27 1>;
|
||||
phy_type = "ulpi";
|
||||
port0;
|
||||
port1;
|
||||
};
|
||||
|
||||
Example dual role USB controller device node :
|
||||
usb@23000 {
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <23000 1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <26 1>;
|
||||
dr_mode = "otg";
|
||||
phy = "ulpi";
|
||||
};
|
||||
|
||||
Example dual role USB controller device node for MPC5121ADS:
|
||||
|
||||
usb@4000 {
|
||||
compatible = "fsl,mpc5121-usb2-dr";
|
||||
reg = <0x4000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = < &ipic >;
|
||||
interrupts = <44 0x8>;
|
||||
dr_mode = "otg";
|
||||
phy_type = "utmi_wide";
|
||||
fsl,invert-drvvbus;
|
||||
fsl,invert-pwr-fault;
|
||||
};
|
||||
177
bindings/usb/generic-ehci.yaml
Normal file
177
bindings/usb/generic-ehci.yaml
Normal file
@@ -0,0 +1,177 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: USB EHCI Controller
|
||||
|
||||
maintainers:
|
||||
- Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "usb-hcd.yaml"
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
not:
|
||||
contains:
|
||||
const: ibm,usb-ehci-440epx
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- allwinner,sun4i-a10-ehci
|
||||
- allwinner,sun50i-a64-ehci
|
||||
- allwinner,sun50i-h6-ehci
|
||||
- allwinner,sun50i-h616-ehci
|
||||
- allwinner,sun5i-a13-ehci
|
||||
- allwinner,sun6i-a31-ehci
|
||||
- allwinner,sun7i-a20-ehci
|
||||
- allwinner,sun8i-a23-ehci
|
||||
- allwinner,sun8i-a83t-ehci
|
||||
- allwinner,sun8i-h3-ehci
|
||||
- allwinner,sun8i-r40-ehci
|
||||
- allwinner,sun9i-a80-ehci
|
||||
- allwinner,sun20i-d1-ehci
|
||||
- aspeed,ast2400-ehci
|
||||
- aspeed,ast2500-ehci
|
||||
- aspeed,ast2600-ehci
|
||||
- brcm,bcm3384-ehci
|
||||
- brcm,bcm63268-ehci
|
||||
- brcm,bcm6328-ehci
|
||||
- brcm,bcm6358-ehci
|
||||
- brcm,bcm6362-ehci
|
||||
- brcm,bcm6368-ehci
|
||||
- brcm,bcm7125-ehci
|
||||
- brcm,bcm7346-ehci
|
||||
- brcm,bcm7358-ehci
|
||||
- brcm,bcm7360-ehci
|
||||
- brcm,bcm7362-ehci
|
||||
- brcm,bcm7420-ehci
|
||||
- brcm,bcm7425-ehci
|
||||
- brcm,bcm7435-ehci
|
||||
- hpe,gxp-ehci
|
||||
- ibm,476gtr-ehci
|
||||
- nxp,lpc1850-ehci
|
||||
- qca,ar7100-ehci
|
||||
- snps,hsdk-v1.0-ehci
|
||||
- socionext,uniphier-ehci
|
||||
- const: generic-ehci
|
||||
- items:
|
||||
- enum:
|
||||
- cavium,octeon-6335-ehci
|
||||
- ibm,usb-ehci-440epx
|
||||
- ibm,usb-ehci-460ex
|
||||
- nintendo,hollywood-usb-ehci
|
||||
- st,spear600-ehci
|
||||
- const: usb-ehci
|
||||
- enum:
|
||||
- generic-ehci
|
||||
- usb-ehci
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
description: |
|
||||
In case the Renesas R-Car Gen3 SoCs:
|
||||
- if a host only channel: first clock should be host.
|
||||
- if a USB DRD channel: first clock should be host and second
|
||||
one should be peripheral
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
big-endian:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag for HCDs with big endian descriptors and big
|
||||
endian registers.
|
||||
|
||||
big-endian-desc:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag for HCDs with big endian descriptors.
|
||||
|
||||
big-endian-regs:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag for HCDs with big endian registers.
|
||||
|
||||
has-transaction-translator:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag if EHCI has a Transaction Translator built into
|
||||
the root hub.
|
||||
|
||||
needs-reset-on-resume:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag to force EHCI reset after resume.
|
||||
|
||||
spurious-oc:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag to indicate that the hardware sometimes turns on
|
||||
the OC bit when an over-current isn't actually present.
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
phy-names:
|
||||
const: usb
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
dr_mode:
|
||||
enum:
|
||||
- host
|
||||
- otg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb@e0000300 {
|
||||
compatible = "ibm,usb-ehci-440epx", "usb-ehci";
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x1a 4>;
|
||||
reg = <0xe0000300 90>, <0xe0000390 70>;
|
||||
big-endian;
|
||||
};
|
||||
|
||||
- |
|
||||
ehci0: usb@1c14000 {
|
||||
compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
|
||||
reg = <0x01c14000 0x100>;
|
||||
interrupts = <39>;
|
||||
clocks = <&ahb_gates 1>;
|
||||
phys = <&usbphy 1>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
|
||||
...
|
||||
140
bindings/usb/generic-ohci.yaml
Normal file
140
bindings/usb/generic-ohci.yaml
Normal file
@@ -0,0 +1,140 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/generic-ohci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: USB OHCI Controller
|
||||
|
||||
allOf:
|
||||
- $ref: "usb-hcd.yaml"
|
||||
|
||||
maintainers:
|
||||
- Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- allwinner,sun4i-a10-ohci
|
||||
- allwinner,sun50i-a64-ohci
|
||||
- allwinner,sun50i-h6-ohci
|
||||
- allwinner,sun50i-h616-ohci
|
||||
- allwinner,sun5i-a13-ohci
|
||||
- allwinner,sun6i-a31-ohci
|
||||
- allwinner,sun7i-a20-ohci
|
||||
- allwinner,sun8i-a23-ohci
|
||||
- allwinner,sun8i-a83t-ohci
|
||||
- allwinner,sun8i-h3-ohci
|
||||
- allwinner,sun8i-r40-ohci
|
||||
- allwinner,sun9i-a80-ohci
|
||||
- allwinner,sun20i-d1-ohci
|
||||
- brcm,bcm3384-ohci
|
||||
- brcm,bcm63268-ohci
|
||||
- brcm,bcm6328-ohci
|
||||
- brcm,bcm6358-ohci
|
||||
- brcm,bcm6362-ohci
|
||||
- brcm,bcm6368-ohci
|
||||
- brcm,bcm7125-ohci
|
||||
- brcm,bcm7346-ohci
|
||||
- brcm,bcm7358-ohci
|
||||
- brcm,bcm7360-ohci
|
||||
- brcm,bcm7362-ohci
|
||||
- brcm,bcm7420-ohci
|
||||
- brcm,bcm7425-ohci
|
||||
- brcm,bcm7435-ohci
|
||||
- hpe,gxp-ohci
|
||||
- ibm,476gtr-ohci
|
||||
- ingenic,jz4740-ohci
|
||||
- snps,hsdk-v1.0-ohci
|
||||
- const: generic-ohci
|
||||
- const: generic-ohci
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
description: |
|
||||
In case the Renesas R-Car Gen3 SoCs:
|
||||
- if a host only channel: first clock should be host.
|
||||
- if a USB DRD channel: first clock should be host and second
|
||||
one should be peripheral
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
big-endian:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag for HCDs with big endian descriptors and big
|
||||
endian registers.
|
||||
|
||||
big-endian-desc:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag for HCDs with big endian descriptors.
|
||||
|
||||
big-endian-regs:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set this flag for HCDs with big endian registers.
|
||||
|
||||
remote-wakeup-connected:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Remote wakeup is wired on the platform.
|
||||
|
||||
no-big-frame-no:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Set if frame_no lives in bits [15:0] of HCCA
|
||||
|
||||
num-ports:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
Overrides the detected port count
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
phy-names:
|
||||
const: usb
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
dr_mode:
|
||||
enum:
|
||||
- host
|
||||
- otg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
ohci0: usb@1c14400 {
|
||||
compatible = "allwinner,sun4i-a10-ohci", "generic-ohci";
|
||||
reg = <0x01c14400 0x100>;
|
||||
interrupts = <64>;
|
||||
clocks = <&usb_clk 6>, <&ahb_gates 2>;
|
||||
phys = <&usbphy 1>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
|
||||
...
|
||||
65
bindings/usb/generic-xhci.yaml
Normal file
65
bindings/usb/generic-xhci.yaml
Normal file
@@ -0,0 +1,65 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/generic-xhci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: USB xHCI Controller
|
||||
|
||||
maintainers:
|
||||
- Mathias Nyman <mathias.nyman@intel.com>
|
||||
|
||||
allOf:
|
||||
- $ref: "usb-xhci.yaml#"
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Generic xHCI device
|
||||
const: generic-xhci
|
||||
- description: Armada 37xx/375/38x/8k SoCs
|
||||
items:
|
||||
- enum:
|
||||
- marvell,armada3700-xhci
|
||||
- marvell,armada-375-xhci
|
||||
- marvell,armada-380-xhci
|
||||
- marvell,armada-8k-xhci
|
||||
- const: generic-xhci
|
||||
- description: Broadcom STB SoCs with xHCI
|
||||
enum:
|
||||
- brcm,xhci-brcm-v2
|
||||
- brcm,bcm7445-xhci
|
||||
- description: Generic xHCI device
|
||||
const: xhci-platform
|
||||
deprecated: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: core
|
||||
- const: reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb@f0931000 {
|
||||
compatible = "generic-xhci";
|
||||
reg = <0xf0931000 0x8c8>;
|
||||
interrupts = <0x0 0x4e 0x0>;
|
||||
};
|
||||
34
bindings/usb/gr-udc.txt
Normal file
34
bindings/usb/gr-udc.txt
Normal file
@@ -0,0 +1,34 @@
|
||||
USB Peripheral Controller driver for Aeroflex Gaisler GRUSBDC.
|
||||
|
||||
The GRUSBDC USB Device Controller core is available in the GRLIB VHDL
|
||||
IP core library.
|
||||
|
||||
Note: In the ordinary environment for the core, a Leon SPARC system,
|
||||
these properties are built from information in the AMBA plug&play.
|
||||
|
||||
Required properties:
|
||||
|
||||
- name : Should be "GAISLER_USBDC" or "01_021"
|
||||
|
||||
- reg : Address and length of the register set for the device
|
||||
|
||||
- interrupts : Interrupt numbers for this device. Either one interrupt number
|
||||
for all interrupts, or one for status related interrupts, one for IN
|
||||
endpoint related interrupts and one for OUT endpoint related interrupts.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- epobufsizes : Array of buffer sizes for OUT endpoints when they differ
|
||||
from the default size of 1024. The array is indexed by the OUT endpoint
|
||||
number. If the property is present it typically contains one entry for
|
||||
each OUT endpoint of the core. Fewer entries overrides the default sizes
|
||||
only for as many endpoints as the array contains.
|
||||
|
||||
- epibufsizes : Array of buffer sizes for IN endpoints when they differ
|
||||
from the default size of 1024. The array is indexed by the IN endpoint
|
||||
number. If the property is present it typically contains one entry for
|
||||
each IN endpoint of the core. Fewer entries overrides the default sizes
|
||||
only for as many endpoints as the array contains.
|
||||
|
||||
For further information look in the documentation for the GLIB IP core library:
|
||||
http://www.gaisler.com/products/grlib/grip.pdf
|
||||
45
bindings/usb/hisilicon,histb-xhci.txt
Normal file
45
bindings/usb/hisilicon,histb-xhci.txt
Normal file
@@ -0,0 +1,45 @@
|
||||
HiSilicon STB xHCI
|
||||
|
||||
The device node for HiSilicon STB xHCI host controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "hisilicon,hi3798cv200-xhci"
|
||||
- reg: specifies physical base address and size of the registers
|
||||
- interrupts : interrupt used by the controller
|
||||
- clocks: a list of phandle + clock-specifier pairs, one for each
|
||||
entry in clock-names
|
||||
- clock-names: must contain
|
||||
"bus": for bus clock
|
||||
"utmi": for utmi clock
|
||||
"pipe": for pipe clock
|
||||
"suspend": for suspend clock
|
||||
- resets: a list of phandle and reset specifier pairs as listed in
|
||||
reset-names property.
|
||||
- reset-names: must contain
|
||||
"soft": for soft reset
|
||||
- phys: a list of phandle + phy specifier pairs
|
||||
- phy-names: must contain at least one of following:
|
||||
"inno": for inno phy
|
||||
"combo": for combo phy
|
||||
|
||||
Optional properties:
|
||||
- usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM
|
||||
- usb3-lpm-capable: determines if platform is USB3 LPM capable
|
||||
- imod-interval-ns: default interrupt moderation interval is 40000ns
|
||||
|
||||
Example:
|
||||
|
||||
xhci0: xchi@f98a0000 {
|
||||
compatible = "hisilicon,hi3798cv200-xhci";
|
||||
reg = <0xf98a0000 0x10000>;
|
||||
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&crg HISTB_USB3_BUS_CLK>,
|
||||
<&crg HISTB_USB3_UTMI_CLK>,
|
||||
<&crg HISTB_USB3_PIPE_CLK>,
|
||||
<&crg HISTB_USB3_SUSPEND_CLK>;
|
||||
clock-names = "bus", "utmi", "pipe", "suspend";
|
||||
resets = <&crg 0xb0 12>;
|
||||
reset-names = "soft";
|
||||
phys = <&usb2_phy1_port1 0>, <&combphy0 PHY_TYPE_USB3>;
|
||||
phy-names = "inno", "combo";
|
||||
};
|
||||
79
bindings/usb/ingenic,musb.yaml
Normal file
79
bindings/usb/ingenic,musb.yaml
Normal file
@@ -0,0 +1,79 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/ingenic,musb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Ingenic JZ47xx USB IP DT bindings
|
||||
|
||||
maintainers:
|
||||
- Paul Cercueil <paul@crapouillou.net>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: '^usb@.*'
|
||||
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- ingenic,jz4770-musb
|
||||
- ingenic,jz4740-musb
|
||||
- items:
|
||||
- const: ingenic,jz4725b-musb
|
||||
- const: ingenic,jz4740-musb
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: udc
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: mc
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
usb-role-switch:
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- phys
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
|
||||
usb_phy: usb-phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
udc: usb@13040000 {
|
||||
compatible = "ingenic,jz4740-musb";
|
||||
reg = <0x13040000 0x10000>;
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <24>;
|
||||
interrupt-names = "mc";
|
||||
|
||||
clocks = <&cgu JZ4740_CLK_UDC>;
|
||||
clock-names = "udc";
|
||||
|
||||
phys = <&usb_phy>;
|
||||
};
|
||||
77
bindings/usb/intel,keembay-dwc3.yaml
Normal file
77
bindings/usb/intel,keembay-dwc3.yaml
Normal file
@@ -0,0 +1,77 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/intel,keembay-dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Intel Keem Bay DWC3 USB controller
|
||||
|
||||
maintainers:
|
||||
- Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: intel,keembay-dwc3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: async_master
|
||||
- const: ref
|
||||
- const: alt_ref
|
||||
- const: suspend
|
||||
|
||||
ranges: true
|
||||
|
||||
'#address-cells':
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
'#size-cells':
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
# Required child node:
|
||||
|
||||
patternProperties:
|
||||
"^usb@[0-9a-f]+$":
|
||||
$ref: snps,dwc3.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#define KEEM_BAY_A53_AUX_USB
|
||||
#define KEEM_BAY_A53_AUX_USB_REF
|
||||
#define KEEM_BAY_A53_AUX_USB_ALT_REF
|
||||
#define KEEM_BAY_A53_AUX_USB_SUSPEND
|
||||
|
||||
usb {
|
||||
compatible = "intel,keembay-dwc3";
|
||||
clocks = <&scmi_clk KEEM_BAY_A53_AUX_USB>,
|
||||
<&scmi_clk KEEM_BAY_A53_AUX_USB_REF>,
|
||||
<&scmi_clk KEEM_BAY_A53_AUX_USB_ALT_REF>,
|
||||
<&scmi_clk KEEM_BAY_A53_AUX_USB_SUSPEND>;
|
||||
clock-names = "async_master", "ref", "alt_ref", "suspend";
|
||||
ranges;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
usb@34000000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x34000000 0x10000>;
|
||||
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
};
|
||||
21
bindings/usb/iproc-udc.txt
Normal file
21
bindings/usb/iproc-udc.txt
Normal file
@@ -0,0 +1,21 @@
|
||||
Broadcom IPROC USB Device controller.
|
||||
|
||||
The device node is used for UDCs integrated into Broadcom's
|
||||
iProc family (Northstar2, Cygnus) of SoCs'. The UDC is based
|
||||
on Synopsys Designware Cores AHB Subsystem Device Controller
|
||||
IP.
|
||||
|
||||
Required properties:
|
||||
- compatible: Add the compatibility strings for supported platforms.
|
||||
For Broadcom NS2 platform, add "brcm,ns2-udc","brcm,iproc-udc".
|
||||
For Broadcom Cygnus platform, add "brcm,cygnus-udc", "brcm,iproc-udc".
|
||||
- reg: Offset and length of UDC register set
|
||||
- interrupts: description of interrupt line
|
||||
- phys: phandle to phy node.
|
||||
|
||||
Example:
|
||||
udc_dwc: usb@664e0000 {
|
||||
compatible = "brcm,ns2-udc", "brcm,iproc-udc";
|
||||
reg = <0x664e0000 0x2000>;
|
||||
interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&usbdrd_phy>;
|
||||
24
bindings/usb/isp1301.txt
Normal file
24
bindings/usb/isp1301.txt
Normal file
@@ -0,0 +1,24 @@
|
||||
* NXP ISP1301 USB transceiver
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "nxp,isp1301"
|
||||
- reg: I2C address of the ISP1301 device
|
||||
|
||||
Optional properties of devices using ISP1301:
|
||||
- transceiver: phandle of isp1301 - this helps the ISP1301 driver to find the
|
||||
ISP1301 instance associated with the respective USB driver
|
||||
|
||||
Example:
|
||||
|
||||
isp1301: usb-transceiver@2c {
|
||||
compatible = "nxp,isp1301";
|
||||
reg = <0x2c>;
|
||||
};
|
||||
|
||||
usbd@31020000 {
|
||||
compatible = "nxp,lpc3220-udc";
|
||||
reg = <0x31020000 0x300>;
|
||||
interrupt-parent = <&mic>;
|
||||
interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
|
||||
transceiver = <&isp1301>;
|
||||
};
|
||||
28
bindings/usb/lpc32xx-udc.txt
Normal file
28
bindings/usb/lpc32xx-udc.txt
Normal file
@@ -0,0 +1,28 @@
|
||||
* NXP LPC32xx SoC USB Device Controller (UDC)
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "nxp,lpc3220-udc"
|
||||
- reg: Physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: The USB interrupts:
|
||||
* USB Device Low Priority Interrupt
|
||||
* USB Device High Priority Interrupt
|
||||
* USB Device DMA Interrupt
|
||||
* External USB Transceiver Interrupt (OTG ATX)
|
||||
- transceiver: phandle of the associated ISP1301 device - this is necessary for
|
||||
the UDC controller for connecting to the USB physical layer
|
||||
|
||||
Example:
|
||||
|
||||
isp1301: usb-transceiver@2c {
|
||||
compatible = "nxp,isp1301";
|
||||
reg = <0x2c>;
|
||||
};
|
||||
|
||||
usbd@31020000 {
|
||||
compatible = "nxp,lpc3220-udc";
|
||||
reg = <0x31020000 0x300>;
|
||||
interrupt-parent = <&mic>;
|
||||
interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
|
||||
transceiver = <&isp1301>;
|
||||
};
|
||||
62
bindings/usb/marvell,pxau2o-ehci.yaml
Normal file
62
bindings/usb/marvell,pxau2o-ehci.yaml
Normal file
@@ -0,0 +1,62 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/marvell,pxau2o-ehci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell PXA/MMP EHCI bindings
|
||||
|
||||
maintainers:
|
||||
- Lubomir Rintel <lkundrak@v3.sk>
|
||||
|
||||
allOf:
|
||||
- $ref: usb-hcd.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: marvell,pxau2o-ehci
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: USBCLK
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
const: usb
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- phys
|
||||
- phy-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/marvell,mmp2.h>
|
||||
usb@d4208000 {
|
||||
compatible = "marvell,pxau2o-ehci";
|
||||
reg = <0xd4208000 0x200>;
|
||||
interrupts = <44>;
|
||||
clocks = <&soc_clocks MMP2_CLK_USB>;
|
||||
clock-names = "USBCLK";
|
||||
phys = <&usb_otg_phy>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
|
||||
...
|
||||
75
bindings/usb/maxim,max33359.yaml
Normal file
75
bindings/usb/maxim,max33359.yaml
Normal file
@@ -0,0 +1,75 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/maxim,max33359.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Maxim TCPCI Type-C PD controller DT bindings
|
||||
|
||||
maintainers:
|
||||
- Badhri Jagan Sridharan <badhri@google.com>
|
||||
|
||||
description: Maxim TCPCI Type-C PD controller
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- maxim,max33359
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
connector:
|
||||
type: object
|
||||
$ref: ../connector/usb-connector.yaml#
|
||||
description:
|
||||
Properties for usb c connector.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- connector
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/usb/pd.h>
|
||||
i2c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
maxtcpc@25 {
|
||||
compatible = "maxim,max33359";
|
||||
reg = <0x25>;
|
||||
interrupt-parent = <&gpa8>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
data-role = "dual";
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
self-powered;
|
||||
op-sink-microwatt = <2600000>;
|
||||
new-source-frs-typec-current = <FRS_5V_1P5A>;
|
||||
source-pdos = <PDO_FIXED(5000, 900,
|
||||
PDO_FIXED_SUSPEND |
|
||||
PDO_FIXED_USB_COMM |
|
||||
PDO_FIXED_DATA_SWAP |
|
||||
PDO_FIXED_DUAL_ROLE)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000,
|
||||
PDO_FIXED_USB_COMM |
|
||||
PDO_FIXED_DATA_SWAP |
|
||||
PDO_FIXED_DUAL_ROLE)
|
||||
PDO_FIXED(9000, 2000, 0)>;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
67
bindings/usb/maxim,max3420-udc.yaml
Normal file
67
bindings/usb/maxim,max3420-udc.yaml
Normal file
@@ -0,0 +1,67 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/maxim,max3420-udc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MAXIM MAX3420/1 USB Peripheral Controller
|
||||
|
||||
maintainers:
|
||||
- Jassi Brar <jaswinder.singh@linaro.org>
|
||||
|
||||
description: |
|
||||
The controller provices USB2.0 compliant FullSpeed peripheral
|
||||
implementation over the SPI interface.
|
||||
|
||||
Specifications about the part can be found at:
|
||||
http://datasheets.maximintegrated.com/en/ds/MAX3420E.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- maxim,max3420-udc
|
||||
- maxim,max3421-udc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: usb irq from max3420
|
||||
- description: vbus detection irq
|
||||
minItems: 1
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: udc
|
||||
- const: vbus
|
||||
minItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 26000000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
spi0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
udc@0 {
|
||||
compatible = "maxim,max3420-udc";
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <0 IRQ_TYPE_EDGE_FALLING>, <10 IRQ_TYPE_EDGE_BOTH>;
|
||||
interrupt-names = "udc", "vbus";
|
||||
spi-max-frequency = <12500000>;
|
||||
};
|
||||
};
|
||||
23
bindings/usb/maxim,max3421.txt
Normal file
23
bindings/usb/maxim,max3421.txt
Normal file
@@ -0,0 +1,23 @@
|
||||
Maxim Integrated SPI-based USB 2.0 host controller MAX3421E
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "maxim,max3421"
|
||||
- spi-max-frequency: maximum frequency for this device must not exceed 26 MHz.
|
||||
- reg: chip select number to which this device is connected.
|
||||
- maxim,vbus-en-pin: <GPOUTx ACTIVE_LEVEL>
|
||||
GPOUTx is the number (1-8) of the GPOUT pin of MAX3421E to drive Vbus.
|
||||
ACTIVE_LEVEL is 0 or 1.
|
||||
- interrupts: the interrupt line description for the interrupt controller.
|
||||
The driver configures MAX3421E for active low level triggered interrupts,
|
||||
configure your interrupt line accordingly.
|
||||
|
||||
Example:
|
||||
|
||||
usb@0 {
|
||||
compatible = "maxim,max3421";
|
||||
reg = <0>;
|
||||
maxim,vbus-en-pin = <3 1>;
|
||||
spi-max-frequency = <26000000>;
|
||||
interrupt-parent = <&PIC>;
|
||||
interrupts = <42>;
|
||||
};
|
||||
100
bindings/usb/mediatek,mt6360-tcpc.yaml
Normal file
100
bindings/usb/mediatek,mt6360-tcpc.yaml
Normal file
@@ -0,0 +1,100 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/mediatek,mt6360-tcpc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Mediatek MT6360 Type-C Port Switch and Power Delivery controller DT bindings
|
||||
|
||||
maintainers:
|
||||
- ChiYuan Huang <cy_huang@richtek.com>
|
||||
|
||||
description: |
|
||||
Mediatek MT6360 is a multi-functional device. It integrates charger, ADC, flash, RGB indicators,
|
||||
regulators (BUCKs/LDOs), and TypeC Port Switch with Power Delivery controller.
|
||||
This document only describes MT6360 Type-C Port Switch and Power Delivery controller.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt6360-tcpc
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: PD_IRQB
|
||||
|
||||
connector:
|
||||
type: object
|
||||
$ref: ../connector/usb-connector.yaml#
|
||||
description:
|
||||
Properties for usb c connector.
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/usb/pd.h>
|
||||
i2c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mt6360@34 {
|
||||
compatible = "mediatek,mt6360";
|
||||
reg = <0x34>;
|
||||
interrupts-extended = <&gpio26 0 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "IRQB";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
tcpc {
|
||||
compatible = "mediatek,mt6360-tcpc";
|
||||
interrupts-extended = <&gpio26 3 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "PD_IRQB";
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
data-role = "dual";
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
source-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>;
|
||||
op-sink-microwatt = <10000000>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
endpoint {
|
||||
remote-endpoint = <&usb_hs>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
endpoint {
|
||||
remote-endpoint = <&usb_ss>;
|
||||
};
|
||||
};
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
endpoint {
|
||||
remote-endpoint = <&dp_aux>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
36
bindings/usb/mediatek,mt6370-tcpc.yaml
Normal file
36
bindings/usb/mediatek,mt6370-tcpc.yaml
Normal file
@@ -0,0 +1,36 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/mediatek,mt6370-tcpc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: MediatTek MT6370 Type-C Port Switch and Power Delivery controller
|
||||
|
||||
maintainers:
|
||||
- ChiYuan Huang <cy_huang@richtek.com>
|
||||
|
||||
description: |
|
||||
MediaTek MT6370 is a multi-functional device.
|
||||
It integrates charger, ADC, flash, RGB indicators,
|
||||
regulators (DSV/VIBLDO), and TypeC Port Switch with Power Delivery controller.
|
||||
This document only describes MT6370 Type-C Port Switch and
|
||||
Power Delivery controller.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt6370-tcpc
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
connector:
|
||||
type: object
|
||||
$ref: /schemas/connector/usb-connector.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
219
bindings/usb/mediatek,mtk-xhci.yaml
Normal file
219
bindings/usb/mediatek,mtk-xhci.yaml
Normal file
@@ -0,0 +1,219 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 MediaTek
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek USB3 xHCI
|
||||
|
||||
maintainers:
|
||||
- Chunfeng Yun <chunfeng.yun@mediatek.com>
|
||||
|
||||
allOf:
|
||||
- $ref: "usb-xhci.yaml"
|
||||
|
||||
description: |
|
||||
There are two scenarios:
|
||||
case 1: only supports xHCI driver;
|
||||
case 2: supports dual-role mode, and the host is based on xHCI driver.
|
||||
|
||||
properties:
|
||||
# common properties for both case 1 and case 2
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- mediatek,mt2701-xhci
|
||||
- mediatek,mt2712-xhci
|
||||
- mediatek,mt7622-xhci
|
||||
- mediatek,mt7623-xhci
|
||||
- mediatek,mt7629-xhci
|
||||
- mediatek,mt8173-xhci
|
||||
- mediatek,mt8183-xhci
|
||||
- mediatek,mt8186-xhci
|
||||
- mediatek,mt8188-xhci
|
||||
- mediatek,mt8192-xhci
|
||||
- mediatek,mt8195-xhci
|
||||
- const: mediatek,mtk-xhci
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: the registers of xHCI MAC
|
||||
- description: the registers of IP Port Control
|
||||
|
||||
reg-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: mac
|
||||
- const: ippc # optional, only needed for case 1.
|
||||
|
||||
interrupts:
|
||||
description:
|
||||
use "interrupts-extended" when the interrupts are connected to the
|
||||
separate interrupt controllers
|
||||
minItems: 1
|
||||
items:
|
||||
- description: xHCI host controller interrupt
|
||||
- description: optional, wakeup interrupt used to support runtime PM
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: host
|
||||
- const: wakeup
|
||||
|
||||
power-domains:
|
||||
description: A phandle to USB power domain node to control USB's MTCMOS
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Controller clock used by normal mode
|
||||
- description: Reference clock used by low power mode etc
|
||||
- description: Mcu bus clock for register access
|
||||
- description: DMA bus clock for data transfer
|
||||
- description: controller clock
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: sys_ck # required, the following ones are optional
|
||||
- const: ref_ck
|
||||
- const: mcu_ck
|
||||
- const: dma_ck
|
||||
- const: xhci_ck
|
||||
|
||||
assigned-clocks:
|
||||
minItems: 1
|
||||
maxItems: 5
|
||||
|
||||
assigned-clock-parents:
|
||||
minItems: 1
|
||||
maxItems: 5
|
||||
|
||||
phys:
|
||||
description:
|
||||
List of all PHYs used on this HCD, it's better to keep PHYs in order
|
||||
as the hardware layout
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB2/HS PHY # required, others are optional
|
||||
- description: USB3/SS(P) PHY
|
||||
- description: USB2/HS PHY
|
||||
- description: USB3/SS(P) PHY
|
||||
- description: USB2/HS PHY
|
||||
- description: USB3/SS(P) PHY
|
||||
- description: USB2/HS PHY
|
||||
- description: USB3/SS(P) PHY
|
||||
- description: USB2/HS PHY
|
||||
|
||||
vusb33-supply:
|
||||
description: Regulator of USB AVDD3.3v
|
||||
|
||||
vbus-supply:
|
||||
description: Regulator of USB VBUS5v
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
usb3-lpm-capable: true
|
||||
|
||||
usb2-lpm-disable: true
|
||||
|
||||
imod-interval-ns:
|
||||
description:
|
||||
Interrupt moderation interval value, it is 8 times as much as that
|
||||
defined in the xHCI spec on MTK's controller.
|
||||
default: 5000
|
||||
|
||||
# the following properties are only used for case 1
|
||||
wakeup-source:
|
||||
description: enable USB remote wakeup, see power/wakeup-source.txt
|
||||
type: boolean
|
||||
|
||||
mediatek,syscon-wakeup:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
maxItems: 1
|
||||
description:
|
||||
A phandle to syscon used to access the register of the USB wakeup glue
|
||||
layer between xHCI and SPM, the field should always be 3 cells long.
|
||||
items:
|
||||
items:
|
||||
- description:
|
||||
The first cell represents a phandle to syscon
|
||||
- description:
|
||||
The second cell represents the register base address of the glue
|
||||
layer in syscon
|
||||
- description: |
|
||||
The third cell represents the hardware version of the glue layer,
|
||||
1 - used by mt8173 etc, revision 1 without following IPM rule;
|
||||
2 - used by mt2712 etc, revision 2 following IPM rule;
|
||||
101 - used by mt8183, specific 1.01;
|
||||
102 - used by mt8192, specific 1.02;
|
||||
103 - used by mt8195, IP0, specific 1.03;
|
||||
104 - used by mt8195, IP1, specific 1.04;
|
||||
105 - used by mt8195, IP2, specific 1.05;
|
||||
106 - used by mt8195, IP3, specific 1.06;
|
||||
enum: [1, 2, 101, 102, 103, 104, 105, 106]
|
||||
|
||||
mediatek,u3p-dis-msk:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: The mask to disable u3ports, bit0 for u3port0,
|
||||
bit1 for u3port1, ... etc
|
||||
|
||||
mediatek,u2p-dis-msk:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: The mask to disable u2ports, bit0 for u2port0,
|
||||
bit1 for u2port1, ... etc
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"@[0-9a-f]{1}$":
|
||||
type: object
|
||||
description: The hard wired USB devices.
|
||||
|
||||
dependencies:
|
||||
wakeup-source: [ 'mediatek,syscon-wakeup' ]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/mt8173-clk.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/power/mt8173-power.h>
|
||||
|
||||
usb@11270000 {
|
||||
compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
|
||||
reg = <0x11270000 0x1000>, <0x11280700 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
|
||||
power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
|
||||
clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
|
||||
clock-names = "sys_ck", "ref_ck";
|
||||
phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;
|
||||
vusb33-supply = <&mt6397_vusb_reg>;
|
||||
vbus-supply = <&usb_p1_vbus>;
|
||||
imod-interval-ns = <10000>;
|
||||
mediatek,syscon-wakeup = <&pericfg 0x400 1>;
|
||||
wakeup-source;
|
||||
usb3-lpm-capable;
|
||||
};
|
||||
...
|
||||
333
bindings/usb/mediatek,mtu3.yaml
Normal file
333
bindings/usb/mediatek,mtu3.yaml
Normal file
@@ -0,0 +1,333 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 MediaTek
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek USB3 DRD Controller
|
||||
|
||||
maintainers:
|
||||
- Chunfeng Yun <chunfeng.yun@mediatek.com>
|
||||
|
||||
allOf:
|
||||
- $ref: "usb-drd.yaml"
|
||||
|
||||
description: |
|
||||
The DRD controller has a glue layer IPPC (IP Port Control), and its host is
|
||||
based on xHCI.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- mediatek,mt2712-mtu3
|
||||
- mediatek,mt8173-mtu3
|
||||
- mediatek,mt8183-mtu3
|
||||
- mediatek,mt8188-mtu3
|
||||
- mediatek,mt8192-mtu3
|
||||
- mediatek,mt8195-mtu3
|
||||
- const: mediatek,mtu3
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: the registers of device MAC
|
||||
- description: the registers of IP Port Control
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: mac
|
||||
- const: ippc
|
||||
|
||||
interrupts:
|
||||
description:
|
||||
use "interrupts-extended" when the interrupts are connected to the
|
||||
separate interrupt controllers
|
||||
minItems: 1
|
||||
items:
|
||||
- description: SSUSB device controller interrupt
|
||||
- description: optional, wakeup interrupt used to support runtime PM
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: device
|
||||
- const: wakeup
|
||||
|
||||
power-domains:
|
||||
description: A phandle to USB power domain node to control USB's MTCMOS
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Controller clock used by normal mode
|
||||
- description: Reference clock used by low power mode etc
|
||||
- description: Mcu bus clock for register access
|
||||
- description: DMA bus clock for data transfer
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: sys_ck # required, others are optional
|
||||
- const: ref_ck
|
||||
- const: mcu_ck
|
||||
- const: dma_ck
|
||||
|
||||
phys:
|
||||
description:
|
||||
List of all the USB PHYs used, it's better to keep the sequence
|
||||
as the hardware layout.
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB2/HS PHY # required, others are optional
|
||||
- description: USB3/SS(P) PHY
|
||||
- description: USB2/HS PHY # the following for backward compatible
|
||||
- description: USB3/SS(P) PHY
|
||||
- description: USB2/HS PHY
|
||||
- description: USB3/SS(P) PHY
|
||||
- description: USB2/HS PHY
|
||||
- description: USB3/SS(P) PHY
|
||||
- description: USB2/HS PHY
|
||||
|
||||
vusb33-supply:
|
||||
description: Regulator of USB AVDD3.3v
|
||||
|
||||
vbus-supply:
|
||||
deprecated: true
|
||||
description: |
|
||||
Regulator of USB VBUS5v, needed when supports dual-role mode.
|
||||
Particularly, if use an output GPIO to control a VBUS regulator, should
|
||||
model it as a regulator. See bindings/regulator/fixed-regulator.yaml
|
||||
It's considered valid for compatibility reasons, not allowed for
|
||||
new bindings, and put into a usb-connector node.
|
||||
|
||||
dr_mode:
|
||||
enum: [host, peripheral, otg]
|
||||
default: otg
|
||||
|
||||
maximum-speed:
|
||||
enum: [super-speed-plus, super-speed, high-speed, full-speed]
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
enum: [1, 2]
|
||||
|
||||
"#size-cells":
|
||||
enum: [1, 2]
|
||||
|
||||
ranges: true
|
||||
|
||||
extcon:
|
||||
deprecated: true
|
||||
description: |
|
||||
Phandle to the extcon device detecting the IDDIG state, needed
|
||||
when supports dual-role mode.
|
||||
It's considered valid for compatibility reasons, not allowed for
|
||||
new bindings, and use "usb-role-switch" property instead.
|
||||
|
||||
usb-role-switch:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: Support role switch.
|
||||
type: boolean
|
||||
|
||||
role-switch-default-mode:
|
||||
enum: [host, peripheral]
|
||||
default: host
|
||||
|
||||
connector:
|
||||
$ref: /schemas/connector/usb-connector.yaml#
|
||||
description:
|
||||
Connector for dual role switch, especially for "gpio-usb-b-connector"
|
||||
type: object
|
||||
|
||||
port:
|
||||
description:
|
||||
Any connector to the data bus of this controller should be modelled
|
||||
using the OF graph bindings specified, if the "usb-role-switch"
|
||||
property is used. See graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
enable-manual-drd:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
supports manual dual-role switch via debugfs; usually used when
|
||||
receptacle is TYPE-A and also wants to support dual-role mode.
|
||||
type: boolean
|
||||
|
||||
wakeup-source:
|
||||
description: enable USB remote wakeup, see power/wakeup-source.txt
|
||||
type: boolean
|
||||
|
||||
mediatek,syscon-wakeup:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
maxItems: 1
|
||||
description:
|
||||
A phandle to syscon used to access the register of the USB wakeup glue
|
||||
layer between xHCI and SPM, the field should always be 3 cells long.
|
||||
items:
|
||||
items:
|
||||
- description:
|
||||
The first cell represents a phandle to syscon
|
||||
- description:
|
||||
The second cell represents the register base address of the glue
|
||||
layer in syscon
|
||||
- description: |
|
||||
The third cell represents the hardware version of the glue layer,
|
||||
1 - used by mt8173 etc, revision 1 without following IPM rule;
|
||||
2 - used by mt2712 etc, revision 2 with following IPM rule;
|
||||
101 - used by mt8183, specific 1.01;
|
||||
102 - used by mt8192, specific 1.02;
|
||||
enum: [1, 2, 101, 102]
|
||||
|
||||
mediatek,u3p-dis-msk:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: The mask to disable u3ports, bit0 for u3port0,
|
||||
bit1 for u3port1, ... etc
|
||||
|
||||
mediatek,u2p-dis-msk:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: The mask to disable u2ports, bit0 for u2port0,
|
||||
bit1 for u2port1, ... etc; but can't disable u2port0 if dual role mode
|
||||
is enabled, so will be skipped in this case.
|
||||
|
||||
# Required child node when support dual-role
|
||||
patternProperties:
|
||||
"^usb@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: /schemas/usb/mediatek,mtk-xhci.yaml#
|
||||
description:
|
||||
The xhci should be added as subnode to mtu3 as shown in the following
|
||||
example if the host mode is enabled.
|
||||
|
||||
dependencies:
|
||||
connector: [ 'usb-role-switch' ]
|
||||
port: [ 'usb-role-switch' ]
|
||||
role-switch-default-mode: [ 'usb-role-switch' ]
|
||||
wakeup-source: [ 'mediatek,syscon-wakeup' ]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
# Dual role switch by extcon
|
||||
- |
|
||||
#include <dt-bindings/clock/mt8173-clk.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/power/mt8173-power.h>
|
||||
|
||||
usb@11271000 {
|
||||
compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
|
||||
reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
|
||||
phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
|
||||
power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
|
||||
clocks = <&topckgen CLK_TOP_USB30_SEL>;
|
||||
clock-names = "sys_ck";
|
||||
vusb33-supply = <&mt6397_vusb_reg>;
|
||||
vbus-supply = <&usb_p0_vbus>;
|
||||
extcon = <&extcon_usb>;
|
||||
dr_mode = "otg";
|
||||
wakeup-source;
|
||||
mediatek,syscon-wakeup = <&pericfg 0x400 1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
xhci: usb@11270000 {
|
||||
compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
|
||||
reg = <0x11270000 0x1000>;
|
||||
reg-names = "mac";
|
||||
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
|
||||
power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
|
||||
clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
|
||||
clock-names = "sys_ck", "ref_ck";
|
||||
vusb33-supply = <&mt6397_vusb_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
# Dual role switch by gpio-usb-b-connector
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/power/mt2712-power.h>
|
||||
|
||||
usb@112c1000 {
|
||||
compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
|
||||
reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
|
||||
phys = <&u2port2 PHY_TYPE_USB2>;
|
||||
power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
|
||||
clocks = <&topckgen CLK_TOP_USB30_SEL>;
|
||||
clock-names = "sys_ck";
|
||||
dr_mode = "otg";
|
||||
usb-role-switch;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
host0: usb@11270000 {
|
||||
compatible = "mediatek,mt2712-xhci", "mediatek,mtk-xhci";
|
||||
reg = <0x11270000 0x1000>;
|
||||
reg-names = "mac";
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_LOW>;
|
||||
power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
|
||||
clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
|
||||
clock-names = "sys_ck", "ref_ck";
|
||||
};
|
||||
|
||||
connector {
|
||||
compatible = "gpio-usb-b-connector", "usb-b-connector";
|
||||
type = "micro";
|
||||
id-gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
|
||||
vbus-supply = <&usb_p0_vbus>;
|
||||
};
|
||||
};
|
||||
|
||||
# Dual role switch with type-c
|
||||
- |
|
||||
usb@11201000 {
|
||||
compatible ="mediatek,mt8183-mtu3", "mediatek,mtu3";
|
||||
reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
|
||||
phys = <&u2port0 PHY_TYPE_USB2>;
|
||||
clocks = <&clk26m>;
|
||||
clock-names = "sys_ck";
|
||||
mediatek,syscon-wakeup = <&pericfg 0x400 1>;
|
||||
wakeup-source;
|
||||
dr_mode = "otg";
|
||||
usb-role-switch;
|
||||
role-switch-default-mode = "host";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
host: usb@11200000 {
|
||||
compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci";
|
||||
reg = <0x11200000 0x1000>;
|
||||
reg-names = "mac";
|
||||
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
|
||||
clocks = <&clk26m>;
|
||||
clock-names = "sys_ck";
|
||||
};
|
||||
|
||||
port {
|
||||
usb_role_sw: endpoint {
|
||||
remote-endpoint = <&hs_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
115
bindings/usb/mediatek,musb.yaml
Normal file
115
bindings/usb/mediatek,musb.yaml
Normal file
@@ -0,0 +1,115 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 MediaTek
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/mediatek,musb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek MUSB DRD/OTG Controller
|
||||
|
||||
maintainers:
|
||||
- Min Guo <min.guo@mediatek.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: '^usb@[0-9a-f]+$'
|
||||
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- mediatek,mt8516-musb
|
||||
- mediatek,mt2701-musb
|
||||
- mediatek,mt7623-musb
|
||||
- const: mediatek,mtk-musb
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: mc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: The main/core clock
|
||||
- description: The system bus clock
|
||||
- description: The 48Mhz clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: main
|
||||
- const: mcu
|
||||
- const: univpll
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
usb-role-switch:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: Support role switch. See usb/generic.txt
|
||||
type: boolean
|
||||
|
||||
dr_mode:
|
||||
enum:
|
||||
- host
|
||||
- otg
|
||||
- peripheral
|
||||
|
||||
power-domains:
|
||||
description: A phandle to USB power domain node to control USB's MTCMOS
|
||||
maxItems: 1
|
||||
|
||||
connector:
|
||||
$ref: /schemas/connector/usb-connector.yaml#
|
||||
description: Connector for dual role switch
|
||||
type: object
|
||||
|
||||
dependencies:
|
||||
usb-role-switch: [ 'connector' ]
|
||||
connector: [ 'usb-role-switch' ]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- phys
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/mt2701-clk.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/power/mt2701-power.h>
|
||||
|
||||
usb@11200000 {
|
||||
compatible = "mediatek,mt2701-musb", "mediatek,mtk-musb";
|
||||
reg = <0x11200000 0x1000>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "mc";
|
||||
phys = <&u2port2 PHY_TYPE_USB2>;
|
||||
dr_mode = "otg";
|
||||
clocks = <&pericfg CLK_PERI_USB0>,
|
||||
<&pericfg CLK_PERI_USB0_MCU>,
|
||||
<&pericfg CLK_PERI_USB_SLV>;
|
||||
clock-names = "main","mcu","univpll";
|
||||
power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
|
||||
usb-role-switch;
|
||||
|
||||
connector {
|
||||
compatible = "gpio-usb-b-connector", "usb-b-connector";
|
||||
type = "micro";
|
||||
id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
|
||||
vbus-supply = <&usb_vbus>;
|
||||
};
|
||||
};
|
||||
...
|
||||
59
bindings/usb/microchip,mpfs-musb.yaml
Normal file
59
bindings/usb/microchip,mpfs-musb.yaml
Normal file
@@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/microchip,mpfs-musb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip MPFS USB Controller
|
||||
|
||||
allOf:
|
||||
- $ref: usb-drd.yaml#
|
||||
|
||||
maintainers:
|
||||
- Conor Dooley <conor.dooley@microchip.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- microchip,mpfs-musb
|
||||
|
||||
dr_mode: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: dma
|
||||
- const: mc
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include "dt-bindings/clock/microchip,mpfs-clock.h"
|
||||
usb@20201000 {
|
||||
compatible = "microchip,mpfs-musb";
|
||||
reg = <0x20201000 0x1000>;
|
||||
clocks = <&clkcfg CLK_USB>;
|
||||
interrupt-parent = <&plic>;
|
||||
interrupts = <86>, <87>;
|
||||
interrupt-names = "dma", "mc";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
...
|
||||
110
bindings/usb/msm-hsusb.txt
Normal file
110
bindings/usb/msm-hsusb.txt
Normal file
@@ -0,0 +1,110 @@
|
||||
MSM SoC HSUSB controllers
|
||||
|
||||
EHCI
|
||||
|
||||
Required properties:
|
||||
- compatible: Should contain "qcom,ehci-host"
|
||||
- regs: offset and length of the register set in the memory map
|
||||
- usb-phy: phandle for the PHY device
|
||||
|
||||
Example EHCI controller device node:
|
||||
|
||||
ehci: ehci@f9a55000 {
|
||||
compatible = "qcom,ehci-host";
|
||||
reg = <0xf9a55000 0x400>;
|
||||
usb-phy = <&usb_otg>;
|
||||
};
|
||||
|
||||
USB PHY with optional OTG:
|
||||
|
||||
Required properties:
|
||||
- compatible: Should contain:
|
||||
"qcom,usb-otg-ci" for chipsets with ChipIdea 45nm PHY
|
||||
"qcom,usb-otg-snps" for chipsets with Synopsys 28nm PHY
|
||||
|
||||
- regs: Offset and length of the register set in the memory map
|
||||
- interrupts: interrupt-specifier for the OTG interrupt.
|
||||
|
||||
- clocks: A list of phandle + clock-specifier pairs for the
|
||||
clocks listed in clock-names
|
||||
- clock-names: Should contain the following:
|
||||
"phy" USB PHY reference clock
|
||||
"core" Protocol engine clock
|
||||
"iface" Interface bus clock
|
||||
"alt_core" Protocol engine clock for targets with asynchronous
|
||||
reset methodology. (optional)
|
||||
|
||||
- vdccx-supply: phandle to the regulator for the vdd supply for
|
||||
digital circuit operation.
|
||||
- v1p8-supply: phandle to the regulator for the 1.8V supply
|
||||
- v3p3-supply: phandle to the regulator for the 3.3V supply
|
||||
|
||||
- resets: A list of phandle + reset-specifier pairs for the
|
||||
resets listed in reset-names
|
||||
- reset-names: Should contain the following:
|
||||
"phy" USB PHY controller reset
|
||||
"link" USB LINK controller reset
|
||||
|
||||
- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of
|
||||
1 - PHY control
|
||||
2 - PMIC control
|
||||
|
||||
Optional properties:
|
||||
- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
|
||||
|
||||
- switch-gpio: A phandle + gpio-specifier pair. Some boards are using Dual
|
||||
SPDT USB Switch, witch is cotrolled by GPIO to de/multiplex
|
||||
D+/D- USB lines between connectors.
|
||||
|
||||
- qcom,phy-init-sequence: PHY configuration sequence values. This is related to Device
|
||||
Mode Eye Diagram test. Start address at which these values will be
|
||||
written is ULPI_EXT_VENDOR_SPECIFIC. Value of -1 is reserved as
|
||||
"do not overwrite default value at this address".
|
||||
For example: qcom,phy-init-sequence = < -1 0x63 >;
|
||||
Will update only value at address ULPI_EXT_VENDOR_SPECIFIC + 1.
|
||||
|
||||
- qcom,phy-num: Select number of pyco-phy to use, can be one of
|
||||
0 - PHY one, default
|
||||
1 - Second PHY
|
||||
Some platforms may have configuration to allow USB
|
||||
controller work with any of the two HSPHYs present.
|
||||
|
||||
- qcom,vdd-levels: This property must be a list of three integer values
|
||||
(no, min, max) where each value represents either a voltage
|
||||
in microvolts or a value corresponding to voltage corner.
|
||||
|
||||
- qcom,manual-pullup: If present, vbus is not routed to USB controller/phy
|
||||
and controller driver therefore enables pull-up explicitly
|
||||
before starting controller using usbcmd run/stop bit.
|
||||
|
||||
- extcon: phandles to external connector devices. First phandle
|
||||
should point to external connector, which provide "USB"
|
||||
cable events, the second should point to external connector
|
||||
device, which provide "USB-HOST" cable events. If one of
|
||||
the external connector devices is not required empty <0>
|
||||
phandle should be specified.
|
||||
|
||||
Example HSUSB OTG controller device node:
|
||||
|
||||
usb@f9a55000 {
|
||||
compatible = "qcom,usb-otg-snps";
|
||||
reg = <0xf9a55000 0x400>;
|
||||
interrupts = <0 134 0>;
|
||||
dr_mode = "peripheral";
|
||||
|
||||
clocks = <&gcc GCC_XO_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>,
|
||||
<&gcc GCC_USB_HS_AHB_CLK>;
|
||||
|
||||
clock-names = "phy", "core", "iface";
|
||||
|
||||
vddcx-supply = <&pm8841_s2_corner>;
|
||||
v1p8-supply = <&pm8941_l6>;
|
||||
v3p3-supply = <&pm8941_l24>;
|
||||
|
||||
resets = <&gcc GCC_USB2A_PHY_BCR>, <&gcc GCC_USB_HS_BCR>;
|
||||
reset-names = "phy", "link";
|
||||
|
||||
qcom,otg-control = <1>;
|
||||
qcom,phy-init-sequence = < -1 0x63 >;
|
||||
qcom,vdd-levels = <1 5 7>;
|
||||
};
|
||||
20
bindings/usb/npcm7xx-usb.txt
Normal file
20
bindings/usb/npcm7xx-usb.txt
Normal file
@@ -0,0 +1,20 @@
|
||||
Nuvoton NPCM7XX SoC USB controllers:
|
||||
-----------------------------
|
||||
|
||||
EHCI:
|
||||
-----
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of
|
||||
"nuvoton,npcm750-ehci"
|
||||
"nuvoton,npcm845-ehci"
|
||||
- interrupts: Should contain the EHCI interrupt
|
||||
- reg: Physical address and length of the register set for the device
|
||||
|
||||
Example:
|
||||
|
||||
ehci1: usb@f0806000 {
|
||||
compatible = "nuvoton,npcm750-ehci";
|
||||
reg = <0xf0806000 0x1000>;
|
||||
interrupts = <0 61 4>;
|
||||
};
|
||||
201
bindings/usb/nvidia,tegra-xudc.yaml
Normal file
201
bindings/usb/nvidia,tegra-xudc.yaml
Normal file
@@ -0,0 +1,201 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC)
|
||||
|
||||
description:
|
||||
The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and
|
||||
USB 3.0 SuperSpeed protocols.
|
||||
|
||||
maintainers:
|
||||
- Nagarjuna Kristam <nkristam@nvidia.com>
|
||||
- JC Kuo <jckuo@nvidia.com>
|
||||
- Thierry Reding <treding@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- nvidia,tegra210-xudc # For Tegra210
|
||||
- nvidia,tegra186-xudc # For Tegra186
|
||||
- nvidia,tegra194-xudc # For Tegra194
|
||||
|
||||
reg:
|
||||
minItems: 2
|
||||
items:
|
||||
- description: XUSB device controller registers
|
||||
- description: XUSB device PCI Config registers
|
||||
- description: XUSB device registers.
|
||||
|
||||
reg-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: base
|
||||
- const: fpci
|
||||
- const: ipfs
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: Must contain the XUSB device interrupt.
|
||||
|
||||
clocks:
|
||||
minItems: 4
|
||||
items:
|
||||
- description: Clock to enable core XUSB dev clock.
|
||||
- description: Clock to enable XUSB super speed clock.
|
||||
- description: Clock to enable XUSB super speed dev clock.
|
||||
- description: Clock to enable XUSB high speed dev clock.
|
||||
- description: Clock to enable XUSB full speed dev clock.
|
||||
|
||||
clock-names:
|
||||
minItems: 4
|
||||
items:
|
||||
- const: dev
|
||||
- const: ss
|
||||
- const: ss_src
|
||||
- const: fs_src
|
||||
- const: hs_src
|
||||
|
||||
interconnects:
|
||||
items:
|
||||
- description: memory read client
|
||||
- description: memory write client
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: dma-mem # read
|
||||
- const: write
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
items:
|
||||
- description: XUSBB(device) power-domain
|
||||
- description: XUSBA(superspeed) power-domain
|
||||
|
||||
power-domain-names:
|
||||
items:
|
||||
- const: dev
|
||||
- const: ss
|
||||
|
||||
nvidia,xusb-padctl:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
phandle to the XUSB pad controller that is used to configure the USB pads
|
||||
used by the XUDC controller.
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
description:
|
||||
Must contain an entry for each entry in phy-names.
|
||||
See ../phy/phy-bindings.txt for details.
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: usb2-0
|
||||
- const: usb2-1
|
||||
- const: usb2-2
|
||||
- const: usb2-3
|
||||
- const: usb3-0
|
||||
- const: usb3-1
|
||||
- const: usb3-2
|
||||
- const: usb3-3
|
||||
|
||||
avddio-usb-supply:
|
||||
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
|
||||
|
||||
hvdd-usb-supply:
|
||||
description: USB controller power supply. Must supply 3.3 V.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
- power-domain-names
|
||||
- nvidia,xusb-padctl
|
||||
- phys
|
||||
- phy-names
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- nvidia,tegra210-xudc
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 3
|
||||
reg-names:
|
||||
minItems: 3
|
||||
clocks:
|
||||
minItems: 5
|
||||
clock-names:
|
||||
minItems: 5
|
||||
required:
|
||||
- avddio-usb-supply
|
||||
- hvdd-usb-supply
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- nvidia,tegra186-xudc
|
||||
- nvidia,tegra194-xudc
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 2
|
||||
reg-names:
|
||||
maxItems: 2
|
||||
clocks:
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
maxItems: 4
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra210-car.h>
|
||||
#include <dt-bindings/gpio/tegra-gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
usb@700d0000 {
|
||||
compatible = "nvidia,tegra210-xudc";
|
||||
reg = <0x700d0000 0x8000>,
|
||||
<0x700d8000 0x1000>,
|
||||
<0x700d9000 0x1000>;
|
||||
reg-names = "base", "fpci", "ipfs";
|
||||
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_SS>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
|
||||
clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
|
||||
|
||||
power-domains = <&pd_xusbdev>, <&pd_xusbss>;
|
||||
power-domain-names = "dev", "ss";
|
||||
|
||||
nvidia,xusb-padctl = <&padctl>;
|
||||
|
||||
phys = <µ_b>;
|
||||
phy-names = "usb2-0";
|
||||
|
||||
avddio-usb-supply = <&vdd_pex_1v05>;
|
||||
hvdd-usb-supply = <&vdd_3v3_sys>;
|
||||
};
|
||||
202
bindings/usb/nvidia,tegra124-xusb.yaml
Normal file
202
bindings/usb/nvidia,tegra124-xusb.yaml
Normal file
@@ -0,0 +1,202 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra124 xHCI controller
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
|
||||
description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
|
||||
exposed by the Tegra XUSB pad controller.
|
||||
|
||||
properties:
|
||||
# required
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: NVIDIA Tegra124
|
||||
const: nvidia,tegra124-xusb
|
||||
|
||||
- description: NVIDIA Tegra132
|
||||
items:
|
||||
- const: nvidia,tegra132-xusb
|
||||
- const: nvidia,tegra124-xusb
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: base and length of the xHCI host registers
|
||||
- description: base and length of the XUSB FPCI registers
|
||||
- description: base and length of the XUSB IPFS registers
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: hcd
|
||||
- const: fpci
|
||||
- const: ipfs
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: xHCI host interrupt
|
||||
- description: mailbox interrupt
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: XUSB host clock
|
||||
- description: XUSB host source clock
|
||||
- description: XUSB Falcon source clock
|
||||
- description: XUSB SuperSpeed clock
|
||||
- description: XUSB SuperSpeed clock divider
|
||||
- description: XUSB SuperSpeed source clock
|
||||
- description: XUSB HighSpeed clock source
|
||||
- description: XUSB FullSpeed clock source
|
||||
- description: USB PLL
|
||||
- description: reference clock
|
||||
- description: I/O PLL
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_host_src
|
||||
- const: xusb_falcon_src
|
||||
- const: xusb_ss
|
||||
- const: xusb_ss_div2
|
||||
- const: xusb_ss_src
|
||||
- const: xusb_hs_src
|
||||
- const: xusb_fs_src
|
||||
- const: pll_u_480m
|
||||
- const: clk_m
|
||||
- const: pll_e
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: reset for the XUSB host controller
|
||||
- description: reset for the SuperSpeed logic
|
||||
- description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_ss
|
||||
- const: xusb_src
|
||||
|
||||
nvidia,xusb-padctl:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to the XUSB pad controller that is used to configure
|
||||
the USB pads used by the XHCI controller
|
||||
|
||||
# optional
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 7
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 7
|
||||
items:
|
||||
enum:
|
||||
- usb2-0
|
||||
- usb2-1
|
||||
- usb2-2
|
||||
- hsic-0
|
||||
- hsic-1
|
||||
- usb3-0
|
||||
- usb3-1
|
||||
|
||||
avddio-pex-supply:
|
||||
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
|
||||
|
||||
dvddio-pex-supply:
|
||||
description: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
|
||||
|
||||
avdd-usb-supply:
|
||||
description: USB controller power supply. Must supply 3.3 V.
|
||||
|
||||
avdd-pll-utmip-supply:
|
||||
description: UTMI PLL power supply. Must supply 1.8 V.
|
||||
|
||||
avdd-pll-erefe-supply:
|
||||
description: PLLE reference PLL power supply. Must supply 1.05 V.
|
||||
|
||||
avdd-usb-ss-pll-supply:
|
||||
description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
|
||||
|
||||
hvdd-usb-ss-supply:
|
||||
description: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.
|
||||
|
||||
hvdd-usb-ss-pll-e-supply:
|
||||
description: High-voltage PLLE power supply. Must supply 3.3 V.
|
||||
|
||||
allOf:
|
||||
- $ref: usb-xhci.yaml
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- nvidia,xusb-padctl
|
||||
- phys
|
||||
- phy-names
|
||||
- avddio-pex-supply
|
||||
- dvddio-pex-supply
|
||||
- avdd-usb-supply
|
||||
- hvdd-usb-ss-supply
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra124-car.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
usb@70090000 {
|
||||
compatible = "nvidia,tegra124-xusb";
|
||||
reg = <0x70090000 0x8000>,
|
||||
<0x70098000 0x1000>,
|
||||
<0x70099000 0x1000>;
|
||||
reg-names = "hcd", "fpci", "ipfs";
|
||||
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
|
||||
<&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
|
||||
<&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
|
||||
<&tegra_car TEGRA124_CLK_XUSB_SS>,
|
||||
<&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
|
||||
<&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
|
||||
<&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
|
||||
<&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_U_480M>,
|
||||
<&tegra_car TEGRA124_CLK_CLK_M>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_E>;
|
||||
clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src",
|
||||
"xusb_ss", "xusb_ss_div2", "xusb_ss_src",
|
||||
"xusb_hs_src", "xusb_fs_src", "pll_u_480m",
|
||||
"clk_m", "pll_e";
|
||||
resets = <&tegra_car 89>, <&tegra_car 156>, <&tegra_car 143>;
|
||||
reset-names = "xusb_host", "xusb_ss", "xusb_src";
|
||||
|
||||
nvidia,xusb-padctl = <&padctl>;
|
||||
|
||||
phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */
|
||||
<&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */
|
||||
<&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */
|
||||
phy-names = "usb2-1", "usb2-2", "usb3-0";
|
||||
|
||||
avddio-pex-supply = <&vdd_1v05_run>;
|
||||
dvddio-pex-supply = <&vdd_1v05_run>;
|
||||
avdd-usb-supply = <&vdd_3v3_lp0>;
|
||||
avdd-pll-utmip-supply = <&vddio_1v8>;
|
||||
avdd-pll-erefe-supply = <&avdd_1v05_run>;
|
||||
avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
|
||||
hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
|
||||
hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
|
||||
};
|
||||
173
bindings/usb/nvidia,tegra186-xusb.yaml
Normal file
173
bindings/usb/nvidia,tegra186-xusb.yaml
Normal file
@@ -0,0 +1,173 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra186 xHCI controller
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
|
||||
description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
|
||||
exposed by the Tegra XUSB pad controller.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra186-xusb
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: base and length of the xHCI host registers
|
||||
- description: base and length of the XUSB FPCI registers
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: hcd
|
||||
- const: fpci
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: xHCI host interrupt
|
||||
- description: mailbox interrupt
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: XUSB host clock
|
||||
- description: XUSB Falcon source clock
|
||||
- description: XUSB SuperSpeed clock
|
||||
- description: XUSB SuperSpeed source clock
|
||||
- description: XUSB HighSpeed clock source
|
||||
- description: XUSB FullSpeed clock source
|
||||
- description: USB PLL
|
||||
- description: reference clock
|
||||
- description: I/O PLL
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_falcon_src
|
||||
- const: xusb_ss
|
||||
- const: xusb_ss_src
|
||||
- const: xusb_hs_src
|
||||
- const: xusb_fs_src
|
||||
- const: pll_u_480m
|
||||
- const: clk_m
|
||||
- const: pll_e
|
||||
|
||||
interconnects:
|
||||
items:
|
||||
- description: read client
|
||||
- description: write client
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: dma-mem # read
|
||||
- const: write
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
nvidia,xusb-padctl:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to the XUSB pad controller that is used to configure
|
||||
the USB pads used by the XHCI controller
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 7
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 7
|
||||
items:
|
||||
enum:
|
||||
- usb2-0
|
||||
- usb2-1
|
||||
- usb2-2
|
||||
- hsic-0
|
||||
- usb3-0
|
||||
- usb3-1
|
||||
- usb3-2
|
||||
|
||||
power-domains:
|
||||
items:
|
||||
- description: XUSBC power domain (for Host and USB 2.0)
|
||||
- description: XUSBA power domain (for SuperSpeed)
|
||||
|
||||
power-domain-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_ss
|
||||
|
||||
dvddio-pex-supply:
|
||||
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
|
||||
|
||||
hvddio-pex-supply:
|
||||
description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
|
||||
|
||||
avdd-usb-supply:
|
||||
description: USB controller power supply. Must supply 3.3 V.
|
||||
|
||||
avdd-pll-utmip-supply:
|
||||
description: UTMI PLL power supply. Must supply 1.8 V.
|
||||
|
||||
avdd-pll-uerefe-supply:
|
||||
description: PLLE reference PLL power supply. Must supply 1.05 V.
|
||||
|
||||
dvdd-usb-ss-pll-supply:
|
||||
description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
|
||||
|
||||
hvdd-usb-ss-pll-e-supply:
|
||||
description: High-voltage PLLE power supply. Must supply 1.8 V.
|
||||
|
||||
allOf:
|
||||
- $ref: usb-xhci.yaml
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra186-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/memory/tegra186-mc.h>
|
||||
#include <dt-bindings/power/tegra186-powergate.h>
|
||||
#include <dt-bindings/reset/tegra186-reset.h>
|
||||
|
||||
usb@3530000 {
|
||||
compatible = "nvidia,tegra186-xusb";
|
||||
reg = <0x03530000 0x8000>,
|
||||
<0x03538000 0x1000>;
|
||||
reg-names = "hcd", "fpci";
|
||||
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>,
|
||||
<&bpmp TEGRA186_CLK_XUSB_FALCON>,
|
||||
<&bpmp TEGRA186_CLK_XUSB_SS>,
|
||||
<&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
|
||||
<&bpmp TEGRA186_CLK_CLK_M>,
|
||||
<&bpmp TEGRA186_CLK_XUSB_FS>,
|
||||
<&bpmp TEGRA186_CLK_PLLU>,
|
||||
<&bpmp TEGRA186_CLK_CLK_M>,
|
||||
<&bpmp TEGRA186_CLK_PLLE>;
|
||||
clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss",
|
||||
"xusb_ss_src", "xusb_hs_src", "xusb_fs_src",
|
||||
"pll_u_480m", "clk_m", "pll_e";
|
||||
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
|
||||
<&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
|
||||
power-domain-names = "xusb_host", "xusb_ss";
|
||||
interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &emc>,
|
||||
<&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTW &emc>;
|
||||
interconnect-names = "dma-mem", "write";
|
||||
iommus = <&smmu TEGRA186_SID_XUSB_HOST>;
|
||||
nvidia,xusb-padctl = <&padctl>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
|
||||
<&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
|
||||
<&{/padctl@3520000/pads/usb3/lanes/usb3-0}>;
|
||||
phy-names = "usb2-0", "usb2-1", "usb3-0";
|
||||
};
|
||||
179
bindings/usb/nvidia,tegra194-xusb.yaml
Normal file
179
bindings/usb/nvidia,tegra194-xusb.yaml
Normal file
@@ -0,0 +1,179 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra194 xHCI controller
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
|
||||
description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
|
||||
exposed by the Tegra XUSB pad controller.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra194-xusb
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: base and length of the xHCI host registers
|
||||
- description: base and length of the XUSB FPCI registers
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: hcd
|
||||
- const: fpci
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: xHCI host interrupt
|
||||
- description: mailbox interrupt
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: XUSB host clock
|
||||
- description: XUSB Falcon source clock
|
||||
- description: XUSB SuperSpeed clock
|
||||
- description: XUSB SuperSpeed source clock
|
||||
- description: XUSB HighSpeed clock source
|
||||
- description: XUSB FullSpeed clock source
|
||||
- description: USB PLL
|
||||
- description: reference clock
|
||||
- description: I/O PLL
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_falcon_src
|
||||
- const: xusb_ss
|
||||
- const: xusb_ss_src
|
||||
- const: xusb_hs_src
|
||||
- const: xusb_fs_src
|
||||
- const: pll_u_480m
|
||||
- const: clk_m
|
||||
- const: pll_e
|
||||
|
||||
interconnects:
|
||||
items:
|
||||
- description: read client
|
||||
- description: write client
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: dma-mem # read
|
||||
- const: write
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
nvidia,xusb-padctl:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to the XUSB pad controller that is used to configure
|
||||
the USB pads used by the XHCI controller
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
items:
|
||||
enum:
|
||||
- usb2-0
|
||||
- usb2-1
|
||||
- usb2-2
|
||||
- usb2-3
|
||||
- usb3-0
|
||||
- usb3-1
|
||||
- usb3-2
|
||||
- usb3-3
|
||||
|
||||
power-domains:
|
||||
items:
|
||||
- description: XUSBC power domain (for Host and USB 2.0)
|
||||
- description: XUSBA power domain (for SuperSpeed)
|
||||
|
||||
power-domain-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_ss
|
||||
|
||||
dvddio-pex-supply:
|
||||
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
|
||||
|
||||
hvddio-pex-supply:
|
||||
description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
|
||||
|
||||
avdd-usb-supply:
|
||||
description: USB controller power supply. Must supply 3.3 V.
|
||||
|
||||
avdd-pll-utmip-supply:
|
||||
description: UTMI PLL power supply. Must supply 1.8 V.
|
||||
|
||||
avdd-pll-uerefe-supply:
|
||||
description: PLLE reference PLL power supply. Must supply 1.05 V.
|
||||
|
||||
dvdd-usb-ss-pll-supply:
|
||||
description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
|
||||
|
||||
hvdd-usb-ss-pll-e-supply:
|
||||
description: High-voltage PLLE power supply. Must supply 1.8 V.
|
||||
|
||||
allOf:
|
||||
- $ref: usb-xhci.yaml
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra194-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/memory/tegra194-mc.h>
|
||||
#include <dt-bindings/power/tegra194-powergate.h>
|
||||
#include <dt-bindings/reset/tegra194-reset.h>
|
||||
|
||||
usb@3610000 {
|
||||
compatible = "nvidia,tegra194-xusb";
|
||||
reg = <0x03610000 0x40000>,
|
||||
<0x03600000 0x10000>;
|
||||
reg-names = "hcd", "fpci";
|
||||
|
||||
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
|
||||
<&bpmp TEGRA194_CLK_XUSB_FALCON>,
|
||||
<&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
|
||||
<&bpmp TEGRA194_CLK_XUSB_SS>,
|
||||
<&bpmp TEGRA194_CLK_CLK_M>,
|
||||
<&bpmp TEGRA194_CLK_XUSB_FS>,
|
||||
<&bpmp TEGRA194_CLK_UTMIPLL>,
|
||||
<&bpmp TEGRA194_CLK_CLK_M>,
|
||||
<&bpmp TEGRA194_CLK_PLLE>;
|
||||
clock-names = "xusb_host", "xusb_falcon_src",
|
||||
"xusb_ss", "xusb_ss_src", "xusb_hs_src",
|
||||
"xusb_fs_src", "pll_u_480m", "clk_m",
|
||||
"pll_e";
|
||||
interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>,
|
||||
<&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>;
|
||||
interconnect-names = "dma-mem", "write";
|
||||
iommus = <&smmu TEGRA194_SID_XUSB_HOST>;
|
||||
|
||||
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
|
||||
<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
|
||||
power-domain-names = "xusb_host", "xusb_ss";
|
||||
|
||||
nvidia,xusb-padctl = <&xusb_padctl>;
|
||||
|
||||
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
|
||||
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
|
||||
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
|
||||
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
|
||||
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>,
|
||||
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
|
||||
phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
|
||||
};
|
||||
23
bindings/usb/nvidia,tegra20-ehci.txt
Normal file
23
bindings/usb/nvidia,tegra20-ehci.txt
Normal file
@@ -0,0 +1,23 @@
|
||||
Tegra SOC USB controllers
|
||||
|
||||
The device node for a USB controller that is part of a Tegra
|
||||
SOC is as described in the document "Open Firmware Recommended
|
||||
Practice : Universal Serial Bus" with the following modifications
|
||||
and additions :
|
||||
|
||||
Required properties :
|
||||
- compatible : For Tegra20, must contain "nvidia,tegra20-ehci".
|
||||
For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain
|
||||
"nvidia,<chip>-ehci" plus at least one of the above, where <chip> is
|
||||
tegra114, tegra124, tegra132, or tegra210.
|
||||
- nvidia,phy : phandle of the PHY that the controller is connected to.
|
||||
- clocks : Must contain one entry, for the module clock.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- resets : Must contain an entry for each entry in reset-names.
|
||||
See ../reset/reset.txt for details.
|
||||
- reset-names : Must include the following entries:
|
||||
- usb
|
||||
|
||||
Optional properties:
|
||||
- nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
|
||||
USB ports, which need reset twice due to hardware issues.
|
||||
199
bindings/usb/nvidia,tegra210-xusb.yaml
Normal file
199
bindings/usb/nvidia,tegra210-xusb.yaml
Normal file
@@ -0,0 +1,199 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra210 xHCI controller
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
|
||||
description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
|
||||
exposed by the Tegra XUSB pad controller.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra210-xusb
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: base and length of the xHCI host registers
|
||||
- description: base and length of the XUSB FPCI registers
|
||||
- description: base and length of the XUSB IPFS registers
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: hcd
|
||||
- const: fpci
|
||||
- const: ipfs
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: xHCI host interrupt
|
||||
- description: mailbox interrupt
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: XUSB host clock
|
||||
- description: XUSB host source clock
|
||||
- description: XUSB Falcon source clock
|
||||
- description: XUSB SuperSpeed clock
|
||||
- description: XUSB SuperSpeed clock divider
|
||||
- description: XUSB SuperSpeed source clock
|
||||
- description: XUSB HighSpeed clock source
|
||||
- description: XUSB FullSpeed clock source
|
||||
- description: USB PLL
|
||||
- description: reference clock
|
||||
- description: I/O PLL
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_host_src
|
||||
- const: xusb_falcon_src
|
||||
- const: xusb_ss
|
||||
- const: xusb_ss_div2
|
||||
- const: xusb_ss_src
|
||||
- const: xusb_hs_src
|
||||
- const: xusb_fs_src
|
||||
- const: pll_u_480m
|
||||
- const: clk_m
|
||||
- const: pll_e
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: reset for the XUSB host controller
|
||||
- description: reset for the SuperSpeed logic
|
||||
- description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_ss
|
||||
- const: xusb_src
|
||||
|
||||
nvidia,xusb-padctl:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to the XUSB pad controller that is used to configure
|
||||
the USB pads used by the XHCI controller
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 9
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 9
|
||||
items:
|
||||
enum:
|
||||
- usb2-0
|
||||
- usb2-1
|
||||
- usb2-2
|
||||
- usb2-3
|
||||
- hsic-0
|
||||
- usb3-0
|
||||
- usb3-1
|
||||
- usb3-2
|
||||
- usb3-3
|
||||
|
||||
power-domains:
|
||||
items:
|
||||
- description: XUSBC power domain (for Host and USB 2.0)
|
||||
- description: XUSBA power domain (for SuperSpeed)
|
||||
|
||||
power-domain-names:
|
||||
items:
|
||||
- const: xusb_host
|
||||
- const: xusb_ss
|
||||
|
||||
dvddio-pex-supply:
|
||||
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
|
||||
|
||||
hvddio-pex-supply:
|
||||
description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
|
||||
|
||||
avdd-usb-supply:
|
||||
description: USB controller power supply. Must supply 3.3 V.
|
||||
|
||||
avdd-pll-utmip-supply:
|
||||
description: UTMI PLL power supply. Must supply 1.8 V.
|
||||
|
||||
avdd-pll-uerefe-supply:
|
||||
description: PLLE reference PLL power supply. Must supply 1.05 V.
|
||||
|
||||
dvdd-usb-ss-pll-supply:
|
||||
description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
|
||||
|
||||
hvdd-usb-ss-pll-e-supply:
|
||||
description: High-voltage PLLE power supply. Must supply 1.8 V.
|
||||
|
||||
allOf:
|
||||
- $ref: usb-xhci.yaml
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra210-car.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
usb@70090000 {
|
||||
compatible = "nvidia,tegra210-xusb";
|
||||
reg = <0x70090000 0x8000>,
|
||||
<0x70098000 0x1000>,
|
||||
<0x70099000 0x1000>;
|
||||
reg-names = "hcd", "fpci", "ipfs";
|
||||
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_SS>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
|
||||
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
|
||||
<&tegra_car TEGRA210_CLK_PLL_U_480M>,
|
||||
<&tegra_car TEGRA210_CLK_CLK_M>,
|
||||
<&tegra_car TEGRA210_CLK_PLL_E>;
|
||||
clock-names = "xusb_host", "xusb_host_src",
|
||||
"xusb_falcon_src", "xusb_ss",
|
||||
"xusb_ss_div2", "xusb_ss_src",
|
||||
"xusb_hs_src", "xusb_fs_src",
|
||||
"pll_u_480m", "clk_m", "pll_e";
|
||||
resets = <&tegra_car 89>, <&tegra_car 156>,
|
||||
<&tegra_car 143>;
|
||||
reset-names = "xusb_host", "xusb_ss", "xusb_src";
|
||||
power-domains = <&pd_xusbhost>, <&pd_xusbss>;
|
||||
power-domain-names = "xusb_host", "xusb_ss";
|
||||
|
||||
nvidia,xusb-padctl = <&padctl>;
|
||||
|
||||
phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
|
||||
<&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>,
|
||||
<&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
|
||||
<&{/padctl@7009f000/pads/usb2/lanes/usb2-3}>,
|
||||
<&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>,
|
||||
<&{/padctl@7009f000/pads/pcie/lanes/pcie-5}>;
|
||||
phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
|
||||
"usb3-1";
|
||||
dvddio-pex-supply = <&vdd_pex_1v05>;
|
||||
hvddio-pex-supply = <&vdd_1v8>;
|
||||
avdd-usb-supply = <&vdd_3v3_sys>;
|
||||
avdd-pll-utmip-supply = <&vdd_1v8>;
|
||||
avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
|
||||
dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
|
||||
hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet@1 {
|
||||
compatible = "usb955,9ff";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
67
bindings/usb/nxp,isp1760.yaml
Normal file
67
bindings/usb/nxp,isp1760.yaml
Normal file
@@ -0,0 +1,67 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/nxp,isp1760.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP ISP1760 family controller bindings
|
||||
|
||||
maintainers:
|
||||
- Sebastian Siewior <bigeasy@linutronix.de>
|
||||
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
|
||||
description: |
|
||||
NXP ISP1760 family, which includes ISP1760/1761/1763 devicetree controller
|
||||
bindings
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- nxp,usb-isp1760
|
||||
- nxp,usb-isp1761
|
||||
- nxp,usb-isp1763
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Host controller interrupt
|
||||
- description: Device controller interrupt in isp1761
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: host
|
||||
- const: peripheral
|
||||
|
||||
bus-width:
|
||||
description:
|
||||
Number of data lines.
|
||||
enum: [8, 16, 32]
|
||||
default: 32
|
||||
|
||||
dr_mode:
|
||||
enum:
|
||||
- host
|
||||
- peripheral
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
usb@40200000 {
|
||||
compatible = "nxp,usb-isp1763";
|
||||
reg = <0x40200000 0x100000>;
|
||||
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-width = <16>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
...
|
||||
62
bindings/usb/octeon-usb.txt
Normal file
62
bindings/usb/octeon-usb.txt
Normal file
@@ -0,0 +1,62 @@
|
||||
OCTEON/OCTEON+ USB BLOCK
|
||||
|
||||
1) Main node
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be "cavium,octeon-5750-usbn"
|
||||
|
||||
- reg: specifies the physical base address of the USBN block and
|
||||
the length of the memory mapped region.
|
||||
|
||||
- #address-cells: specifies the number of cells needed to encode an
|
||||
address. The value must be 2.
|
||||
|
||||
- #size-cells: specifies the number of cells used to represent the size
|
||||
of an address. The value must be 2.
|
||||
|
||||
- ranges: specifies the translation between child address space and parent
|
||||
address space.
|
||||
|
||||
- clock-frequency: speed of the USB reference clock. Allowed values are
|
||||
12000000, 24000000 or 48000000.
|
||||
|
||||
- cavium,refclk-type: type of the USB reference clock. Allowed values are
|
||||
"crystal" or "external".
|
||||
|
||||
- refclk-frequency: deprecated, use "clock-frequency".
|
||||
|
||||
- refclk-type: deprecated, use "cavium,refclk-type".
|
||||
|
||||
2) Child node
|
||||
|
||||
The main node must have one child node which describes the built-in
|
||||
USB controller.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be "cavium,octeon-5750-usbc"
|
||||
|
||||
- reg: specifies the physical base address of the USBC block and
|
||||
the length of the memory mapped region.
|
||||
|
||||
- interrupts: specifies the interrupt number for the USB controller.
|
||||
|
||||
3) Example:
|
||||
|
||||
usbn: usbn@1180068000000 {
|
||||
compatible = "cavium,octeon-5750-usbn";
|
||||
reg = <0x11800 0x68000000 0x0 0x1000>;
|
||||
ranges; /* Direct mapping */
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
clock-frequency = <12000000>;
|
||||
cavium,refclk-type = "crystal";
|
||||
|
||||
usbc@16f0010000000 {
|
||||
compatible = "cavium,octeon-5750-usbc";
|
||||
reg = <0x16f00 0x10000000 0x0 0x80000>;
|
||||
interrupts = <0 56>;
|
||||
};
|
||||
};
|
||||
|
||||
23
bindings/usb/ohci-da8xx.txt
Normal file
23
bindings/usb/ohci-da8xx.txt
Normal file
@@ -0,0 +1,23 @@
|
||||
DA8XX USB OHCI controller
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Should be "ti,da830-ohci"
|
||||
- reg: Should contain one register range i.e. start and length
|
||||
- interrupts: Description of the interrupt line
|
||||
- phys: Phandle for the PHY device
|
||||
- phy-names: Should be "usb-phy"
|
||||
|
||||
Optional properties:
|
||||
- vbus-supply: phandle of regulator that controls vbus power / over-current
|
||||
|
||||
Example:
|
||||
|
||||
ohci: usb@225000 {
|
||||
compatible = "ti,da830-ohci";
|
||||
reg = <0x225000 0x1000>;
|
||||
interrupts = <59>;
|
||||
phys = <&usb_phy 1>;
|
||||
phy-names = "usb-phy";
|
||||
vbus-supply = <®_usb_ohci>;
|
||||
};
|
||||
24
bindings/usb/ohci-nxp.txt
Normal file
24
bindings/usb/ohci-nxp.txt
Normal file
@@ -0,0 +1,24 @@
|
||||
* OHCI controller, NXP ohci-nxp variant
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "nxp,ohci-nxp"
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: The OHCI interrupt
|
||||
- transceiver: phandle of the associated ISP1301 device - this is necessary for
|
||||
the UDC controller for connecting to the USB physical layer
|
||||
|
||||
Example (LPC32xx):
|
||||
|
||||
isp1301: usb-transceiver@2c {
|
||||
compatible = "nxp,isp1301";
|
||||
reg = <0x2c>;
|
||||
};
|
||||
|
||||
ohci@31020000 {
|
||||
compatible = "nxp,ohci-nxp";
|
||||
reg = <0x31020000 0x300>;
|
||||
interrupt-parent = <&mic>;
|
||||
interrupts = <0x3b 0>;
|
||||
transceiver = <&isp1301>;
|
||||
};
|
||||
15
bindings/usb/ohci-omap3.txt
Normal file
15
bindings/usb/ohci-omap3.txt
Normal file
@@ -0,0 +1,15 @@
|
||||
OMAP HS USB OHCI controller (OMAP3 and later)
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: should be "ti,ohci-omap3"
|
||||
- reg: should contain one register range i.e. start and length
|
||||
- interrupts: description of the interrupt line
|
||||
|
||||
Example for OMAP4:
|
||||
|
||||
usbhsohci: ohci@4a064800 {
|
||||
compatible = "ti,ohci-omap3";
|
||||
reg = <0x4a064800 0x400>;
|
||||
interrupts = <0 76 0x4>;
|
||||
};
|
||||
36
bindings/usb/ohci-st.txt
Normal file
36
bindings/usb/ohci-st.txt
Normal file
@@ -0,0 +1,36 @@
|
||||
ST USB OHCI controller
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : must be "st,st-ohci-300x"
|
||||
- reg : physical base addresses of the controller and length of memory mapped
|
||||
region
|
||||
- interrupts : one OHCI controller interrupt should be described here
|
||||
- clocks : phandle list of usb clocks
|
||||
- clock-names : should be "ic" for interconnect clock and "clk48"
|
||||
See: Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
- phys : phandle for the PHY device
|
||||
- phy-names : should be "usb"
|
||||
|
||||
- resets : phandle to the powerdown and reset controller for the USB IP
|
||||
- reset-names : should be "power" and "softreset".
|
||||
See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
|
||||
See: Documentation/devicetree/bindings/reset/reset.txt
|
||||
|
||||
Example:
|
||||
|
||||
ohci0: usb@fe1ffc00 {
|
||||
compatible = "st,st-ohci-300x";
|
||||
reg = <0xfe1ffc00 0x100>;
|
||||
interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
|
||||
clocks = <&clk_s_a1_ls 0>,
|
||||
<&clockgen_b0 0>;
|
||||
clock-names = "ic", "clk48";
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb";
|
||||
|
||||
resets = <&powerdown STIH416_USB0_POWERDOWN>,
|
||||
<&softreset STIH416_USB0_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
};
|
||||
80
bindings/usb/omap-usb.txt
Normal file
80
bindings/usb/omap-usb.txt
Normal file
@@ -0,0 +1,80 @@
|
||||
OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
|
||||
|
||||
OMAP MUSB GLUE
|
||||
- compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
|
||||
- ti,hwmods : must be "usb_otg_hs"
|
||||
- multipoint : Should be "1" indicating the musb controller supports
|
||||
multipoint. This is a MUSB configuration-specific setting.
|
||||
- num-eps : Specifies the number of endpoints. This is also a
|
||||
MUSB configuration-specific setting. Should be set to "16"
|
||||
- ram-bits : Specifies the ram address size. Should be set to "12"
|
||||
- interface-type : This is a board specific setting to describe the type of
|
||||
interface between the controller and the phy. It should be "0" or "1"
|
||||
specifying ULPI and UTMI respectively.
|
||||
- mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
|
||||
represents PERIPHERAL.
|
||||
- power : Should be "50". This signifies the controller can supply up to
|
||||
100mA when operating in host mode.
|
||||
- usb-phy : the phandle for the PHY device
|
||||
- phys : the phandle for the PHY device (used by generic PHY framework)
|
||||
- phy-names : the names of the PHY corresponding to the PHYs present in the
|
||||
*phy* phandle.
|
||||
|
||||
Optional properties:
|
||||
- ctrl-module : phandle of the control module this glue uses to write to
|
||||
mailbox
|
||||
|
||||
SOC specific device node entry
|
||||
usb_otg_hs: usb_otg_hs@4a0ab000 {
|
||||
compatible = "ti,omap4-musb";
|
||||
ti,hwmods = "usb_otg_hs";
|
||||
multipoint = <1>;
|
||||
num-eps = <16>;
|
||||
ram-bits = <12>;
|
||||
ctrl-module = <&omap_control_usb>;
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
};
|
||||
|
||||
Board specific device node entry
|
||||
&usb_otg_hs {
|
||||
interface-type = <1>;
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
OMAP DWC3 GLUE
|
||||
- compatible : Should be
|
||||
* "ti,dwc3" for OMAP5 and DRA7
|
||||
* "ti,am437x-dwc3" for AM437x
|
||||
- ti,hwmods : Should be "usb_otg_ss"
|
||||
- reg : Address and length of the register set for the device.
|
||||
- interrupts : The irq number of this device that is used to interrupt the
|
||||
MPU
|
||||
- #address-cells, #size-cells : Must be present if the device has sub-nodes
|
||||
- utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
|
||||
It should be set to "1" for HW mode and "2" for SW mode.
|
||||
- ranges: the child address space are mapped 1:1 onto the parent address space
|
||||
|
||||
Optional Properties:
|
||||
- extcon : phandle for the extcon device omap dwc3 uses to detect
|
||||
connect/disconnect events.
|
||||
- vbus-supply : phandle to the regulator device tree node if needed.
|
||||
|
||||
Sub-nodes:
|
||||
The dwc3 core should be added as subnode to omap dwc3 glue.
|
||||
- dwc3 :
|
||||
The binding details of dwc3 can be found in:
|
||||
Documentation/devicetree/bindings/usb/snps,dwc3.yaml
|
||||
|
||||
omap_dwc3 {
|
||||
compatible = "ti,dwc3";
|
||||
ti,hwmods = "usb_otg_ss";
|
||||
reg = <0x4a020000 0x1ff>;
|
||||
interrupts = <0 93 4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
utmi-mode = <2>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
53
bindings/usb/pxa-usb.txt
Normal file
53
bindings/usb/pxa-usb.txt
Normal file
@@ -0,0 +1,53 @@
|
||||
PXA USB controllers
|
||||
|
||||
OHCI
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "marvell,pxa-ohci" for USB controllers
|
||||
used in host mode.
|
||||
|
||||
Optional properties:
|
||||
- "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3"
|
||||
If present, enables the appropriate USB port of the controller.
|
||||
- "marvell,port-mode" selects the mode of the ports:
|
||||
1 = PMM_NPS_MODE
|
||||
2 = PMM_GLOBAL_MODE
|
||||
3 = PMM_PERPORT_MODE
|
||||
- "marvell,power-sense-low" - power sense pin is low-active.
|
||||
- "marvell,power-control-low" - power control pin is low-active.
|
||||
- "marvell,no-oc-protection" - disable over-current protection.
|
||||
- "marvell,oc-mode-perport" - enable per-port over-current protection.
|
||||
- "marvell,power_on_delay" Power On to Power Good time - in ms.
|
||||
|
||||
Example:
|
||||
|
||||
usb0: ohci@4c000000 {
|
||||
compatible = "marvell,pxa-ohci", "usb-ohci";
|
||||
reg = <0x4c000000 0x100000>;
|
||||
interrupts = <18>;
|
||||
marvell,enable-port1;
|
||||
marvell,port-mode = <2>; /* PMM_GLOBAL_MODE */
|
||||
};
|
||||
|
||||
UDC
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "marvell,pxa270-udc" for USB controllers
|
||||
used in device mode.
|
||||
- reg: usb device MMIO address space
|
||||
- interrupts: single interrupt generated by the UDC IP
|
||||
- clocks: input clock of the UDC IP (see clock-bindings.txt)
|
||||
|
||||
Optional properties:
|
||||
- gpios:
|
||||
- gpio activated to control the USB D+ pullup (see gpio.txt)
|
||||
|
||||
Example:
|
||||
|
||||
pxa27x_udc: udc@40600000 {
|
||||
compatible = "marvell,pxa270-udc";
|
||||
reg = <0x40600000 0x10000>;
|
||||
interrupts = <11>;
|
||||
clocks = <&pxa2xx_clks 11>;
|
||||
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
504
bindings/usb/qcom,dwc3.yaml
Normal file
504
bindings/usb/qcom,dwc3.yaml
Normal file
@@ -0,0 +1,504 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm SuperSpeed DWC3 USB SoC controller
|
||||
|
||||
maintainers:
|
||||
- Wesley Cheng <quic_wcheng@quicinc.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,ipq4019-dwc3
|
||||
- qcom,ipq6018-dwc3
|
||||
- qcom,ipq8064-dwc3
|
||||
- qcom,ipq8074-dwc3
|
||||
- qcom,msm8953-dwc3
|
||||
- qcom,msm8994-dwc3
|
||||
- qcom,msm8996-dwc3
|
||||
- qcom,msm8998-dwc3
|
||||
- qcom,qcs404-dwc3
|
||||
- qcom,sc7180-dwc3
|
||||
- qcom,sc7280-dwc3
|
||||
- qcom,sc8280xp-dwc3
|
||||
- qcom,sdm660-dwc3
|
||||
- qcom,sdm670-dwc3
|
||||
- qcom,sdm845-dwc3
|
||||
- qcom,sdx55-dwc3
|
||||
- qcom,sdx65-dwc3
|
||||
- qcom,sm4250-dwc3
|
||||
- qcom,sm6115-dwc3
|
||||
- qcom,sm6125-dwc3
|
||||
- qcom,sm6350-dwc3
|
||||
- qcom,sm6375-dwc3
|
||||
- qcom,sm8150-dwc3
|
||||
- qcom,sm8250-dwc3
|
||||
- qcom,sm8350-dwc3
|
||||
- qcom,sm8450-dwc3
|
||||
- const: qcom,dwc3
|
||||
|
||||
reg:
|
||||
description: Offset and length of register set for QSCRATCH wrapper
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
ranges: true
|
||||
|
||||
power-domains:
|
||||
description: specifies a phandle to PM domain provider node
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: |
|
||||
Several clocks are used, depending on the variant. Typical ones are::
|
||||
- cfg_noc:: System Config NOC clock.
|
||||
- core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
|
||||
60MHz for HS operation.
|
||||
- iface:: System bus AXI clock.
|
||||
- sleep:: Sleep clock, used for wakeup when USB3 core goes into low
|
||||
power mode (U3).
|
||||
- mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
|
||||
mode. Its frequency should be 19.2MHz.
|
||||
minItems: 1
|
||||
maxItems: 9
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 9
|
||||
|
||||
assigned-clocks:
|
||||
items:
|
||||
- description: Phandle and clock specifier of MOCK_UTMI_CLK.
|
||||
- description: Phandle and clock specifoer of MASTER_CLK.
|
||||
|
||||
assigned-clock-rates:
|
||||
items:
|
||||
- description: Must be 19.2MHz (19200000).
|
||||
- description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode.
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
interconnects:
|
||||
maxItems: 2
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: usb-ddr
|
||||
- const: apps-usb
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
qcom,select-utmi-as-pipe-clk:
|
||||
description:
|
||||
If present, disable USB3 pipe_clk requirement.
|
||||
Used when dwc3 operates without SSPHY and only
|
||||
HS/FS/LS modes are supported.
|
||||
type: boolean
|
||||
|
||||
wakeup-source: true
|
||||
|
||||
# Required child node:
|
||||
|
||||
patternProperties:
|
||||
"^usb@[0-9a-f]+$":
|
||||
$ref: snps,dwc3.yaml#
|
||||
|
||||
properties:
|
||||
wakeup-source: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq4019-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq8064-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Master/Core clock, has to be >= 125 MHz
|
||||
for SS operation and >= 60MHz for HS operation.
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8953-dwc3
|
||||
- qcom,msm8996-dwc3
|
||||
- qcom,msm8998-dwc3
|
||||
- qcom,sc7180-dwc3
|
||||
- qcom,sc7280-dwc3
|
||||
- qcom,sdm670-dwc3
|
||||
- qcom,sdm845-dwc3
|
||||
- qcom,sdx55-dwc3
|
||||
- qcom,sm6350-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq6018-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq8074-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8994-dwc3
|
||||
- qcom,qcs404-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8280xp-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 9
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- const: noc_aggr
|
||||
- const: noc_aggr_north
|
||||
- const: noc_aggr_south
|
||||
- const: noc_sys
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 6
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- const: bus
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm6115-dwc3
|
||||
- qcom,sm6125-dwc3
|
||||
- qcom,sm8150-dwc3
|
||||
- qcom,sm8250-dwc3
|
||||
- qcom,sm8450-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 6
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- const: xo
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8350-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 5
|
||||
maxItems: 6
|
||||
clock-names:
|
||||
minItems: 5
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- const: xo
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq4019-dwc3
|
||||
- qcom,ipq6018-dwc3
|
||||
- qcom,ipq8064-dwc3
|
||||
- qcom,ipq8074-dwc3
|
||||
- qcom,msm8994-dwc3
|
||||
- qcom,qcs404-dwc3
|
||||
- qcom,sc7180-dwc3
|
||||
- qcom,sdm670-dwc3
|
||||
- qcom,sdm845-dwc3
|
||||
- qcom,sdx55-dwc3
|
||||
- qcom,sdx65-dwc3
|
||||
- qcom,sm4250-dwc3
|
||||
- qcom,sm6125-dwc3
|
||||
- qcom,sm6350-dwc3
|
||||
- qcom,sm8150-dwc3
|
||||
- qcom,sm8250-dwc3
|
||||
- qcom,sm8350-dwc3
|
||||
- qcom,sm8450-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
items:
|
||||
- description: The interrupt that is asserted
|
||||
when a wakeup event is received on USB2 bus.
|
||||
- description: The interrupt that is asserted
|
||||
when a wakeup event is received on USB3 bus.
|
||||
- description: Wakeup event on DM line.
|
||||
- description: Wakeup event on DP line.
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: hs_phy_irq
|
||||
- const: ss_phy_irq
|
||||
- const: dm_hs_phy_irq
|
||||
- const: dp_hs_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8953-dwc3
|
||||
- qcom,msm8996-dwc3
|
||||
- qcom,msm8998-dwc3
|
||||
- qcom,sm6115-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 2
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: hs_phy_irq
|
||||
- const: ss_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: hs_phy_irq
|
||||
- const: ss_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc7280-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 3
|
||||
maxItems: 4
|
||||
interrupt-names:
|
||||
minItems: 3
|
||||
items:
|
||||
- const: hs_phy_irq
|
||||
- const: dp_hs_phy_irq
|
||||
- const: dm_hs_phy_irq
|
||||
- const: ss_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8280xp-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 4
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: pwr_event
|
||||
- const: dp_hs_phy_irq
|
||||
- const: dm_hs_phy_irq
|
||||
- const: ss_phy_irq
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@a6f8800 {
|
||||
compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
|
||||
reg = <0 0x0a6f8800 0 0x400>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
|
||||
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
|
||||
clock-names = "cfg_noc",
|
||||
"core",
|
||||
"iface",
|
||||
"sleep",
|
||||
"mock_utmi";
|
||||
|
||||
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
|
||||
assigned-clock-rates = <19200000>, <150000000>;
|
||||
|
||||
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "hs_phy_irq", "ss_phy_irq",
|
||||
"dm_hs_phy_irq", "dp_hs_phy_irq";
|
||||
|
||||
power-domains = <&gcc USB30_PRIM_GDSC>;
|
||||
|
||||
resets = <&gcc GCC_USB30_PRIM_BCR>;
|
||||
|
||||
usb@a600000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0 0x0a600000 0 0xcd00>;
|
||||
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&apps_smmu 0x740 0>;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_enblslpm_quirk;
|
||||
phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
62
bindings/usb/realtek,rts5411.yaml
Normal file
62
bindings/usb/realtek,rts5411.yaml
Normal file
@@ -0,0 +1,62 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/realtek,rts5411.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Binding for the Realtek RTS5411 USB 3.0 hub controller
|
||||
|
||||
maintainers:
|
||||
- Matthias Kaehlcke <mka@chromium.org>
|
||||
|
||||
allOf:
|
||||
- $ref: usb-device.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- usbbda,5411
|
||||
- usbbda,411
|
||||
|
||||
reg: true
|
||||
|
||||
vdd-supply:
|
||||
description:
|
||||
phandle to the regulator that provides power to the hub.
|
||||
|
||||
peer-hub:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
description:
|
||||
phandle to the peer hub on the controller.
|
||||
|
||||
required:
|
||||
- peer-hub
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb {
|
||||
dr_mode = "host";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* 2.0 hub on port 1 */
|
||||
hub_2_0: hub@1 {
|
||||
compatible = "usbbda,5411";
|
||||
reg = <1>;
|
||||
vdd-supply = <&pp3300_hub>;
|
||||
peer-hub = <&hub_3_0>;
|
||||
};
|
||||
|
||||
/* 3.0 hub on port 2 */
|
||||
hub_3_0: hub@2 {
|
||||
compatible = "usbbda,411";
|
||||
reg = <2>;
|
||||
vdd-supply = <&pp3300_hub>;
|
||||
peer-hub = <&hub_2_0>;
|
||||
};
|
||||
};
|
||||
86
bindings/usb/renesas,usb-xhci.yaml
Normal file
86
bindings/usb/renesas,usb-xhci.yaml
Normal file
@@ -0,0 +1,86 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/renesas,usb-xhci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas USB xHCI controllers
|
||||
|
||||
maintainers:
|
||||
- Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
|
||||
- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
|
||||
|
||||
allOf:
|
||||
- $ref: "usb-xhci.yaml"
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,xhci-r8a7742 # RZ/G1H
|
||||
- renesas,xhci-r8a7743 # RZ/G1M
|
||||
- renesas,xhci-r8a7744 # RZ/G1N
|
||||
- renesas,xhci-r8a7790 # R-Car H2
|
||||
- renesas,xhci-r8a7791 # R-Car M2-W
|
||||
- renesas,xhci-r8a7793 # R-Car M2-N
|
||||
- const: renesas,rcar-gen2-xhci # R-Car Gen2 and RZ/G1
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,xhci-r8a774a1 # RZ/G2M
|
||||
- renesas,xhci-r8a774b1 # RZ/G2N
|
||||
- renesas,xhci-r8a774c0 # RZ/G2E
|
||||
- renesas,xhci-r8a774e1 # RZ/G2H
|
||||
- renesas,xhci-r8a7795 # R-Car H3
|
||||
- renesas,xhci-r8a7796 # R-Car M3-W
|
||||
- renesas,xhci-r8a77961 # R-Car M3-W+
|
||||
- renesas,xhci-r8a77965 # R-Car M3-N
|
||||
- renesas,xhci-r8a77990 # R-Car E3
|
||||
- const: renesas,rcar-gen3-xhci # R-Car Gen3 and RZ/G2
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
items:
|
||||
- const: usb
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- power-domains
|
||||
- resets
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/power/r8a7795-sysc.h>
|
||||
|
||||
xhci0: usb@ee000000 {
|
||||
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
|
||||
reg = <0xee000000 0xc00>;
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 328>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 328>;
|
||||
};
|
||||
182
bindings/usb/renesas,usb3-peri.yaml
Normal file
182
bindings/usb/renesas,usb3-peri.yaml
Normal file
@@ -0,0 +1,182 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/renesas,usb3-peri.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas USB 3.0 Peripheral controller
|
||||
|
||||
maintainers:
|
||||
- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r8a774a1-usb3-peri # RZ/G2M
|
||||
- renesas,r8a774b1-usb3-peri # RZ/G2N
|
||||
- renesas,r8a774c0-usb3-peri # RZ/G2E
|
||||
- renesas,r8a774e1-usb3-peri # RZ/G2H
|
||||
- renesas,r8a7795-usb3-peri # R-Car H3
|
||||
- renesas,r8a7796-usb3-peri # R-Car M3-W
|
||||
- renesas,r8a77961-usb3-peri # R-Car M3-W+
|
||||
- renesas,r8a77965-usb3-peri # R-Car M3-N
|
||||
- renesas,r8a77990-usb3-peri # R-Car E3
|
||||
- const: renesas,rcar-gen3-usb3-peri
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a09g011-usb3-peri # RZ/V2M
|
||||
- const: renesas,rzv2m-usb3-peri
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Combined interrupt for DMA, SYS and ERR
|
||||
- description: Dual Role Device (DRD)
|
||||
- description: Battery Charging
|
||||
- description: Global Purpose Input
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: all_p
|
||||
- const: drd
|
||||
- const: bc
|
||||
- const: gpi
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Main clock
|
||||
- description: Register access clock
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: aclk
|
||||
- const: reg
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
const: usb
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Peripheral reset
|
||||
- description: DRD reset
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: aresetn_p
|
||||
- const: drd_reset
|
||||
|
||||
usb-role-switch:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: Support role switch.
|
||||
|
||||
companion:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle of a companion.
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description: |
|
||||
any connector to the data bus of this controller should be modelled
|
||||
using the OF graph bindings specified, if the "usb-role-switch"
|
||||
property is used.
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: High Speed (HS) data bus.
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Super Speed (SS) data bus.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,rzv2m-usb3-peri
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
clock-names:
|
||||
minItems: 2
|
||||
interrupts:
|
||||
minItems: 4
|
||||
interrupt-names:
|
||||
minItems: 4
|
||||
resets:
|
||||
minItems: 2
|
||||
required:
|
||||
- clock-names
|
||||
- interrupt-names
|
||||
- resets
|
||||
- reset-names
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/power/r8a774c0-sysc.h>
|
||||
|
||||
usb3_peri0: usb@ee020000 {
|
||||
compatible = "renesas,r8a774c0-usb3-peri", "renesas,rcar-gen3-usb3-peri";
|
||||
reg = <0xee020000 0x400>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 328>;
|
||||
companion = <&xhci0>;
|
||||
usb-role-switch;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
usb3_hs_ep: endpoint {
|
||||
remote-endpoint = <&hs_ep>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
usb3_role_switch: endpoint {
|
||||
remote-endpoint = <&hd3ss3220_out_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
153
bindings/usb/renesas,usbhs.yaml
Normal file
153
bindings/usb/renesas,usbhs.yaml
Normal file
@@ -0,0 +1,153 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/renesas,usbhs.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas USBHS (HS-USB) controller
|
||||
|
||||
maintainers:
|
||||
- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: renesas,usbhs-r7s72100 # RZ/A1
|
||||
- const: renesas,rza1-usbhs
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,usbhs-r7s9210 # RZ/A2
|
||||
- renesas,usbhs-r9a07g043 # RZ/G2UL
|
||||
- renesas,usbhs-r9a07g044 # RZ/G2{L,LC}
|
||||
- renesas,usbhs-r9a07g054 # RZ/V2L
|
||||
- const: renesas,rza2-usbhs
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,usbhs-r8a7742 # RZ/G1H
|
||||
- renesas,usbhs-r8a7743 # RZ/G1M
|
||||
- renesas,usbhs-r8a7744 # RZ/G1N
|
||||
- renesas,usbhs-r8a7745 # RZ/G1E
|
||||
- renesas,usbhs-r8a77470 # RZ/G1C
|
||||
- renesas,usbhs-r8a7790 # R-Car H2
|
||||
- renesas,usbhs-r8a7791 # R-Car M2-W
|
||||
- renesas,usbhs-r8a7792 # R-Car V2H
|
||||
- renesas,usbhs-r8a7793 # R-Car M2-N
|
||||
- renesas,usbhs-r8a7794 # R-Car E2
|
||||
- const: renesas,rcar-gen2-usbhs
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,usbhs-r8a774a1 # RZ/G2M
|
||||
- renesas,usbhs-r8a774b1 # RZ/G2N
|
||||
- renesas,usbhs-r8a774c0 # RZ/G2E
|
||||
- renesas,usbhs-r8a774e1 # RZ/G2H
|
||||
- renesas,usbhs-r8a7795 # R-Car H3
|
||||
- renesas,usbhs-r8a7796 # R-Car M3-W
|
||||
- renesas,usbhs-r8a77961 # R-Car M3-W+
|
||||
- renesas,usbhs-r8a77965 # R-Car M3-N
|
||||
- renesas,usbhs-r8a77990 # R-Car E3
|
||||
- renesas,usbhs-r8a77995 # R-Car D3
|
||||
- const: renesas,rcar-gen3-usbhs
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB 2.0 host
|
||||
- description: USB 2.0 peripheral
|
||||
- description: USB 2.0 clock selector
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
renesas,buswait:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
Integer to use BUSWAIT register.
|
||||
|
||||
renesas,enable-gpio:
|
||||
maxItems: 1
|
||||
description: |
|
||||
gpio specifier to check GPIO determining if USB function should be
|
||||
enabled.
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
items:
|
||||
- const: usb
|
||||
|
||||
dmas:
|
||||
minItems: 2
|
||||
maxItems: 4
|
||||
|
||||
dma-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: ch0
|
||||
- const: ch1
|
||||
- const: ch2
|
||||
- const: ch3
|
||||
|
||||
dr_mode: true
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB 2.0 host
|
||||
- description: USB 2.0 peripheral
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- interrupts
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,usbhs-r9a07g043
|
||||
- renesas,usbhs-r9a07g044
|
||||
- renesas,usbhs-r9a07g054
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
items:
|
||||
- description: U2P_IXL_INT
|
||||
- description: U2P_INT_DMA[0]
|
||||
- description: U2P_INT_DMA[1]
|
||||
- description: U2P_INT_DMAERR
|
||||
required:
|
||||
- resets
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/power/r8a7790-sysc.h>
|
||||
|
||||
usbhs: usb@e6590000 {
|
||||
compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
|
||||
reg = <0xe6590000 0x100>;
|
||||
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 704>;
|
||||
};
|
||||
44
bindings/usb/richtek,rt1711h.txt
Normal file
44
bindings/usb/richtek,rt1711h.txt
Normal file
@@ -0,0 +1,44 @@
|
||||
Richtek RT1711H TypeC PD Controller.
|
||||
|
||||
Required properties:
|
||||
- compatible : Must be "richtek,rt1711h".
|
||||
- reg : Must be 0x4e, it's slave address of RT1711H.
|
||||
- interrupts : <a b> where a is the interrupt number and b represents an
|
||||
encoding of the sense and level information for the interrupt.
|
||||
|
||||
Required sub-node:
|
||||
- connector: The "usb-c-connector" attached to the tcpci chip, the bindings
|
||||
of connector node are specified in
|
||||
Documentation/devicetree/bindings/connector/usb-connector.yaml
|
||||
|
||||
Example :
|
||||
rt1711h@4e {
|
||||
compatible = "richtek,rt1711h";
|
||||
reg = <0x4e>;
|
||||
interrupt-parent = <&gpio26>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
usb_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
data-role = "dual";
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)
|
||||
PDO_VAR(5000, 12000, 2000)>;
|
||||
op-sink-microwatt = <10000000>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
usb_con_ss: endpoint {
|
||||
remote-endpoint = <&usb3_data_ss>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
100
bindings/usb/richtek,rt1711h.yaml
Normal file
100
bindings/usb/richtek,rt1711h.yaml
Normal file
@@ -0,0 +1,100 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/richtek,rt1711h.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Richtek RT1711H Type-C Port Switch and Power Delivery controller
|
||||
|
||||
maintainers:
|
||||
- Gene Chen <gene_chen@richtek.com>
|
||||
|
||||
description: |
|
||||
The RT1711H is a USB Type-C controller that complies with the latest
|
||||
USB Type-C and PD standards. It does the USB Type-C detection including attach
|
||||
and orientation. It integrates the physical layer of the USB BMC power
|
||||
delivery protocol to allow up to 100W of power. The BMC PD block enables full
|
||||
support for alternative interfaces of the Type-C specification.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- richtek,rt1711h
|
||||
- richtek,rt1715
|
||||
description:
|
||||
RT1711H support PD20, RT1715 support PD30 except Fast Role Swap.
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
wakeup-source:
|
||||
type: boolean
|
||||
|
||||
connector:
|
||||
type: object
|
||||
$ref: /schemas/connector/usb-connector.yaml#
|
||||
description:
|
||||
Properties for usb c connector.
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- connector
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/usb/pd.h>
|
||||
i2c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rt1711h@4e {
|
||||
compatible = "richtek,rt1711h";
|
||||
reg = <0x4e>;
|
||||
interrupts-extended = <&gpio26 3 IRQ_TYPE_LEVEL_LOW>;
|
||||
wakeup-source;
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
data-role = "dual";
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>;
|
||||
op-sink-microwatt = <10000000>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
endpoint {
|
||||
remote-endpoint = <&usb_hs>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
endpoint {
|
||||
remote-endpoint = <&usb_ss>;
|
||||
};
|
||||
};
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
endpoint {
|
||||
remote-endpoint = <&dp_aux>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
85
bindings/usb/richtek,rt1719.yaml
Normal file
85
bindings/usb/richtek,rt1719.yaml
Normal file
@@ -0,0 +1,85 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/richtek,rt1719.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Richtek RT1719 sink-only Type-C PD controller bindings
|
||||
|
||||
maintainers:
|
||||
- ChiYuan Huang <cy_huang@richtek.com>
|
||||
|
||||
description: |
|
||||
The RT1719 is a sink-only USB Type-C contoller that complies with the latest
|
||||
USB Type-C and PD standards. It does the USB Type-C detection including attach
|
||||
and orientation. It integrates the physical layer of the USB BMC power
|
||||
delivery protocol to allow up to 100W of power. The BMC PD block enables full
|
||||
support for alternative interfaces of the Type-C specification.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- richtek,rt1719
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
wakeup-source:
|
||||
description: enable IRQ remote wakeup, see power/wakeup-source.txt
|
||||
type: boolean
|
||||
|
||||
connector:
|
||||
type: object
|
||||
$ref: ../connector/usb-connector.yaml#
|
||||
description:
|
||||
Properties for usb c connector.
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- connector
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rt1719@43 {
|
||||
compatible = "richtek,rt1719";
|
||||
reg = <0x43>;
|
||||
interrupts-extended = <&gpio26 2 IRQ_TYPE_LEVEL_LOW>;
|
||||
wakeup-source;
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
endpoint {
|
||||
remote-endpoint = <&usb_hs>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
endpoint {
|
||||
remote-endpoint = <&usb_ss>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
110
bindings/usb/rockchip,dwc3.yaml
Normal file
110
bindings/usb/rockchip,dwc3.yaml
Normal file
@@ -0,0 +1,110 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Rockchip SuperSpeed DWC3 USB SoC controller
|
||||
|
||||
maintainers:
|
||||
- Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
description:
|
||||
The common content of the node is defined in snps,dwc3.yaml.
|
||||
|
||||
Phy documentation is provided in the following places.
|
||||
|
||||
USB2.0 PHY
|
||||
Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
|
||||
|
||||
Type-C PHY
|
||||
Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
|
||||
|
||||
allOf:
|
||||
- $ref: snps,dwc3.yaml#
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- rockchip,rk3328-dwc3
|
||||
- rockchip,rk3399-dwc3
|
||||
- rockchip,rk3568-dwc3
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- rockchip,rk3328-dwc3
|
||||
- rockchip,rk3399-dwc3
|
||||
- rockchip,rk3568-dwc3
|
||||
- const: snps,dwc3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
items:
|
||||
- description:
|
||||
Controller reference clock, must to be 24 MHz
|
||||
- description:
|
||||
Controller suspend clock, must to be 24 MHz or 32 KHz
|
||||
- description:
|
||||
Master/Core clock, must to be >= 62.5 MHz for SS
|
||||
operation and >= 30MHz for HS operation
|
||||
- description:
|
||||
Controller grf clock
|
||||
|
||||
clock-names:
|
||||
minItems: 3
|
||||
items:
|
||||
- const: ref_clk
|
||||
- const: suspend_clk
|
||||
- const: bus_clk
|
||||
- const: grf_clk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
const: usb3-otg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/rk3399-cru.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usbdrd3_0: usb@fe800000 {
|
||||
compatible = "rockchip,rk3399-dwc3", "snps,dwc3";
|
||||
reg = <0x0 0xfe800000 0x0 0x100000>;
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
|
||||
<&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
|
||||
clock-names = "ref_clk", "suspend_clk",
|
||||
"bus_clk", "grf_clk";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
};
|
||||
22
bindings/usb/s3c2410-usb.txt
Normal file
22
bindings/usb/s3c2410-usb.txt
Normal file
@@ -0,0 +1,22 @@
|
||||
Samsung S3C2410 and compatible SoC USB controller
|
||||
|
||||
OHCI
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "samsung,s3c2410-ohci" for USB host controller
|
||||
- reg: address and length of the controller memory mapped region
|
||||
- interrupts: interrupt number for the USB OHCI controller
|
||||
- clocks: Should reference the bus and host clocks
|
||||
- clock-names: Should contain two strings
|
||||
"usb-bus-host" for the USB bus clock
|
||||
"usb-host" for the USB host clock
|
||||
|
||||
Example:
|
||||
|
||||
usb0: ohci@49000000 {
|
||||
compatible = "samsung,s3c2410-ohci";
|
||||
reg = <0x49000000 0x100>;
|
||||
interrupts = <0 0 26 3>;
|
||||
clocks = <&clocks UCLK>, <&clocks HCLK_USBH>;
|
||||
clock-names = "usb-bus-host", "usb-host";
|
||||
};
|
||||
129
bindings/usb/samsung,exynos-dwc3.yaml
Normal file
129
bindings/usb/samsung,exynos-dwc3.yaml
Normal file
@@ -0,0 +1,129 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/samsung,exynos-dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung Exynos SoC USB 3.0 DWC3 Controller
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,exynos5250-dwusb3
|
||||
- samsung,exynos5433-dwusb3
|
||||
- samsung,exynos7-dwusb3
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
ranges: true
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
vdd10-supply:
|
||||
description: 1.0V power supply
|
||||
|
||||
vdd33-supply:
|
||||
description: 3.0V/3.3V power supply
|
||||
|
||||
patternProperties:
|
||||
"^usb@[0-9a-f]+$":
|
||||
$ref: snps,dwc3.yaml#
|
||||
description: Required child node
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#address-cells'
|
||||
- clocks
|
||||
- clock-names
|
||||
- ranges
|
||||
- '#size-cells'
|
||||
- vdd10-supply
|
||||
- vdd33-supply
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: samsung,exynos5250-dwusb3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
items:
|
||||
- const: usbdrd30
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: samsung,exynos54333-dwusb3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: aclk
|
||||
- const: susp_clk
|
||||
- const: pipe_pclk
|
||||
- const: phyclk
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: samsung,exynos7-dwusb3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: usbdrd30
|
||||
- const: usbdrd30_susp_clk
|
||||
- const: usbdrd30_axius_clk
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos5420.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
usb {
|
||||
compatible = "samsung,exynos5250-dwusb3";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
clocks = <&clock CLK_USBD300>;
|
||||
clock-names = "usbdrd30";
|
||||
vdd33-supply = <&ldo9_reg>;
|
||||
vdd10-supply = <&ldo11_reg>;
|
||||
|
||||
usb@12000000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x12000000 0x10000>;
|
||||
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
snps,dis_u3_susphy_quirk;
|
||||
};
|
||||
};
|
||||
107
bindings/usb/samsung,exynos-usb2.yaml
Normal file
107
bindings/usb/samsung,exynos-usb2.yaml
Normal file
@@ -0,0 +1,107 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/samsung,exynos-usb2.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,exynos4210-ehci
|
||||
- samsung,exynos4210-ohci
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: usbhost
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
phy-names:
|
||||
items:
|
||||
enum: [host, hsic0, hsic1]
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
samsung,vbus-gpio:
|
||||
description:
|
||||
Only for controller in EHCI mode, if present, specifies the GPIO that
|
||||
needs to be pulled up for the bus to be powered.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- phys
|
||||
- phy-names
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: usb-hcd.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: samsung,exynos4210-ohci
|
||||
then:
|
||||
properties:
|
||||
samsung,vbus-gpio: false
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos5420.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
usb@12110000 {
|
||||
compatible = "samsung,exynos4210-ehci";
|
||||
reg = <0x12110000 0x100>;
|
||||
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_USBH20>;
|
||||
clock-names = "usbhost";
|
||||
phys = <&usb2_phy 0>;
|
||||
phy-names = "host";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hub@1 {
|
||||
compatible = "usb0424,9514";
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usbether@1 {
|
||||
compatible = "usb0424,ec00";
|
||||
reg = <1>;
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@12120000 {
|
||||
compatible = "samsung,exynos4210-ohci";
|
||||
reg = <0x12120000 0x100>;
|
||||
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_USBH20>;
|
||||
clock-names = "usbhost";
|
||||
phys = <&usb2_phy 0>;
|
||||
phy-names = "host";
|
||||
};
|
||||
38
bindings/usb/samsung-hsotg.txt
Normal file
38
bindings/usb/samsung-hsotg.txt
Normal file
@@ -0,0 +1,38 @@
|
||||
Samsung High Speed USB OTG controller
|
||||
-----------------------------
|
||||
|
||||
The Samsung HSOTG IP can be found on Samsung SoCs, from S3C6400 onwards.
|
||||
It gives functionality of OTG-compliant USB 2.0 host and device with
|
||||
support for USB 2.0 high-speed (480Mbps) and full-speed (12 Mbps)
|
||||
operation.
|
||||
|
||||
Currently only device mode is supported.
|
||||
|
||||
Binding details
|
||||
-----
|
||||
|
||||
Required properties:
|
||||
- compatible: "samsung,s3c6400-hsotg" should be used for all currently
|
||||
supported SoC,
|
||||
- interrupts: specifier of interrupt signal of interrupt controller,
|
||||
according to bindings of interrupt controller,
|
||||
- clocks: contains an array of clock specifiers:
|
||||
- first entry: OTG clock
|
||||
- clock-names: contains array of clock names:
|
||||
- first entry: must be "otg"
|
||||
- vusb_d-supply: phandle to voltage regulator of digital section,
|
||||
- vusb_a-supply: phandle to voltage regulator of analog section.
|
||||
|
||||
Example
|
||||
-----
|
||||
|
||||
hsotg@12480000 {
|
||||
compatible = "samsung,s3c6400-hsotg";
|
||||
reg = <0x12480000 0x20000>;
|
||||
interrupts = <0 71 0>;
|
||||
clocks = <&clock 305>;
|
||||
clock-names = "otg";
|
||||
vusb_d-supply = <&vusb_reg>;
|
||||
vusb_a-supply = <&vusbdac_reg>;
|
||||
};
|
||||
|
||||
109
bindings/usb/smsc,usb3503.yaml
Normal file
109
bindings/usb/smsc,usb3503.yaml
Normal file
@@ -0,0 +1,109 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/smsc,usb3503.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: SMSC USB3503 High-Speed Hub Controller
|
||||
|
||||
maintainers:
|
||||
- Dongjin Kim <tobetter@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- smsc,usb3503
|
||||
- smsc,usb3503a
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
connect-gpios:
|
||||
maxItems: 1
|
||||
description: >
|
||||
GPIO for connect
|
||||
|
||||
intn-gpios:
|
||||
maxItems: 1
|
||||
description: >
|
||||
GPIO for interrupt
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: >
|
||||
GPIO for reset
|
||||
|
||||
disabled-ports:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
items:
|
||||
minimum: 1
|
||||
maximum: 3
|
||||
description: >
|
||||
Specifies the ports unused using their port number. Do not describe this
|
||||
property if all ports have to be enabled.
|
||||
|
||||
initial-mode:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [1, 2]
|
||||
description: >
|
||||
Specifies initial mode. 1 for Hub mode, 2 for standby mode.
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description: >
|
||||
Clock used for driving REFCLK signal. If not provided the driver assumes
|
||||
that clock signal is always available, its rate is specified by REF_SEL
|
||||
pins and a value from the primary reference clock frequencies table is
|
||||
used.
|
||||
|
||||
clock-names:
|
||||
const: refclk
|
||||
|
||||
refclk-frequency:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
Frequency of the REFCLK signal as defined by REF_SEL pins. If not
|
||||
provided, driver will not set rate of the REFCLK signal and assume that a
|
||||
value from the primary reference clock frequencies table is used.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb-hub@8 {
|
||||
compatible = "smsc,usb3503";
|
||||
reg = <0x08>;
|
||||
connect-gpios = <&gpx3 0 1>;
|
||||
disabled-ports = <2 3>;
|
||||
intn-gpios = <&gpx3 4 1>;
|
||||
reset-gpios = <&gpx3 5 1>;
|
||||
initial-mode = <1>;
|
||||
clocks = <&clks 80>;
|
||||
clock-names = "refclk";
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
usb-hub {
|
||||
/* I2C is not connected */
|
||||
compatible = "smsc,usb3503";
|
||||
initial-mode = <1>; /* initialize in HUB mode */
|
||||
disabled-ports = <1>;
|
||||
intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
|
||||
reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
|
||||
connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
|
||||
refclk-frequency = <19200000>;
|
||||
};
|
||||
|
||||
...
|
||||
391
bindings/usb/snps,dwc3.yaml
Normal file
391
bindings/usb/snps,dwc3.yaml
Normal file
@@ -0,0 +1,391 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/snps,dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Synopsys DesignWare USB3 Controller
|
||||
|
||||
maintainers:
|
||||
- Felipe Balbi <balbi@kernel.org>
|
||||
|
||||
description:
|
||||
This is usually a subnode to DWC3 glue to which it is connected, but can also
|
||||
be presented as a standalone DT node with an optional vendor-specific
|
||||
compatible string.
|
||||
|
||||
allOf:
|
||||
- $ref: usb-drd.yaml#
|
||||
- if:
|
||||
properties:
|
||||
dr_mode:
|
||||
const: peripheral
|
||||
|
||||
required:
|
||||
- dr_mode
|
||||
then:
|
||||
$ref: usb.yaml#
|
||||
else:
|
||||
$ref: usb-xhci.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
oneOf:
|
||||
- const: snps,dwc3
|
||||
- const: synopsys,dwc3
|
||||
deprecated: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
description:
|
||||
It's either a single common DWC3 interrupt (dwc_usb3) or individual
|
||||
interrupts for the host, gadget and DRD modes.
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
oneOf:
|
||||
- const: dwc_usb3
|
||||
- items:
|
||||
enum: [host, peripheral, otg]
|
||||
|
||||
clocks:
|
||||
description:
|
||||
In general the core supports three types of clocks. bus_early is a
|
||||
SoC Bus Clock (AHB/AXI/Native). ref generates ITP when the UTMI/ULPI
|
||||
PHY is suspended. suspend clocks a small part of the USB3 core when
|
||||
SS PHY in P3. But particular cases may differ from that having less
|
||||
or more clock sources with another names.
|
||||
|
||||
clock-names:
|
||||
contains:
|
||||
anyOf:
|
||||
- enum: [bus_early, ref, suspend]
|
||||
- true
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
usb-phy:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB2/HS PHY
|
||||
- description: USB3/SS PHY
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- usb2-phy
|
||||
- usb3-phy
|
||||
|
||||
resets:
|
||||
minItems: 1
|
||||
|
||||
snps,usb2-lpm-disable:
|
||||
description: Indicate if we don't want to enable USB2 HW LPM for host
|
||||
mode.
|
||||
type: boolean
|
||||
|
||||
snps,usb3_lpm_capable:
|
||||
description: Determines if platform is USB3 LPM capable
|
||||
type: boolean
|
||||
|
||||
snps,usb2-gadget-lpm-disable:
|
||||
description: Indicate if we don't want to enable USB2 HW LPM for gadget
|
||||
mode.
|
||||
type: boolean
|
||||
|
||||
snps,dis-start-transfer-quirk:
|
||||
description:
|
||||
When set, disable isoc START TRANSFER command failure SW work-around
|
||||
for DWC_usb31 version 1.70a-ea06 and prior.
|
||||
type: boolean
|
||||
|
||||
snps,disable_scramble_quirk:
|
||||
description:
|
||||
True when SW should disable data scrambling. Only really useful for FPGA
|
||||
builds.
|
||||
type: boolean
|
||||
|
||||
snps,has-lpm-erratum:
|
||||
description: True when DWC3 was configured with LPM Erratum enabled
|
||||
type: boolean
|
||||
|
||||
snps,lpm-nyet-threshold:
|
||||
description: LPM NYET threshold
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
|
||||
snps,u2exit_lfps_quirk:
|
||||
description: Set if we want to enable u2exit lfps quirk
|
||||
type: boolean
|
||||
|
||||
snps,u2ss_inp3_quirk:
|
||||
description: Set if we enable P3 OK for U2/SS Inactive quirk
|
||||
type: boolean
|
||||
|
||||
snps,req_p1p2p3_quirk:
|
||||
description:
|
||||
When set, the core will always request for P1/P2/P3 transition sequence.
|
||||
type: boolean
|
||||
|
||||
snps,del_p1p2p3_quirk:
|
||||
description:
|
||||
When set core will delay P1/P2/P3 until a certain amount of 8B10B errors
|
||||
occur.
|
||||
type: boolean
|
||||
|
||||
snps,del_phy_power_chg_quirk:
|
||||
description: When set core will delay PHY power change from P0 to P1/P2/P3.
|
||||
type: boolean
|
||||
|
||||
snps,lfps_filter_quirk:
|
||||
description: When set core will filter LFPS reception.
|
||||
type: boolean
|
||||
|
||||
snps,rx_detect_poll_quirk:
|
||||
description:
|
||||
when set core will disable a 400us delay to start Polling LFPS after
|
||||
RX.Detect.
|
||||
type: boolean
|
||||
|
||||
snps,tx_de_emphasis_quirk:
|
||||
description: When set core will set Tx de-emphasis value
|
||||
type: boolean
|
||||
|
||||
snps,tx_de_emphasis:
|
||||
description:
|
||||
The value driven to the PHY is controlled by the LTSSM during USB3
|
||||
Compliance mode.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
enum:
|
||||
- 0 # -6dB de-emphasis
|
||||
- 1 # -3.5dB de-emphasis
|
||||
- 2 # No de-emphasis
|
||||
|
||||
snps,dis_u3_susphy_quirk:
|
||||
description: When set core will disable USB3 suspend phy
|
||||
type: boolean
|
||||
|
||||
snps,dis_u2_susphy_quirk:
|
||||
description: When set core will disable USB2 suspend phy
|
||||
type: boolean
|
||||
|
||||
snps,dis_enblslpm_quirk:
|
||||
description:
|
||||
When set clears the enblslpm in GUSB2PHYCFG, disabling the suspend signal
|
||||
to the PHY.
|
||||
type: boolean
|
||||
|
||||
snps,dis-u1-entry-quirk:
|
||||
description: Set if link entering into U1 needs to be disabled
|
||||
type: boolean
|
||||
|
||||
snps,dis-u2-entry-quirk:
|
||||
description: Set if link entering into U2 needs to be disabled
|
||||
type: boolean
|
||||
|
||||
snps,dis_rxdet_inp3_quirk:
|
||||
description:
|
||||
When set core will disable receiver detection in PHY P3 power state.
|
||||
type: boolean
|
||||
|
||||
snps,dis-u2-freeclk-exists-quirk:
|
||||
description:
|
||||
When set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2
|
||||
PHY doesn't provide a free-running PHY clock.
|
||||
type: boolean
|
||||
|
||||
snps,dis-del-phy-power-chg-quirk:
|
||||
description:
|
||||
When set core will change PHY power from P0 to P1/P2/P3 without delay.
|
||||
type: boolean
|
||||
|
||||
snps,dis-tx-ipgap-linecheck-quirk:
|
||||
description: When set, disable u2mac linestate check during HS transmit
|
||||
type: boolean
|
||||
|
||||
snps,parkmode-disable-ss-quirk:
|
||||
description:
|
||||
When set, all SuperSpeed bus instances in park mode are disabled.
|
||||
type: boolean
|
||||
|
||||
snps,dis_metastability_quirk:
|
||||
description:
|
||||
When set, disable metastability workaround. CAUTION! Use only if you are
|
||||
absolutely sure of it.
|
||||
type: boolean
|
||||
|
||||
snps,dis-split-quirk:
|
||||
description:
|
||||
When set, change the way URBs are handled by the driver. Needed to
|
||||
avoid -EPROTO errors with usbhid on some devices (Hikey 970).
|
||||
type: boolean
|
||||
|
||||
snps,gfladj-refclk-lpm-sel-quirk:
|
||||
description:
|
||||
When set, run the SOF/ITP counter based on ref_clk.
|
||||
type: boolean
|
||||
|
||||
snps,resume-hs-terminations:
|
||||
description:
|
||||
Fix the issue of HS terminations CRC error on resume by enabling this
|
||||
quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end
|
||||
of resume. This option is to support certain legacy ULPI PHYs.
|
||||
type: boolean
|
||||
|
||||
snps,is-utmi-l1-suspend:
|
||||
description:
|
||||
True when DWC3 asserts output signal utmi_l1_suspend_n, false when
|
||||
asserts utmi_sleep_n.
|
||||
type: boolean
|
||||
|
||||
snps,hird-threshold:
|
||||
description: HIRD threshold
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
|
||||
snps,hsphy_interface:
|
||||
description:
|
||||
High-Speed PHY interface selection between UTMI+ and ULPI when the
|
||||
DWC_USB3_HSPHY_INTERFACE has value 3.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
enum: [utmi, ulpi]
|
||||
|
||||
snps,quirk-frame-length-adjustment:
|
||||
description:
|
||||
Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame
|
||||
length adjustment when the fladj_30mhz_sdbnd signal is invalid or
|
||||
incorrect.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 0x3f
|
||||
|
||||
snps,ref-clock-period-ns:
|
||||
description:
|
||||
Value for REFCLKPER field of GUCTL register for reference clock period in
|
||||
nanoseconds, when the hardware set default does not match the actual
|
||||
clock.
|
||||
|
||||
This binding is deprecated. Instead, provide an appropriate reference clock.
|
||||
minimum: 8
|
||||
maximum: 62
|
||||
deprecated: true
|
||||
|
||||
snps,rx-thr-num-pkt-prd:
|
||||
description:
|
||||
Periodic ESS RX packet threshold count (host mode only). Set this and
|
||||
snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.4) to enable periodic ESS RX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,rx-max-burst-prd:
|
||||
description:
|
||||
Max periodic ESS RX burst size (host mode only). Set this and
|
||||
snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.4) to enable periodic ESS RX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,tx-thr-num-pkt-prd:
|
||||
description:
|
||||
Periodic ESS TX packet threshold count (host mode only). Set this and
|
||||
snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.3) to enable periodic ESS TX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,tx-max-burst-prd:
|
||||
description:
|
||||
Max periodic ESS TX burst size (host mode only). Set this and
|
||||
snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.3) to enable periodic ESS TX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
tx-fifo-resize:
|
||||
description: Determines if the TX fifos can be dynamically resized depending
|
||||
on the number of IN endpoints used and if bursting is supported. This
|
||||
may help improve bandwidth on platforms with higher system latencies, as
|
||||
increased fifo space allows for the controller to prefetch data into its
|
||||
internal memory.
|
||||
type: boolean
|
||||
|
||||
tx-fifo-max-num:
|
||||
description: Specifies the max number of packets the txfifo resizing logic
|
||||
can account for when higher endpoint bursting is used. (bMaxBurst > 6) The
|
||||
higher the number, the more fifo space the txfifo resizing logic will
|
||||
allocate for that endpoint.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 3
|
||||
|
||||
snps,incr-burst-type-adjustment:
|
||||
description:
|
||||
Value for INCR burst type of GSBUSCFG0 register, undefined length INCR
|
||||
burst type enable and INCRx type. A single value means INCRX burst mode
|
||||
enabled. If more than one value specified, undefined length INCR burst
|
||||
type will be enabled with burst lengths utilized up to the maximum
|
||||
of the values passed in this property.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
uniqueItems: true
|
||||
items:
|
||||
enum: [1, 4, 8, 16, 32, 64, 128, 256]
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
This port is used with the 'usb-role-switch' property to connect the
|
||||
dwc3 to type C connector.
|
||||
|
||||
wakeup-source:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Enable USB remote wakeup.
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb@4a030000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x4a030000 0xcfff>;
|
||||
interrupts = <0 92 4>;
|
||||
usb-phy = <&usb2_phy>, <&usb3_phy>;
|
||||
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
|
||||
};
|
||||
- |
|
||||
usb@4a000000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x4a000000 0xcfff>;
|
||||
interrupts = <0 92 4>;
|
||||
clocks = <&clk 1>, <&clk 2>, <&clk 3>;
|
||||
clock-names = "bus_early", "ref", "suspend";
|
||||
phys = <&usb2_phy>, <&usb3_phy>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_enblslpm_quirk;
|
||||
};
|
||||
...
|
||||
35
bindings/usb/spear-usb.txt
Normal file
35
bindings/usb/spear-usb.txt
Normal file
@@ -0,0 +1,35 @@
|
||||
ST SPEAr SoC USB controllers:
|
||||
-----------------------------
|
||||
|
||||
EHCI:
|
||||
-----
|
||||
|
||||
Required properties:
|
||||
- compatible: "st,spear600-ehci"
|
||||
- interrupts: Should contain the EHCI interrupt
|
||||
|
||||
Example:
|
||||
|
||||
ehci@e1800000 {
|
||||
compatible = "st,spear600-ehci", "usb-ehci";
|
||||
reg = <0xe1800000 0x1000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <27>;
|
||||
};
|
||||
|
||||
|
||||
OHCI:
|
||||
-----
|
||||
|
||||
Required properties:
|
||||
- compatible: "st,spear600-ohci"
|
||||
- interrupts: Should contain the OHCI interrupt
|
||||
|
||||
Example:
|
||||
|
||||
ohci@e1900000 {
|
||||
compatible = "st,spear600-ohci", "usb-ohci";
|
||||
reg = <0xe1800000 0x1000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <26>;
|
||||
};
|
||||
91
bindings/usb/st,stusb160x.yaml
Normal file
91
bindings/usb/st,stusb160x.yaml
Normal file
@@ -0,0 +1,91 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/st,stusb160x.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: STMicroelectronics STUSB160x Type-C controller bindings
|
||||
|
||||
maintainers:
|
||||
- Amelie Delaunay <amelie.delaunay@foss.st.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- st,stusb1600
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply:
|
||||
description: main power supply (4.1V-22V)
|
||||
|
||||
vsys-supply:
|
||||
description: low power supply (3.0V-5.5V)
|
||||
|
||||
vconn-supply:
|
||||
description: power supply (2.7V-5.5V) used to supply VConn on CC pin in
|
||||
source or dual power role
|
||||
|
||||
connector:
|
||||
type: object
|
||||
$ref: /schemas/connector/usb-connector.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: usb-c-connector
|
||||
|
||||
power-role: true
|
||||
|
||||
typec-power-opmode: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- connector
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
typec: stusb1600@28 {
|
||||
compatible = "st,stusb1600";
|
||||
reg = <0x28>;
|
||||
vdd-supply = <&vbus_drd>;
|
||||
vsys-supply = <&vdd_usb>;
|
||||
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpioi>;
|
||||
|
||||
typec_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
power-role = "dual";
|
||||
data-role = "dual";
|
||||
typec-power-opmode = "default";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
typec_con_ep: endpoint {
|
||||
remote-endpoint = <&usbotg_hs_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
91
bindings/usb/st,typec-stm32g0.yaml
Normal file
91
bindings/usb/st,typec-stm32g0.yaml
Normal file
@@ -0,0 +1,91 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/st,typec-stm32g0.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32G0 USB Type-C PD controller
|
||||
|
||||
description: |
|
||||
The STM32G0 MCU can be programmed to control Type-C connector(s) through I2C
|
||||
typically using the UCSI protocol over I2C, with a dedicated alert
|
||||
(interrupt) pin.
|
||||
|
||||
maintainers:
|
||||
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: st,stm32g0-typec
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
connector:
|
||||
type: object
|
||||
$ref: /schemas/connector/usb-connector.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
firmware-name:
|
||||
description: |
|
||||
Should contain the name of the default firmware image
|
||||
file located on the firmware search path
|
||||
|
||||
wakeup-source: true
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- connector
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
typec@53 {
|
||||
compatible = "st,stm32g0-typec";
|
||||
reg = <0x53>;
|
||||
/* Alert pin on GPIO PE12 */
|
||||
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpioe>;
|
||||
|
||||
/* Example with one type-C connector */
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
con_usb_c_ep: endpoint {
|
||||
remote-endpoint = <&usb_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
usb-role-switch;
|
||||
port {
|
||||
usb_ep: endpoint {
|
||||
remote-endpoint = <&con_usb_c_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
103
bindings/usb/ti,am62-usb.yaml
Normal file
103
bindings/usb/ti,am62-usb.yaml
Normal file
@@ -0,0 +1,103 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
|
||||
|
||||
maintainers:
|
||||
- Aswath Govindraju <a-govindraju@ti.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,am62-usb
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
PM domain provider node and an args specifier containing
|
||||
the USB ISO device id value. See,
|
||||
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: Clock phandle to usb2_refclk
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
|
||||
ti,vbus-divider:
|
||||
description:
|
||||
Should be present if USB VBUS line is connected to the
|
||||
VBUS pin of the SoC via a 1/3 voltage divider.
|
||||
type: boolean
|
||||
|
||||
ti,syscon-phy-pll-refclk:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
- items:
|
||||
- description: Phandle to the SYSCON entry
|
||||
- description: USB phy control register offset within SYSCON
|
||||
description:
|
||||
Specifier for conveying frequency of ref clock input, for the
|
||||
operation of USB2PHY.
|
||||
|
||||
'#address-cells':
|
||||
const: 2
|
||||
|
||||
'#size-cells':
|
||||
const: 2
|
||||
|
||||
patternProperties:
|
||||
"^usb@[0-9a-f]+$":
|
||||
$ref: snps,dwc3.yaml#
|
||||
description: Required child node
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
- ti,syscon-phy-pll-refclk
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usbss1: usb@f910000 {
|
||||
compatible = "ti,am62-usb";
|
||||
reg = <0x00 0x0f910000 0x00 0x800>;
|
||||
clocks = <&k3_clks 162 3>;
|
||||
clock-names = "ref";
|
||||
ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
|
||||
power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@31100000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg =<0x00 0x31100000 0x00 0x50000>;
|
||||
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
|
||||
<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
|
||||
interrupt-names = "host", "peripheral";
|
||||
maximum-speed = "high-speed";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
};
|
||||
};
|
||||
82
bindings/usb/ti,hd3ss3220.yaml
Normal file
82
bindings/usb/ti,hd3ss3220.yaml
Normal file
@@ -0,0 +1,82 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/ti,hd3ss3220.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI HD3SS3220 TypeC DRP Port Controller
|
||||
|
||||
maintainers:
|
||||
- Biju Das <biju.das.jz@bp.renesas.com>
|
||||
|
||||
description: |-
|
||||
HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel
|
||||
Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The
|
||||
HD3SS3220 can be configured as a Downstream Facing Port (DFP), Upstream Facing Port (UFP) or a
|
||||
Dual Role Port (DRP) making it ideal for any application.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,hd3ss3220
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description: OF graph bindings (specified in bindings/graph.txt) that model
|
||||
SS data bus to the SS capable connector.
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Super Speed (SS) MUX inputs connected to SS capable connector.
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Output of 2:1 MUX connected to Super Speed (SS) data bus.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hd3ss3220@47 {
|
||||
compatible = "ti,hd3ss3220";
|
||||
reg = <0x47>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <3>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
hd3ss3220_in_ep: endpoint {
|
||||
remote-endpoint = <&ss_ep>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
hd3ss3220_out_ep: endpoint {
|
||||
remote-endpoint = <&usb3_role_switch>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
119
bindings/usb/ti,j721e-usb.yaml
Normal file
119
bindings/usb/ti,j721e-usb.yaml
Normal file
@@ -0,0 +1,119 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Bindings for the TI wrapper module for the Cadence USBSS-DRD controller
|
||||
|
||||
maintainers:
|
||||
- Roger Quadros <rogerq@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: ti,j721e-usb
|
||||
- const: ti,am64-usb
|
||||
- items:
|
||||
- const: ti,j721e-usb
|
||||
- const: ti,am64-usb
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
PM domain provider node and an args specifier containing
|
||||
the USB device id value. See,
|
||||
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: Clock phandles to usb2_refclk and lpm_clk
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
- const: lpm
|
||||
|
||||
ti,usb2-only:
|
||||
description:
|
||||
If present, it restricts the controller to USB2.0 mode of
|
||||
operation. Must be present if USB3 PHY is not available
|
||||
for USB.
|
||||
type: boolean
|
||||
|
||||
ti,vbus-divider:
|
||||
description:
|
||||
Should be present if USB VBUS line is connected to the
|
||||
VBUS pin of the SoC via a 1/3 voltage divider.
|
||||
type: boolean
|
||||
|
||||
assigned-clocks:
|
||||
maxItems: 1
|
||||
|
||||
assigned-clock-parents:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 2
|
||||
|
||||
'#size-cells':
|
||||
const: 2
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
patternProperties:
|
||||
"^usb@":
|
||||
type: object
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cdns_usb@4104000 {
|
||||
compatible = "ti,j721e-usb";
|
||||
reg = <0x00 0x4104000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 288 15>, <&k3_clks 288 3>;
|
||||
clock-names = "ref", "lpm";
|
||||
assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */
|
||||
assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@6000000 {
|
||||
compatible = "cdns,usb3";
|
||||
reg = <0x00 0x6000000 0x00 0x10000>,
|
||||
<0x00 0x6010000 0x00 0x10000>,
|
||||
<0x00 0x6020000 0x00 0x10000>;
|
||||
reg-names = "otg", "xhci", "dev";
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
|
||||
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
|
||||
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
|
||||
interrupt-names = "host",
|
||||
"peripheral",
|
||||
"otg";
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
};
|
||||
};
|
||||
100
bindings/usb/ti,keystone-dwc3.yaml
Normal file
100
bindings/usb/ti,keystone-dwc3.yaml
Normal file
@@ -0,0 +1,100 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI Keystone Soc USB Controller
|
||||
|
||||
maintainers:
|
||||
- Roger Quadros <rogerq@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- ti,keystone-dwc3
|
||||
- ti,am654-dwc3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
assigned-clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
assigned-clock-parents:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
description: Should contain a phandle to a PM domain provider node
|
||||
and an args specifier containing the USB device id
|
||||
value. This property is as per the binding,
|
||||
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
description:
|
||||
PHY specifier for the USB3.0 PHY. Some SoCs need the USB3.0 PHY
|
||||
to be turned on before the controller.
|
||||
Documentation/devicetree/bindings/phy/phy-bindings.txt
|
||||
|
||||
phy-names:
|
||||
items:
|
||||
- const: usb3-phy
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
dma-ranges: true
|
||||
|
||||
patternProperties:
|
||||
"usb@[a-f0-9]+$":
|
||||
$ref: snps,dwc3.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
dwc3@2680000 {
|
||||
compatible = "ti,keystone-dwc3";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x2680000 0x10000>;
|
||||
clocks = <&clkusb>;
|
||||
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
|
||||
ranges;
|
||||
|
||||
usb@2690000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x2690000 0x70000>;
|
||||
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
|
||||
usb-phy = <&usb_phy>, <&usb_phy>;
|
||||
};
|
||||
};
|
||||
70
bindings/usb/ti,tps6598x.yaml
Normal file
70
bindings/usb/ti,tps6598x.yaml
Normal file
@@ -0,0 +1,70 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/usb/ti,tps6598x.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Texas Instruments 6598x Type-C Port Switch and Power Delivery controller DT bindings
|
||||
|
||||
maintainers:
|
||||
- Bryan O'Donoghue <bryan.odonoghue@linaro.org>
|
||||
|
||||
description: |
|
||||
Texas Instruments 6598x Type-C Port Switch and Power Delivery controller
|
||||
|
||||
A variant of this controller known as Apple CD321x or Apple ACE is also
|
||||
present on hardware with Apple SoCs such as the M1.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,tps6598x
|
||||
- apple,cd321x
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: irq
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tps6598x: tps6598x@38 {
|
||||
compatible = "ti,tps6598x";
|
||||
reg = <0x38>;
|
||||
|
||||
interrupt-parent = <&msmgpio>;
|
||||
interrupts = <107 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "irq";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&typec_pins>;
|
||||
|
||||
typec_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
port {
|
||||
typec_ep: endpoint {
|
||||
remote-endpoint = <&otg_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
67
bindings/usb/ti,usb8041.yaml
Normal file
67
bindings/usb/ti,usb8041.yaml
Normal file
@@ -0,0 +1,67 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/ti,usb8041.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Binding for the TI USB8041 USB 3.0 hub controller
|
||||
|
||||
maintainers:
|
||||
- Alexander Stein <alexander.stein@ew.tq-group.com>
|
||||
|
||||
allOf:
|
||||
- $ref: usb-device.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- usb451,8140
|
||||
- usb451,8142
|
||||
|
||||
reg: true
|
||||
|
||||
reset-gpios:
|
||||
items:
|
||||
- description: GPIO specifier for GRST# pin.
|
||||
|
||||
vdd-supply:
|
||||
description:
|
||||
VDD power supply to the hub
|
||||
|
||||
peer-hub:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
phandle to the peer hub on the controller.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- peer-hub
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
usb {
|
||||
dr_mode = "host";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* 2.0 hub on port 1 */
|
||||
hub_2_0: hub@1 {
|
||||
compatible = "usb451,8142";
|
||||
reg = <1>;
|
||||
peer-hub = <&hub_3_0>;
|
||||
reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* 3.0 hub on port 2 */
|
||||
hub_3_0: hub@2 {
|
||||
compatible = "usb451,8140";
|
||||
reg = <2>;
|
||||
peer-hub = <&hub_2_0>;
|
||||
reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
43
bindings/usb/twlxxxx-usb.txt
Normal file
43
bindings/usb/twlxxxx-usb.txt
Normal file
@@ -0,0 +1,43 @@
|
||||
USB COMPARATOR OF TWL CHIPS
|
||||
|
||||
TWL6030 USB COMPARATOR
|
||||
- compatible : Should be "ti,twl6030-usb"
|
||||
- interrupts : Two interrupt numbers to the cpu should be specified. First
|
||||
interrupt number is the otg interrupt number that raises ID interrupts when
|
||||
the controller has to act as host and the second interrupt number is the
|
||||
usb interrupt number that raises VBUS interrupts when the controller has to
|
||||
act as device
|
||||
- usb-supply : phandle to the regulator device tree node. It should be vusb
|
||||
if it is twl6030 or ldousb if it is twl6032 subclass.
|
||||
|
||||
twl6030-usb {
|
||||
compatible = "ti,twl6030-usb";
|
||||
interrupts = < 4 10 >;
|
||||
};
|
||||
|
||||
Board specific device node entry
|
||||
&twl6030-usb {
|
||||
usb-supply = <&vusb>;
|
||||
};
|
||||
|
||||
TWL4030 USB PHY AND COMPARATOR
|
||||
- compatible : Should be "ti,twl4030-usb"
|
||||
- interrupts : The interrupt numbers to the cpu should be specified. First
|
||||
interrupt number is the otg interrupt number that raises ID interrupts
|
||||
and VBUS interrupts. The second interrupt number is optional.
|
||||
- <supply-name>-supply : phandle to the regulator device tree node.
|
||||
<supply-name> should be vusb1v5, vusb1v8 and vusb3v1
|
||||
- usb_mode : The mode used by the phy to connect to the controller. "1"
|
||||
specifies "ULPI" mode and "2" specifies "CEA2011_3PIN" mode.
|
||||
|
||||
If a sibling node is compatible "ti,twl4030-bci", then it will find
|
||||
this device and query it for USB power status.
|
||||
|
||||
twl4030-usb {
|
||||
compatible = "ti,twl4030-usb";
|
||||
interrupts = < 10 4 >;
|
||||
usb1v5-supply = <&vusb1v5>;
|
||||
usb1v8-supply = <&vusb1v8>;
|
||||
usb3v1-supply = <&vusb3v1>;
|
||||
usb_mode = <1>;
|
||||
};
|
||||
49
bindings/usb/typec-tcpci.txt
Normal file
49
bindings/usb/typec-tcpci.txt
Normal file
@@ -0,0 +1,49 @@
|
||||
TCPCI(Typec port cotroller interface) binding
|
||||
---------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible: should be set one of following:
|
||||
- "nxp,ptn5110" for NXP USB PD TCPC PHY IC ptn5110.
|
||||
|
||||
- reg: the i2c slave address of typec port controller device.
|
||||
- interrupt-parent: the phandle to the interrupt controller which provides
|
||||
the interrupt.
|
||||
- interrupts: interrupt specification for tcpci alert.
|
||||
|
||||
Required sub-node:
|
||||
- connector: The "usb-c-connector" attached to the tcpci chip, the bindings
|
||||
of connector node are specified in
|
||||
Documentation/devicetree/bindings/connector/usb-connector.yaml
|
||||
|
||||
Example:
|
||||
|
||||
ptn5110@50 {
|
||||
compatible = "nxp,ptn5110";
|
||||
reg = <0x50>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
usb_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
data-role = "dual";
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)
|
||||
PDO_VAR(5000, 12000, 2000)>;
|
||||
op-sink-microwatt = <10000000>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
usb_con_ss: endpoint {
|
||||
remote-endpoint = <&usb3_data_ss>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
20
bindings/usb/ulpi.txt
Normal file
20
bindings/usb/ulpi.txt
Normal file
@@ -0,0 +1,20 @@
|
||||
ULPI bus binding
|
||||
----------------
|
||||
|
||||
Phys that are behind a ULPI connection can be described with the following
|
||||
binding. The host controller shall have a "ulpi" named node as a child, and
|
||||
that node shall have one enabled node underneath it representing the ulpi
|
||||
device on the bus.
|
||||
|
||||
EXAMPLE
|
||||
-------
|
||||
|
||||
usb {
|
||||
compatible = "vendor,usb-controller";
|
||||
|
||||
ulpi {
|
||||
phy {
|
||||
compatible = "vendor,phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
124
bindings/usb/usb-device.yaml
Normal file
124
bindings/usb/usb-device.yaml
Normal file
@@ -0,0 +1,124 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/usb-device.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: The device tree bindings for the Generic USB Device
|
||||
|
||||
maintainers:
|
||||
- Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
|
||||
description: |
|
||||
Usually, we only use device tree for hard wired USB device.
|
||||
The reference binding doc is from:
|
||||
http://www.devicetree.org/open-firmware/bindings/usb/usb-1_0.ps
|
||||
|
||||
Four types of device-tree nodes are defined: "host-controller nodes"
|
||||
representing USB host controllers, "device nodes" representing USB devices,
|
||||
"interface nodes" representing USB interfaces and "combined nodes"
|
||||
representing simple USB devices.
|
||||
|
||||
A combined node shall be used instead of a device node and an interface node
|
||||
for devices of class 0 or 9 (hub) with a single configuration and a single
|
||||
interface.
|
||||
|
||||
A "hub node" is a combined node or an interface node that represents a USB
|
||||
hub.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$"
|
||||
description: Device nodes or combined nodes.
|
||||
"usbVID,PID", where VID is the vendor id and PID the product id.
|
||||
The textual representation of VID and PID shall be in lower case
|
||||
hexadecimal with leading zeroes suppressed. The other compatible
|
||||
strings from the above standard binding could also be used,
|
||||
but a device adhering to this binding may leave out all except
|
||||
for "usbVID,PID".
|
||||
|
||||
reg:
|
||||
description: the number of the USB hub port or the USB host-controller
|
||||
port to which this device is attached. The range is 1-255.
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
description: should be 1 for hub nodes with device nodes,
|
||||
should be 2 for device nodes with interface nodes.
|
||||
enum: [1, 2]
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^interface@[0-9a-f]{1,2}(,[0-9a-f]{1,2})$":
|
||||
type: object
|
||||
description: USB interface nodes.
|
||||
The configuration component is not included in the textual
|
||||
representation of an interface-node unit address for configuration 1.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
pattern: "^usbif[0-9a-f]{1,4},[0-9a-f]{1,4}.config[0-9a-f]{1,2}.[0-9a-f]{1,2}$"
|
||||
description: Interface nodes.
|
||||
"usbifVID,PID.configCN.IN", where VID is the vendor id, PID is
|
||||
the product id, CN is the configuration value and IN is the interface
|
||||
number. The textual representation of VID, PID, CN and IN shall be
|
||||
in lower case hexadecimal with leading zeroes suppressed.
|
||||
The other compatible strings from the above standard binding could
|
||||
also be used, but a device adhering to this binding may leave out
|
||||
all except for "usbifVID,PID.configCN.IN".
|
||||
|
||||
reg:
|
||||
description: should be 2 cells long, the first cell represents
|
||||
the interface number and the second cell represents the
|
||||
configuration value.
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
# hub connected to port 1
|
||||
# device connected to port 2
|
||||
# device connected to port 3
|
||||
# interface 0 of configuration 1
|
||||
# interface 0 of configuration 2
|
||||
- |
|
||||
usb@11270000 {
|
||||
reg = <0x11270000 0x1000>;
|
||||
interrupts = <0x0 0x4e 0x0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hub@1 {
|
||||
compatible = "usb5e3,608";
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
device@2 {
|
||||
compatible = "usb123,4567";
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
device@3 {
|
||||
compatible = "usb123,abcd";
|
||||
reg = <3>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
interface@0 {
|
||||
compatible = "usbif123,abcd.config1.0";
|
||||
reg = <0 1>;
|
||||
};
|
||||
|
||||
interface@0,2 {
|
||||
compatible = "usbif123,abcd.config2.0";
|
||||
reg = <0 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
78
bindings/usb/usb-drd.yaml
Normal file
78
bindings/usb/usb-drd.yaml
Normal file
@@ -0,0 +1,78 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/usb-drd.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Generic USB OTG Controller
|
||||
|
||||
maintainers:
|
||||
- Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
|
||||
properties:
|
||||
otg-rev:
|
||||
description:
|
||||
Tells usb driver the release number of the OTG and EH supplement with
|
||||
which the device and its descriptors are compliant, in binary-coded
|
||||
decimal (i.e. 2.0 is 0200H). This property is used if any real OTG
|
||||
features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
|
||||
0x0200 or above.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0x0100, 0x0120, 0x0130, 0x0200]
|
||||
|
||||
dr_mode:
|
||||
description:
|
||||
Tells Dual-Role USB controllers that we want to work on a particular
|
||||
mode. In case this attribute isn't passed via DT, USB DRD controllers
|
||||
should default to OTG.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum: [host, peripheral, otg]
|
||||
|
||||
hnp-disable:
|
||||
description:
|
||||
Tells OTG controllers we want to disable OTG HNP. Normally HNP is the
|
||||
basic function of real OTG except you want it to be a srp-capable only B
|
||||
device.
|
||||
type: boolean
|
||||
|
||||
srp-disable:
|
||||
description:
|
||||
Tells OTG controllers we want to disable OTG SRP. SRP is optional for OTG
|
||||
device.
|
||||
type: boolean
|
||||
|
||||
adp-disable:
|
||||
description:
|
||||
Tells OTG controllers we want to disable OTG ADP. ADP is optional for OTG
|
||||
device.
|
||||
type: boolean
|
||||
|
||||
usb-role-switch:
|
||||
description:
|
||||
Indicates that the device is capable of assigning the USB data role
|
||||
(USB host or USB device) for a given USB connector, such as Type-C,
|
||||
Type-B(micro). See connector/usb-connector.yaml.
|
||||
|
||||
role-switch-default-mode:
|
||||
description:
|
||||
Indicates if usb-role-switch is enabled, the device default operation
|
||||
mode of controller while usb role is USB_ROLE_NONE.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum: [host, peripheral]
|
||||
default: peripheral
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb@4a030000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x4a030000 0xcfff>;
|
||||
interrupts = <0 92 4>;
|
||||
usb-phy = <&usb2_phy>, <&usb3_phy>;
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "otg";
|
||||
phy_type = "utmi_wide";
|
||||
otg-rev = <0x0200>;
|
||||
adp-disable;
|
||||
};
|
||||
52
bindings/usb/usb-hcd.yaml
Normal file
52
bindings/usb/usb-hcd.yaml
Normal file
@@ -0,0 +1,52 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/usb-hcd.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Generic USB Host Controller
|
||||
|
||||
maintainers:
|
||||
- Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
|
||||
allOf:
|
||||
- $ref: usb.yaml#
|
||||
|
||||
properties:
|
||||
companion:
|
||||
description: Phandle of a companion device
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
tpl-support:
|
||||
description:
|
||||
Indicates if the Targeted Peripheral List is supported for given
|
||||
targeted hosts (non-PC hosts).
|
||||
type: boolean
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-f]{1,2}$":
|
||||
description: The hard wired USB devices
|
||||
type: object
|
||||
$ref: /schemas/usb/usb-device.yaml
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb {
|
||||
phys = <&usb2_phy1>, <&usb3_phy1>;
|
||||
phy-names = "usb";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hub@1 {
|
||||
compatible = "usb5e3,610";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
64
bindings/usb/usb-nop-xceiv.yaml
Normal file
64
bindings/usb/usb-nop-xceiv.yaml
Normal file
@@ -0,0 +1,64 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/usb-nop-xceiv.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: USB NOP PHY
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: usb-nop-xceiv
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: main_clk
|
||||
|
||||
clock-frequency: true
|
||||
|
||||
'#phy-cells':
|
||||
const: 0
|
||||
|
||||
vcc-supply:
|
||||
description: phandle to the regulator that provides power to the PHY.
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
vbus-detect-gpio:
|
||||
description: Should specify the GPIO detecting a VBus insertion
|
||||
maxItems: 1
|
||||
|
||||
vbus-regulator:
|
||||
description: Should specifiy the regulator supplying current drawn from
|
||||
the VBus line.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#phy-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
hsusb1_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
clock-frequency = <19200000>;
|
||||
clocks = <&osc 0>;
|
||||
clock-names = "main_clk";
|
||||
vcc-supply = <&hsusb1_vcc_regulator>;
|
||||
reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
|
||||
vbus-detect-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
|
||||
vbus-regulator = <&vbus_regulator>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
...
|
||||
18
bindings/usb/usb-uhci.txt
Normal file
18
bindings/usb/usb-uhci.txt
Normal file
@@ -0,0 +1,18 @@
|
||||
Generic Platform UHCI Controller
|
||||
-----------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible : "generic-uhci" (deprecated: "platform-uhci")
|
||||
- reg : Should contain 1 register ranges(address and length)
|
||||
- interrupts : UHCI controller interrupt
|
||||
|
||||
additionally the properties from usb-hcd.yaml (in the current directory) are
|
||||
supported.
|
||||
|
||||
Example:
|
||||
|
||||
uhci@d8007b00 {
|
||||
compatible = "generic-uhci";
|
||||
reg = <0xd8007b00 0x200>;
|
||||
interrupts = <43>;
|
||||
};
|
||||
42
bindings/usb/usb-xhci.yaml
Normal file
42
bindings/usb/usb-xhci.yaml
Normal file
@@ -0,0 +1,42 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/usb-xhci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Generic USB xHCI Controller
|
||||
|
||||
maintainers:
|
||||
- Mathias Nyman <mathias.nyman@intel.com>
|
||||
|
||||
allOf:
|
||||
- $ref: "usb-hcd.yaml#"
|
||||
|
||||
properties:
|
||||
usb2-lpm-disable:
|
||||
description: Indicates if we don't want to enable USB2 HW LPM
|
||||
type: boolean
|
||||
|
||||
usb3-lpm-capable:
|
||||
description: Determines if platform is USB3 LPM capable
|
||||
type: boolean
|
||||
|
||||
quirk-broken-port-ped:
|
||||
description: Set if the controller has broken port disable mechanism
|
||||
type: boolean
|
||||
|
||||
imod-interval-ns:
|
||||
description: Interrupt moderation interval
|
||||
default: 5000
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb@f0930000 {
|
||||
compatible = "generic-xhci";
|
||||
reg = <0xf0930000 0x8c8>;
|
||||
interrupts = <0x0 0x4e 0x0>;
|
||||
usb2-lpm-disable;
|
||||
usb3-lpm-capable;
|
||||
};
|
||||
62
bindings/usb/usb.yaml
Normal file
62
bindings/usb/usb.yaml
Normal file
@@ -0,0 +1,62 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/usb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Generic USB Controller
|
||||
|
||||
maintainers:
|
||||
- Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
|
||||
select: false
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^usb(@.*)?"
|
||||
|
||||
phys:
|
||||
description:
|
||||
List of all the USB PHYs on this HCD
|
||||
|
||||
phy-names:
|
||||
description:
|
||||
Name specifier for the USB PHY
|
||||
|
||||
usb-phy:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description:
|
||||
List of all the USB PHYs on this HCD to be accepted by the legacy USB
|
||||
Physical Layer subsystem.
|
||||
deprecated: true
|
||||
|
||||
phy_type:
|
||||
description:
|
||||
Tells USB controllers that we want to configure the core to support a
|
||||
UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected, UTMI+ low
|
||||
pin interface if ULPI is specified, Serial core/PHY interconnect if
|
||||
serial is specified and High-Speed Inter-Chip feature if HSIC is
|
||||
selected. In case this isn't passed via DT, USB controllers should
|
||||
default to HW capability.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum: [utmi, utmi_wide, ulpi, serial, hsic]
|
||||
|
||||
maximum-speed:
|
||||
description:
|
||||
Tells USB controllers we want to work up to a certain speed. In case this
|
||||
isn't passed via DT, USB controllers should default to their maximum HW
|
||||
capability.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum:
|
||||
- low-speed
|
||||
- full-speed
|
||||
- high-speed
|
||||
- super-speed
|
||||
- super-speed-plus
|
||||
- super-speed-plus-gen2x1
|
||||
- super-speed-plus-gen1x2
|
||||
- super-speed-plus-gen2x2
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
89
bindings/usb/usb251xb.txt
Normal file
89
bindings/usb/usb251xb.txt
Normal file
@@ -0,0 +1,89 @@
|
||||
Microchip USB 2.0 Hi-Speed Hub Controller
|
||||
|
||||
The device node for the configuration of a Microchip USB251x/xBi USB 2.0
|
||||
Hi-Speed Controller.
|
||||
|
||||
Required properties :
|
||||
- compatible : Should be "microchip,usb251xb" or one of the specific types:
|
||||
"microchip,usb2512b", "microchip,usb2512bi", "microchip,usb2513b",
|
||||
"microchip,usb2513bi", "microchip,usb2514b", "microchip,usb2514bi",
|
||||
"microchip,usb2517", "microchip,usb2517i", "microchip,usb2422"
|
||||
- reg : I2C address on the selected bus (default is <0x2C>)
|
||||
|
||||
Optional properties :
|
||||
- reset-gpios : Should specify the gpio for hub reset
|
||||
- vdd-supply : Should specify the phandle to the regulator supplying vdd
|
||||
- skip-config : Skip Hub configuration, but only send the USB-Attach command
|
||||
- vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424)
|
||||
- product-id : Set USB Product ID of the hub (16 bit, default depends on type)
|
||||
- device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3)
|
||||
- language-id : Set USB Language ID (16 bit, default is 0x0000)
|
||||
- manufacturer : Set USB Manufacturer string (max 31 characters long)
|
||||
- product : Set USB Product string (max 31 characters long)
|
||||
- serial : Set USB Serial string (max 31 characters long)
|
||||
- {bus,self}-powered : selects between self- and bus-powered operation
|
||||
(boolean, default is self-powered)
|
||||
- disable-hi-speed : disable USB Hi-Speed support (boolean)
|
||||
- {multi,single}-tt : selects between multi- and single-transaction-translator
|
||||
(boolean, default is multi-tt)
|
||||
- disable-eop : disable End of Packet generation in full-speed mode (boolean)
|
||||
- {ganged,individual}-sensing : select over-current sense type in self-powered
|
||||
mode (boolean, default is individual)
|
||||
- {ganged,individual}-port-switching : select port power switching mode
|
||||
(boolean, default is individual)
|
||||
- dynamic-power-switching : enable auto-switching from self- to bus-powered
|
||||
operation if the local power source is removed or unavailable (boolean)
|
||||
- oc-delay-us : Delay time (in microseconds) for filtering the over-current
|
||||
sense inputs. Valid values are 100, 4000, 8000 (default) and 16000. If
|
||||
an invalid value is given, the default is used instead.
|
||||
- compound-device : indicate the hub is part of a compound device (boolean)
|
||||
- port-mapping-mode : enable port mapping mode (boolean)
|
||||
- led-{usb,speed}-mode : led usb/speed indication mode selection
|
||||
(boolean, default is speed mode)
|
||||
- string-support : enable string descriptor support (required for manufacturer,
|
||||
product and serial string configuration)
|
||||
- non-removable-ports : Should specify the ports which have a non-removable
|
||||
device connected.
|
||||
- sp-disabled-ports : Specifies the ports which will be self-power disabled
|
||||
- bp-disabled-ports : Specifies the ports which will be bus-power disabled
|
||||
- sp-max-total-current-microamp: Specifies max current consumed by the hub
|
||||
from VBUS when operating in self-powered hub. It includes the hub
|
||||
silicon along with all associated circuitry including a permanently
|
||||
attached peripheral (range: 0 - 100000 uA, default 1000 uA)
|
||||
- bp-max-total-current-microamp: Specifies max current consumed by the hub
|
||||
from VBUS when operating in self-powered hub. It includes the hub
|
||||
silicon along with all associated circuitry including a permanently
|
||||
attached peripheral (range: 0 - 510000 uA, default 100000 uA)
|
||||
- sp-max-removable-current-microamp: Specifies max current consumed by the hub
|
||||
from VBUS when operating in self-powered hub. It includes the hub
|
||||
silicon along with all associated circuitry excluding a permanently
|
||||
attached peripheral (range: 0 - 100000 uA, default 1000 uA)
|
||||
- bp-max-removable-current-microamp: Specifies max current consumed by the hub
|
||||
from VBUS when operating in self-powered hub. It includes the hub
|
||||
silicon along with all associated circuitry excluding a permanently
|
||||
attached peripheral (range: 0 - 510000 uA, default 100000 uA)
|
||||
- power-on-time-ms : Specifies the time it takes from the time the host
|
||||
initiates the power-on sequence to a port until the port has adequate
|
||||
power. The value is given in ms in a 0 - 510 range (default is 100ms).
|
||||
- swap-dx-lanes : Specifies the ports which will swap the differential-pair
|
||||
(D+/D-), default is not-swapped.
|
||||
|
||||
Examples:
|
||||
usb2512b@2c {
|
||||
compatible = "microchip,usb2512b";
|
||||
reg = <0x2c>;
|
||||
reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
usb2514b@2c {
|
||||
compatible = "microchip,usb2514b";
|
||||
reg = <0x2c>;
|
||||
vendor-id = /bits/ 16 <0x0000>;
|
||||
product-id = /bits/ 16 <0x0000>;
|
||||
string-support;
|
||||
manufacturer = "Foo";
|
||||
product = "Foo-Bar";
|
||||
serial = "1234567890A";
|
||||
/* correct misplaced usb connectors on port 1,2 */
|
||||
swap-dx-lanes = <1 2>;
|
||||
};
|
||||
19
bindings/usb/usb4604.txt
Normal file
19
bindings/usb/usb4604.txt
Normal file
@@ -0,0 +1,19 @@
|
||||
SMSC USB4604 High-Speed Hub Controller
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "smsc,usb4604"
|
||||
|
||||
Optional properties:
|
||||
- reg: Specifies the i2c slave address, it is required and should be 0x2d
|
||||
if I2C is used.
|
||||
- reset-gpios: Should specify GPIO for reset.
|
||||
- initial-mode: Should specify initial mode.
|
||||
(1 for HUB mode, 2 for STANDBY mode)
|
||||
|
||||
Examples:
|
||||
usb-hub@2d {
|
||||
compatible = "smsc,usb4604";
|
||||
reg = <0x2d>;
|
||||
reset-gpios = <&gpx3 5 1>;
|
||||
initial-mode = <1>;
|
||||
};
|
||||
18
bindings/usb/usbmisc-imx.txt
Normal file
18
bindings/usb/usbmisc-imx.txt
Normal file
@@ -0,0 +1,18 @@
|
||||
* Freescale i.MX non-core registers
|
||||
|
||||
Required properties:
|
||||
- #index-cells: Cells used to describe usb controller index. Should be <1>
|
||||
- compatible: Should be one of below:
|
||||
"fsl,imx6q-usbmisc" for imx6q
|
||||
"fsl,vf610-usbmisc" for Vybrid vf610
|
||||
"fsl,imx6sx-usbmisc" for imx6sx
|
||||
"fsl,imx7d-usbmisc" for imx7d
|
||||
"fsl,imx7ulp-usbmisc" for imx7ulp
|
||||
- reg: Should contain registers location and length
|
||||
|
||||
Examples:
|
||||
usbmisc@2184800 {
|
||||
#index-cells = <1>;
|
||||
compatible = "fsl,imx6q-usbmisc";
|
||||
reg = <0x02184800 0x200>;
|
||||
};
|
||||
50
bindings/usb/ux500-usb.txt
Normal file
50
bindings/usb/ux500-usb.txt
Normal file
@@ -0,0 +1,50 @@
|
||||
Ux500 MUSB
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "stericsson,db8500-musb"
|
||||
- reg : Offset and length of registers
|
||||
- interrupts : Interrupt; mode, number and trigger
|
||||
- dr_mode : Dual-role; either host mode "host", peripheral mode "peripheral"
|
||||
or both "otg"
|
||||
|
||||
Optional properties:
|
||||
- dmas : A list of dma channels;
|
||||
dma-controller, event-line, fixed-channel, flags
|
||||
- dma-names : An ordered list of channel names affiliated to the above
|
||||
|
||||
Example:
|
||||
|
||||
usb_per5@a03e0000 {
|
||||
compatible = "stericsson,db8500-musb";
|
||||
reg = <0xa03e0000 0x10000>;
|
||||
interrupts = <0 23 0x4>;
|
||||
interrupt-names = "mc";
|
||||
|
||||
dr_mode = "otg";
|
||||
|
||||
dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
|
||||
<&dma 38 0 0x0>, /* Logical - MemToDev */
|
||||
<&dma 37 0 0x2>, /* Logical - DevToMem */
|
||||
<&dma 37 0 0x0>, /* Logical - MemToDev */
|
||||
<&dma 36 0 0x2>, /* Logical - DevToMem */
|
||||
<&dma 36 0 0x0>, /* Logical - MemToDev */
|
||||
<&dma 19 0 0x2>, /* Logical - DevToMem */
|
||||
<&dma 19 0 0x0>, /* Logical - MemToDev */
|
||||
<&dma 18 0 0x2>, /* Logical - DevToMem */
|
||||
<&dma 18 0 0x0>, /* Logical - MemToDev */
|
||||
<&dma 17 0 0x2>, /* Logical - DevToMem */
|
||||
<&dma 17 0 0x0>, /* Logical - MemToDev */
|
||||
<&dma 16 0 0x2>, /* Logical - DevToMem */
|
||||
<&dma 16 0 0x0>, /* Logical - MemToDev */
|
||||
<&dma 39 0 0x2>, /* Logical - DevToMem */
|
||||
<&dma 39 0 0x0>; /* Logical - MemToDev */
|
||||
|
||||
dma-names = "iep_1_9", "oep_1_9",
|
||||
"iep_2_10", "oep_2_10",
|
||||
"iep_3_11", "oep_3_11",
|
||||
"iep_4_12", "oep_4_12",
|
||||
"iep_5_13", "oep_5_13",
|
||||
"iep_6_14", "oep_6_14",
|
||||
"iep_7_15", "oep_7_15",
|
||||
"iep_8", "oep_8";
|
||||
};
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user