dt-bindings: Add devicetree bindings
Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").
Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
This commit is contained in:
225
bindings/mtd/mtd-physmap.yaml
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225
bindings/mtd/mtd-physmap.yaml
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
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maintainers:
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- Rob Herring <robh@kernel.org>
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description: |
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Flash chips (Memory Technology Devices) are often used for solid state
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file systems on embedded devices.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- amd,s29gl01gp
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- amd,s29gl032a
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- amd,s29gl256n
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- amd,s29gl512n
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- arm,versatile-flash
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- arm,vexpress-flash
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- cortina,gemini-flash
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- cypress,hyperflash
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- ge,imp3a-firmware-mirror
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- ge,imp3a-paged-flash
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- gef,ppc9a-firmware-mirror
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- gef,ppc9a-paged-flash
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- gef,sbc310-firmware-mirror
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- gef,sbc310-paged-flash
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- gef,sbc610-firmware-mirror
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- gef,sbc610-paged-flash
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- intel,28f128j3
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- intel,dt28f160
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- intel,ixp4xx-flash
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- intel,JS28F128
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- intel,JS28F640
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- intel,PC28F640P30T85
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- numonyx,js28f00a
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- numonyx,js28f128
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- sst,sst39vf320
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- xlnx,xps-mch-emc-2.00.a
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- enum:
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- cfi-flash
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- jedec-flash
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- items:
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- enum:
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- cypress,cy7c1019dv33-10zsxi
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- arm,vexpress-psram
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- const: mtd-ram
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- enum:
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- cfi-flash
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- jedec-flash
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- mtd-ram
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- mtd-rom
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reg:
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description: |
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It's possible to (optionally) define multiple "reg" tuples so that
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non-identical chips can be described in one node.
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minItems: 1
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maxItems: 8
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bank-width:
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description: Width (in bytes) of the bank. Equal to the device width times
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the number of interleaved chips.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 2, 4 ]
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device-width:
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description:
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Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 2 ]
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no-unaligned-direct-access:
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type: boolean
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description: |
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Disables the default direct mapping of the flash.
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On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause problems
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with JFFS2 usage, as the local bus (LPB) doesn't support unaligned
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accesses as implemented in the JFFS2 code via memcpy(). By defining
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"no-unaligned-direct-access", the flash will not be exposed directly to
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the MTD users (e.g. JFFS2) any more.
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linux,mtd-name:
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description:
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Allows specifying the mtd name for retro capability with physmap-flash
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drivers as boot loader pass the mtd partition via the old device name
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physmap-flash.
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$ref: /schemas/types.yaml#/definitions/string
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use-advanced-sector-protection:
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type: boolean
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description: |
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Enables support for the advanced sector protection (Spansion: PPB -
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Persistent Protection Bits) locking.
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erase-size:
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description: The chip's physical erase block size in bytes.
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$ref: /schemas/types.yaml#/definitions/uint32
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addr-gpios:
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description:
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List of GPIO descriptors that will be used to address the MSBs address
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lines. The order goes from LSB to MSB.
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minItems: 1
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maxItems: 8
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'#address-cells':
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const: 1
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'#size-cells':
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const: 1
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big-endian: true
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little-endian: true
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patternProperties:
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'@[0-9a-f]+$':
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$ref: partitions/partition.yaml
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required:
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- compatible
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- reg
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if:
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properties:
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compatible:
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contains:
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const: cortina,gemini-flash
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then:
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properties:
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syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the syscon controller
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required:
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- syscon
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# FIXME: A parent bus may define timing properties
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additionalProperties: true
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examples:
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- |
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flash@ff000000 {
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compatible = "cfi-flash";
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reg = <0xff000000 0x01000000>;
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bank-width = <4>;
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device-width = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xff000000 0x01000000>;
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fs@0 {
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label = "fs";
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reg = <0 0xf80000>;
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};
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firmware@f80000 {
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label ="firmware";
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reg = <0xf80000 0x80000>;
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read-only;
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};
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};
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- |
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/* An example with multiple "reg" tuples */
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flash@0 {
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compatible = "intel,PC28F640P30T85", "cfi-flash";
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reg = <0x00000000 0x02000000>,
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<0x02000000 0x02000000>;
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bank-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0x04000000>;
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partition@0 {
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label = "test-part1";
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reg = <0 0x04000000>;
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};
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};
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- |
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/* An example using SRAM */
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bus {
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#address-cells = <2>;
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#size-cells = <1>;
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sram@2,0 {
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compatible = "mtd-ram";
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reg = <2 0 0x00200000>;
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bank-width = <2>;
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};
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};
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- |
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/* An example using addr-gpios */
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#include <dt-bindings/gpio/gpio.h>
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flash@20000000 {
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compatible = "cfi-flash";
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reg = <0x20000000 0x02000000>;
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bank-width = <2>;
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addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x00000000 0x02000000>,
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<1 0x02000000 0x02000000>;
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partition@0 {
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label = "test-part1";
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reg = <0 0x04000000>;
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};
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};
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...
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