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dt-bindings: Add devicetree bindings

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Add snapshot of device tree bindings from keystone common kernel, branch
"android-mainline-keystone-qcom-release" at c4c12103f9c0 ("Snap for 9228065
from e32903b9a63bb558df8b803b076619c53c16baad to
android-mainline-keystone-qcom-release").

Change-Id: I7682079615cbd9f29340a5c1f2a1d84ec441a1f1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
This commit is contained in:
Melody Olvera
2023-04-03 14:38:11 -07:00
parent c334acf377
commit 6f18ce8026
4878 changed files with 424312 additions and 0 deletions
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166
bindings/mips/brcm/soc.txt Normal file
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* Broadcom cable/DSL/settop platforms
Required properties:
- compatible: "brcm,bcm3368", "brcm,bcm3384", "brcm,bcm33843"
"brcm,bcm3384-viper", "brcm,bcm33843-viper"
"brcm,bcm6328", "brcm,bcm6358", "brcm,bcm6362", "brcm,bcm6368",
"brcm,bcm63168", "brcm,bcm63268",
"brcm,bcm7125", "brcm,bcm7346", "brcm,bcm7358", "brcm,bcm7360",
"brcm,bcm7362", "brcm,bcm7420", "brcm,bcm7425"
The experimental -viper variants are for running Linux on the 3384's
BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.
Power management
----------------
For power management (particularly, S2/S3/S5 system suspend), the following SoC
components are needed:
= Always-On control block (AON CTRL)
This hardware provides control registers for the "always-on" (even in low-power
modes) hardware, such as the Power Management State Machine (PMSM).
Required properties:
- compatible : should be one of
"brcm,bcm7425-aon-ctrl"
"brcm,bcm7429-aon-ctrl"
"brcm,bcm7435-aon-ctrl" and
"brcm,brcmstb-aon-ctrl"
- reg : the register start and length for the AON CTRL block
Example:
syscon@410000 {
compatible = "brcm,bcm7425-aon-ctrl", "brcm,brcmstb-aon-ctrl";
reg = <0x410000 0x400>;
};
= Memory controllers
A Broadcom STB SoC typically has a number of independent memory controllers,
each of which may have several associated hardware blocks, which are versioned
independently (control registers, DDR PHYs, etc.). One might consider
describing these controllers as a parent "memory controllers" block, which
contains N sub-nodes (one for each controller in the system), each of which is
associated with a number of hardware register resources (e.g., its PHY.
== MEMC (MEMory Controller)
Represents a single memory controller instance.
Required properties:
- compatible : should contain "brcm,brcmstb-memc" and "simple-bus"
- ranges : should contain the child address in the parent address
space, must be 0 here, and the register start and length of
the entire memory controller (including all sub nodes: DDR PHY,
arbiter, etc.)
- #address-cells : must be 1
- #size-cells : must be 1
Example:
memory-controller@0 {
compatible = "brcm,brcmstb-memc", "simple-bus";
ranges = <0x0 0x0 0xa000>;
#address-cells = <1>;
#size-cells = <1>;
memc-arb@1000 {
...
};
memc-ddr@2000 {
...
};
ddr-phy@6000 {
...
};
};
Should contain subnodes for any of the following relevant hardware resources:
== DDR PHY control
Control registers for this memory controller's DDR PHY.
Required properties:
- compatible : should contain one of these
"brcm,brcmstb-ddr-phy-v64.5"
"brcm,brcmstb-ddr-phy"
- reg : the DDR PHY register range and length
Example:
ddr-phy@6000 {
compatible = "brcm,brcmstb-ddr-phy-v64.5";
reg = <0x6000 0xc8>;
};
== DDR memory controller sequencer
Control registers for this memory controller's DDR memory sequencer
Required properties:
- compatible : should contain one of these
"brcm,bcm7425-memc-ddr"
"brcm,bcm7429-memc-ddr"
"brcm,bcm7435-memc-ddr" and
"brcm,brcmstb-memc-ddr"
- reg : the DDR sequencer register range and length
Example:
memc-ddr@2000 {
compatible = "brcm,bcm7425-memc-ddr", "brcm,brcmstb-memc-ddr";
reg = <0x2000 0x300>;
};
== MEMC Arbiter
The memory controller arbiter is responsible for memory clients allocation
(bandwidth, priorities etc.) and needs to have its contents restored during
deep sleep states (S3).
Required properties:
- compatible : should contain one of these
"brcm,brcmstb-memc-arb-v10.0.0.0"
"brcm,brcmstb-memc-arb"
- reg : the DDR Arbiter register range and length
Example:
memc-arb@1000 {
compatible = "brcm,brcmstb-memc-arb-v10.0.0.0";
reg = <0x1000 0x248>;
};
== Timers
The Broadcom STB chips contain a timer block with several general purpose
timers that can be used.
Required properties:
- compatible : should contain one of:
"brcm,bcm7425-timers"
"brcm,bcm7429-timers"
"brcm,bcm7435-timers" and
"brcm,brcmstb-timers"
- reg : the timers register range
- interrupts : the interrupt line for this timer block
Example:
timers: timer@4067c0 {
compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";
reg = <0x4067c0 0x40>;
interrupts = <&periph_intc 19>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mips/brcm/soc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom cable/DSL/settop platforms
maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
description: |
Boards Broadcom cable/DSL/settop SoC shall have the following properties.
The experimental -viper variants are for running Linux on the 3384's
BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.
properties:
$nodename:
const: '/'
compatible:
enum:
- brcm,bcm3368
- brcm,bcm3384
- brcm,bcm33843
- brcm,bcm3384-viper
- brcm,bcm33843-viper
- brcm,bcm6328
- brcm,bcm6358
- brcm,bcm6362
- brcm,bcm6368
- brcm,bcm63168
- brcm,bcm63268
- brcm,bcm7125
- brcm,bcm7346
- brcm,bcm7358
- brcm,bcm7360
- brcm,bcm7362
- brcm,bcm7420
- brcm,bcm7425
cpus:
type: object
additionalProperties: false
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
mips-hpt-frequency:
description: MIPS counter high precision timer frequency.
This is common to all CPUs in the system so it lives
under the "cpus" node.
$ref: /schemas/types.yaml#/definitions/uint32
patternProperties:
"^cpu@[0-9]$":
type: object
$ref: /schemas/mips/cpus.yaml#
unevaluatedProperties: false
required:
- mips-hpt-frequency
additionalProperties: true
examples:
- |
/ {
compatible = "brcm,bcm3368";
#address-cells = <1>;
#size-cells = <1>;
model = "Broadcom 3368";
cpus {
#address-cells = <1>;
#size-cells = <0>;
mips-hpt-frequency = <150000000>;
cpu@0 {
compatible = "brcm,bmips4350";
device_type = "cpu";
reg = <0>;
};
cpu@1 {
compatible = "brcm,bmips4350";
device_type = "cpu";
reg = <1>;
};
};
};
...