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Merge "dt-bindings: thermal: Add bindings for thermal devices"

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qctecmdr
2023-09-25 17:40:03 -07:00
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parent 4c5cd691e3 e2fe040035
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83
bindings/thermal/qcom-bcl-pmic5.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qcom-bcl-pmic5.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. BCL Peripheral Device For PMIC version 5
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
Qualcomm Technologies, Inc's PMIC has battery current limiting peripheral,
which can monitor for high battery current and low battery voltage in the
hardware. The BCL peripheral driver interacts with the PMIC peripheral using
the SPMI driver interface. The hardware can take threshold for notifying for
high battery current or low battery voltage events. This driver works only
with PMIC version 5, where the same BCL peripheral can be found in multiple
PMIC's that are used in a device, with limited functionalities. For example,
one PMIC can have only vbat monitoring, while the other PMIC can have both
vbat and ibat monitoring. This is a common driver, that can interact
with the multiple BCL peripherals.
properties:
compatible:
const: qcom,bcl-v5
description: msm battery state of charge device
reg:
maxItems: 1
description: |
<a b> where 'a' is the starting register address of the PMIC
peripheral and 'b' is the size of the peripheral address space.
interrupts:
minItems: 1
maxItems: 3
description: |
<a b c d> Where,
'a' is the SLAVE ID of the PMIC,
'b' is the peripheral ID,
'c' is the interrupt number in PMIC and
'd' is the interrupt type.
interrupt-names:
minItems: 1
description: |
User defined names for the interrupts. These interrupt
names will be used by the drivers to identify the
interrupts, instead of specifying the ID's. bcl driver will
accept these standard interrupts.
items:
- const: bcl-lvl0
- const: bcl-lvl1
- const: bcl-lvl2
qcom,pmic7-threshold:
type: boolean
description: |
When this flag is defined, the BCL driver will account for
no bit shift in the threshold registers.
required:
- compatible
- reg
- interrupts
- interrupt-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
bcl@4200 {
compatible = "qcom,bcl-v5";
reg = <0x4200 0x100>;
interrupts = <0x2 0x42 0x0 IRQ_TYPE_NONE>,
<0x2 0x42 0x1 IRQ_TYPE_NONE>;
interrupt-names = "bcl-lvl0",
"bcl-lvl1";
qcom,pmic7-threshold;
};

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bindings/thermal/qcom-bcl-soc.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qcom-bcl-soc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. PMIC State Of Charge Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
Battery state of charge driver can monitor for change in battery charge and
notify thermal framework, when the value goes below a certain threshold.
properties:
compatible:
const: qcom,msm-bcl-soc
description: msm battery state of charge device
required:
- compatible
additionalProperties: false
examples:
- |
bcl-soc {
compatible = "qcom,msm-bcl-soc";
};
...

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bindings/thermal/qcom-pe-sensor.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qcom-pe-sensor.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. Policy Engine(PE) Sensor Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The QTI Policy Engine sensor device will register the policy engine
recommendation with thermal framework as a sensor. This will enable
to provide configuration to mitigate cooling devices when a recommendation
is sent from Policy Engine hardware. The recommendations are mitigation
levels based on CX operating level.
There can be multiple Policy Engine hardwares for different rails.
properties:
compatible:
const: qcom,policy-engine
'#thermal-sensor-cells':
const: 0
description: See thermal.txt for description.
reg:
maxItems: 1
description: |
<a b> where 'a' is the RDPM PE base register address and
'b' is the size of the RDPM PE address space.
interrupts:
maxItems: 1
description: Policy Engine master interrupt.
required:
- compatible
- '#thermal-sensor-cells'
- reg
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
cx_rdpm_pe@635000 {
compatible = "qcom,policy-engine";
#thermal-sensor-cells = <0>;
reg = <0x00635000 0x1000>;
interrupts = <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>;
};

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bindings/thermal/qcom-sdpm.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qcom-sdpm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. Simple Digital Power Meter(SDPM) Clock Monitoring Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
SDPM is used to monitor the operating frequency of different clocks and based
on operating levels of different clients, the Policy Engine will recommend a
new max operating level. The SDPM driver will register with the clock
framework for rate change notification of different clocks. These clock rate
will be updated to SDPM.
properties:
compatible:
const: qcom,sdpm
description: msm battery state of charge device
reg:
maxItems: 1
description: |
<a b> where 'a' is the RDPM base register address and
'b' is the size of the RDPM address space.
clocks:
description: A List of phandle and clock specifier pairs as listed
in clock-names property.
clock-names:
description: |
List of clock names matching the clock order mentioned in
the clocks property.
csr-id:
description: Array of CSR ID matching the clock order mentioned in the
clocks property.
patternProperties:
".*-supply$":
description: Input supply phandle(s) to the regulator device
tree node that powers this domain.
required:
- compatible
- reg
- clocks
- clock-names
- csr-id
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,camcc-sdm845.h>
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
cx_sdpm@634000 {
compatible = "qcom,sdpm";
reg = <0x00634000 0x1000>;
clocks = <&clock_camcc CAM_CC_CSIPHY0_CLK>,
<&clock_gcc GCC_UFS_PHY_AXI_CLK_SRC>;
clock-names = "cam_cc_csiphy0", "ufs_phy_axi";
csr-id = <4 7>;
cam_cc_csiphy0-supply = <&cam_cc_ipe_0_gdsc>;
};

79
bindings/thermal/qti-cpu-hotplug-cdev.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-cpu-hotplug-cdev.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. CPU Hotplug Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The CPU hotplug cooling device will be used for hotplugging a CPU on a thermal
condition. This cooling device driver can register one cooling device per CPU,
which can be used by thermal zone to mitigate.
Each child node will represent a cooling device and the child node should
point to the CPU, which will be mitigated by that cooling device instance.
properties:
compatible:
const: qcom,cpu-hotplug
patternProperties:
"^cpu([0-9]*)-hotplug$":
type: object
description: |
This child nodes describes the CPU which will be hotplugged when the cooling
device is mitigated.
properties:
qcom,cpu:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Phandle to the CPU device that this cooling device will
mitigate.
"#cooling-cells":
const: 2
description: |
Must be 2. Needed for of_thermal as cooling device identifier.
Please refer to <devicetree/bindings/thermal/thermal.txt> for
more details.
required:
- qcom,cpu
- "#cooling-cells"
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
qcom,cpu-hotplug {
compatible = "qcom,cpu-hotplug";
cpu0_hotplug: cpu0-hotplug {
qcom,cpu = <&CPU0>;
#cooling-cells = <2>;
};
cpu1_hotplug: cpu1-hotplug {
qcom,cpu = <&CPU1>;
#cooling-cells = <2>;
};
cpu2_hotplug: cpu2-hotplug {
qcom,cpu = <&CPU2>;
#cooling-cells = <2>;
};
cpu3_hotplug: cpu3-hotplug {
qcom,cpu = <&CPU3>;
#cooling-cells = <2>;
};
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-cpufreq-cdev.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. CPU Frequency Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The CPU frequency cooling device will be used by userspace thermal daemon to
vote for frequency cap under thermal conditions. This driver will register a
cooling device for each CPU phandle specified in the devicetree.
properties:
compatible:
const: qcom,cpufreq-cdev
qcom,cpus:
$ref: "/schemas/types.yaml#/definitions/phandle-array"
description: |
Cooling device node where we list phandles to the CPUs.
Each CPU will be registered as a separate cooling device
with thermal framework.
required:
- compatible
- qcom,cpus
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
qcom,cpufreq-cdev {
compatible = "qcom,cpufreq-cdev";
qcom,cpus = <&CPU0 &CPU4 &CPU7>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-ddr-cdev.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. DDR Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The DDR cooling device will be used to place a DDR frequency vote. This
cooling device will be used in those cases where all the subsystem's are
thermally throttled and DDR has to be operated with a minimum performance
level. This cooling device vote can ensure the same.
properties:
compatible:
const: qcom,ddr-cooling-device
qcom,freq-table:
$ref: /schemas/types.yaml#/definitions/uint32-matrix
description: |
List of available DDR frequencies.
qcom,bus-width:
description:
Provides the bus width for DDR.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 4, 8]
default: 4
"#cooling-cells":
const: 2
description: |
Must be 2. Needed for of_thermal as cooling device identifier.
Please refer to <devicetree/bindings/thermal/thermal.txt> for
more details.
interconnects:
items:
- description: Path leading to system memory
required:
- compatible
- qcom,freq-table
- qcom,bus-width
- "#cooling-cells"
- interconnects
additionalProperties: false
examples:
- |
#include <dt-bindings/interconnect/qcom,sc7280.h>
qcom,ddr-cdev {
compatible = "qcom,ddr-cooling-device";
qcom,freq-table = <200000>,
<451000>,
<768000>,
<1017000>,
<2092000>,
<2736000>;
qcom,bus-width = <4>;
#cooling-cells = <2>;
interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;
};

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bindings/thermal/qti-devfreq-cdev.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-devfreq-cdev.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. GPU Frequency Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The devfreq cooling device will be used by userspace thermal daemon to
vote for frequency cap under thermal conditions. This driver will register a
cooling device for the GPU phandle specified in the devicetree.
properties:
compatible:
const: qcom,devfreq-cdev
qcom,devfreq:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Phandle to the GPU devfreq. This will register the GPU devfreq as
a cooling device with thermal framework.
required:
- compatible
- qcom,devfreq
additionalProperties: false
examples:
- |
qcom,devfreq-cdev {
compatible = "qcom,devfreq-cdev";
qcom,devfreq = <&msm_gpu>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-lmh-dcvs.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. Limits Management Hardware DCVS Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The LMH-DCVS block is a hardware IP for every CPU cluster, to handle quick
changes in thermal limits. The hardware responds to thermal variation amongst
the CPUs in the cluster by requesting limits on the clock frequency and
voltage on the OSM hardware.
The LMH DCVS driver exports a virtual sensor that can be used to set the
thermal limits on the hardware. LMH DCVS driver can be a platform CPU Cooling
device, which registers with the CPU cooling device interface. All CPU device
nodes should reference the corresponding LMH DCVS hardware in device tree.
CPUs referencing the same LMH DCVS node will be associated with the
corresponding cooling device as related CPUs.
properties:
compatible:
const: qcom,msm-hw-limits
reg:
maxItems: 2
description: |
<a, b> where 'a' is the starting register address of the OSM/LLM
and 'b' is the size of OSM/LLM address space. The
register space in index 0 should be LLM and index 1
should be OSM.
interrupts:
maxItems: 1
description: |
Should specify interrupt information about the debug
interrupt generated by the LMH DCVSh hardware. LMH
DCVSh hardware will generate this interrupt whenever
it makes a new CPU DCVS decision.
qcom,affinity:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Should specify the cluster affinity this hardware corresponds to.
isens_vref_0p8-supply:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Should specify the phandle of the vref regulator used by
the isens hardware. This active only regulator will be
enabled by LMH DCVSh. Isens hardware needs 1.8v and
0.8v supply regulators.
isens_vref_1p8-supply:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Should specify the phandle of the vref regulator used by
the isens hardware. This active only regulator will be
enabled by LMH DCVSh. Isens hardware needs 1.8v and
0.8v supply regulators.
isens-vref-0p8-settings:
$ref: /schemas/types.yaml#/definitions/uint32-array
description: |
Should specify the min voltage(uV), max voltage(uV) and
max load(uA) for the isens vref regulator. This
property is valid only if there is valid entry for
isens_vref_0p8-supply.
isens-vref-1p8-settings:
$ref: /schemas/types.yaml#/definitions/uint32-array
description: |
Should specify the min voltage(uV), max voltage(uV) and
max load(uA) for the isens vref regulator. This
property is valid only if there is valid entry for
isens_vref_1p8-supply.
qcom,no-cooling-device-register:
type: boolean
description: |
Should define this property if this driver doesn't need
to register CPU cooling devices with thermal framework.
required:
- compatible
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
qcom,limits-dcvs {
compatible = "qcom,msm-hw-limits";
isens_vref_0p8-supply = <&pm_v8_l1_ao>;
isens-vref-0p8-settings = <880000 880000 30000>;
isens_vref_1p8-supply = <&pm_v8_l3_ao>;
isens-vref-1p8-settings = <1200000 1200000 8000>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-qmi-cdev.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. QMI Thermal Mitigation (TMD) Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The QMI TMD cooling device, will be used for various mitigations for remote
subsystem including remote processor mitigation, rail voltage restriction etc.
This cooling device uses kernel qti QMI interface to send the message to
remote subsystem.
Each child node of the QMI TMD devicetree node represents each remote
subsystem and each child of this subsystem represents separate cooling
devices. It requires minimum one remote subsystem node and each subsystem
node requires minimum one cooling device node.
properties:
$nodename:
const: qcom,qmi-cooling-devices
patternProperties:
"^(modem|cdsp|adsp|slpi)":
type: object
description: This child nodes describes the subsystem properties.
properties:
qcom,instance-id:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Remote subsystem QMI server instance id to be used for
communicating with QMI.
Minimum one child node is required. Child node name and its alias are
used as cooling device name and phandle for that cooling device.
patternProperties:
"^[a-zA-Z0-9]*$":
type: object
description: This child nodes describes the subsystem properties.
properties:
qcom,qmi-dev-name:
$ref: /schemas/types.yaml#/definitions/string
description: |
Remote subsystem device identifier. Pick from the below accepted
cooling device in the list below.
oneOf:
- enum:
- pa
- pa_fr1
- cpuv_restriction_cold
- cx_vdd_limit
- modem
- modem_current
- modem_bw
- vbatt_low
- mmw0
- mmw1
- mmw2
- mmw3
- modem_skin
- mmw_skin0
- mmw_skin1
- mmw_skin2
- mmw_skin3
- cpr_cold
- wlan
- cdsp_sw
- cdsp_sw_hvx
- cdsp_sw_hmx
- cdsp_hw
- mmw_skin0_dsc
- mmw_skin1_dsc
- mmw_skin2_dsc
- mmw_skin3_dsc
- modem_skin_lte_dsc
- modem_skin_nr_dsc
- pa_dsc
- pa_fr1_dsc
- modem_lte_dsc
- modem_nr_dsc
- modem_nr_scg_dsc
- sdr0_lte_dsc
- sdr1_lte_dsc
- sdr0_nr_dsc
- sdr1_nr_dsc
- sdr0_nr_scg_dsc
- sdr1_nr_scg_dsc
- pa_lte_sdr0_dsc
- pa_lte_sdr1_dsc
- pa_nr_sdr0_dsc
- pa_nr_sdr1_dsc
- pa_nr_sdr0_scg_dsc
- pa_nr_sdr1_scg_dsc
- mmw0_dsc
- mmw1_dsc
- mmw2_dsc
- mmw3_dsc
- mmw_ific_dsc
- modem_lte_sub1_dsc
- modem_nr_sub1_dsc
- modem_nr_scg_sub1_dsc
- sdr0_lte_sub1_dsc
- sdr1_lte_sub1_dsc
- sdr0_nr_sub1_dsc
- sdr1_nr_sub1_dsc
- pa_lte_sdr0_sub1_dsc
- pa_lte_sdr1_sub1_dsc
- pa_nr_sdr0_sub1_dsc
- pa_nr_sdr1_sub1_dsc
- pa_nr_sdr0_scg_sub1_dsc
- pa_nr_sdr1_scg_sub1_dsc
- mmw0_sub1_dsc
- mmw1_sub1_dsc
- mmw2_sub1_dsc
- mmw3_sub1_dsc
- mmw_ific_sub1_dsc
'#cooling-cells':
const: 2
description: |
Must be 2. Needed for of_thermal as cooling device identifier.
Please refer to <devicetree/bindings/thermal/thermal.txt> for
more details.
required:
- qcom,qmi-dev-name
- '#cooling-cells'
additionalProperties: false
required:
- qcom,instance-id
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
#include <dt-bindings/thermal/thermal_qti.h>
qmi-tmd-devices {
compatible = "qcom,qmi-cooling-devices";
modem {
qcom,instance-id = <QMI_MODEM_INST_ID>;
modem_vdd: modem_vdd {
qcom,qmi-dev-name = "cpuv_restriction_cold";
#cooling-cells = <2>;
};
modem_current: modem_current {
qcom,qmi-dev-name = "modem_current";
#cooling-cells = <2>;
};
modem_cpr_cold: modem_cpr_cold {
qcom,qmi-dev-name = "cpr_cold";
#cooling-cells = <2>;
};
modem_proc: modem_proc {
qcom,qmi-dev-name = "modem";
#cooling-cells = <2>;
};
};
cdsp {
qcom,instance-id = <0x43>;
cdsp_vdd: cdsp_vdd {
qcom,qmi-dev-name = "cpuv_restriction_cold";
#cooling-cells = <2>;
};
cdsp_sw: cdsp {
qcom,qmi-dev-name = "cdsp_sw";
#cooling-cells = <2>;
};
cdsp_hw: hvx {
qcom,qmi-dev-name = "cdsp_hw";
#cooling-cells = <2>;
};
};
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-qmi-sensor.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. QMI Thermal Mitigation(TS) Sensor
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The QMI TS Sensor driver can list the sensors that are available in the
remote subsystem. This driver can read the temperature, set threshold and
get threshold notification.
Each child node of the QMI TS devicetree node represents a remote
subsystem and it can have more than one remote sensor names.
properties:
$nodename:
const: qcom,qmi-sensors
'#thermal-sensor-cells':
const: 1
description: See thermal.txt for description.
patternProperties:
"^(modem|cdsp|adsp|slpi)":
type: object
description: This child nodes describes the subsystem properties.
properties:
qcom,instance-id:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Remote subsystem QMI server instance id to be used for
communicating with QMI.
Minimum one child node is required. Child node name and its alias are
used as cooling device name and phandle for that cooling device.
qcom,qmi-sensor-names:
$ref: /schemas/types.yaml#/definitions/string-array
description: |
Remote sensor names. Below strings are the only acceptable
sensor names.
minItems: 1
items:
enum:
- pa
- pa_1
- pa_2
- qfe_pa0
- qfe_wtr0
- modem_tsens
- qfe_mmw0
- qfe_mmw1
- qfe_mmw2
- qfe_mmw3
- xo_therm
- qfe_pa_mdm
- qfe_pa_wtr
- qfe_mmw_streamer0
- qfe_mmw0_mod
- qfe_mmw1_mod
- qfe_mmw2_mod
- qfe_mmw3_mod
- qfe_ret_pa0
- qfe_wtr_pa0
- qfe_wtr_pa1
- qfe_wtr_pa2
- qfe_wtr_pa3
- sys_therm1
- sys_therm2
- modem_tsens1
- mmw_pa1
- mmw_pa2
- mmw_pa3
- sdr_mmw_therm
- qtm_therm
- modem_bcl_warn
- sdr0_pa0
- sdr0_pa1
- sdr0_pa2
- sdr0_pa3
- sdr0_pa4
- sdr0_pa5
- sdr0
- sdr1_pa0
- sdr1_pa1
- sdr1_pa2
- sdr1_pa3
- sdr1_pa4
- sdr1_pa5
- sdr1
- mmw0
- mmw1
- mmw2
- mmw3
- mmw_ific0
- sub1_modem_cfg
- sub1_lte_cc
- sub1_mcg_fr1_cc
- sub1_mcg_fr2_cc
- sub1_scg_fr1_cc
- sub1_scg_fr2_cc
- sub2_modem_cfg
- sub2_lte_cc
- sub2_mcg_fr1_cc
- sub2_mcg_fr2_cc
- sub2_scg_fr1_cc
- sub2_scg_fr2_cc
- isense_trim
- epm0
- epm1
- epm2
- epm3
- epm4
- epm5
- epm6
- epm7
- sdr0_pa
- sdr1_pa
- sub0_sdr0_pa
- sub1_sdr0_pa
- sys_therm3
- sys_therm4
- sys_therm5
- sys_therm6
- beamer_n_therm
- beamer_e_therm
- beamer_w_therm
required:
- qcom,instance-id
- qcom,qmi-sensor-names
additionalProperties: false
required:
- compatible
- '#thermal-sensor-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/thermal/thermal_qti.h>
qmi_sensor: qmi-ts-sensors {
compatible = "qcom,qmi-sensors";
#thermal-sensor-cells = <1>;
modem {
qcom,instance-id = <0x0>;
qcom,qmi-sensor-names = "pa",
"pa_1",
"qfe_pa0",
"qfe_wtr0";
};
cdsp {
qcom,instance-id = <QMI_CDSP_INST_ID>;
qcom,qmi-sensor-names = "isense_trim";
};
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-thermal-pause-cdev.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. CPU Pause Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
The CPU pause cooling device will be used for isolating a CPU on a thermal
condition. This cooling device driver can register one cooling device per
single or multiple CPUs, which can be used by thermal zone to mitigate.
Each child node will represent a cooling device and the child node should
point to the CPU mask, which will be mitigated by that cooling device instance.
properties:
compatible:
const: qcom,thermal-pause
patternProperties:
"^thermal-pause-[0-9a-fA-F][0-9a-fA-F]$":
type: object
description: This child nodes describes the group of CPUs to perform CPU
isolation as mitigation.
properties:
qcom,cpus:
$ref: "/schemas/types.yaml#/definitions/phandle-array"
description: |
List of Phandles to the CPUs that should be mitigated as
a part of this cooling device.
'#cooling-cells':
const: 2
description: |
Must be 2. Needed for of_thermal as cooling device identifier.
Please refer to <devicetree/bindings/thermal/thermal.txt> for
more details.
qcom,cdev-alias:
$ref: /schemas/types.yaml#/definitions/string
description: |
Alias name for the cooling device. When specified, this
name will be used to create a cooling device instead
of using the default name based on CPU mask.
required:
- qcom,cpus
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
qcom,thermal-pause {
compatible = "qcom,thermal-pause";
/* pause a single cpu, cpu 0 */
thermal-pause-01 {
qcom,cpus = <&CPU0>;
qcom,cdev-alias = "pause_cpu0";
};
/* pause a group of cpus, cpus 0-3 */
thermal-pause-0F {
qcom,cpus = <&CPU0 &CPU1 &CPU2 &CPU3>;
#cooling-cells = <2>;
};
/* pause a group of cpus, cpus 6-7 */
thermal-pause-C0 {
qcom,cpus = <&CPU4 &CPU5 &CPU6 &CPU7>;
#cooling-cells = <2>;
};
/* pause a single cpu, cpu 7 */
thermal-pause-80 {
qcom,cpus = <&CPU7>;
#cooling-cells = <2>;
};
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-userspace-cdev.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. Userspace Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
Certain Cooling devices reside in userspace and they also needs to be
mitigated for thermal conditions. Thermal framework will send netlink message
to userspace, when a cooling device level changes for any cooling device.
This cooling device expects the userspace cooling device to listen to the
netlink message and take necessary action.
Devicetree will define the name of the cooling device and the max mitigation
level a cooling device can support. Each child node will be an individual
cooling device.
properties:
compatible:
const: qcom,userspace-cooling-devices
patternProperties:
"^display-fps":
type: object
description: |
This child node describes the maximum level supported.
Minimum one child node is required. Child node name is used as
cooling device name and phandle for that cooling device.
properties:
qcom,max-level:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 0, 4 ]
description: |
The max level this cooling device can support.
The cooling device levels start from 0 to max level
inclusive.
'#cooling-cells':
const: 2
description: |
Must be 2. Needed for of_thermal as cooling device identifier.
Please refer to <devicetree/bindings/thermal/thermal.txt> for
more details.
required:
- qcom,max-level
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
qcom,userspace-cdev {
compatible = "qcom,userspace-cooling-devices";
display_fps: display-fps {
qcom,max-level = <4>;
/* levels supported
* 0, 1, 2, 3, 4
*/
#cooling-cells = <2>;
};
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-voltage-cooling.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. CPU Voltage Cooling Device
maintainers:
- Rashid Zafar <quic_rzafar@quicinc.com>
description: |
A single cluster can have CPUs with different frequency plans.
Mitigating individual CPU may or may not bring down the CPU cluster
voltage depending on the operating level of the other CPUs.
CPU voltage cooling device will provide support to apply CPU frequency
mitigation on the different CPUs in a cluster to achieve a reduction in
cluster voltage. This is achieved by building a mitigation table mapping
the CPU frequency levels to a voltage.
properties:
compatible:
const: qcom,cc-cooling-devices
patternProperties:
"^qcom,apc([0-9]*)-cluster$":
type: object
description: |
This child nodes describes the CPUs on the same APC rail to apply the
CPU frequency mitigation.
properties:
qcom,cpu:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Phandle to the CPU device that this cooling device will
mitigate.
qcom,cpus:
$ref: "/schemas/types.yaml#/definitions/phandle-array"
description: |
Specify array of 2 CPU phandles, which needs to be
used for building a voltage based mitigation table.
"#cooling-cells":
const: 2
description: |
Must be 2. Needed for of_thermal as cooling device identifier.
Please refer to <devicetree/bindings/thermal/thermal.txt> for
more details.
required:
- qcom,cpus
- "#cooling-cells"
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
qcom,cpu-voltage-cdev {
compatible = "qcom,cc-cooling-devices";
apc1_cluster: qcom,apc1-cluster {
qcom,cpus = <&CPU4 &CPU7>;
#cooling-cells = <2>;
};
};