arm64: dts: qcom: niobe: Disable niobe devicetree files
This change removes niobe related dsp-devicetree files. As kernel devicetree is proprietary removing niobe devicetree from opensource. Change-Id: If7a080918924a99673b42532164742bfdf5c1d11 Signed-off-by: Abhinav Parihar <quic_parihar@quicinc.com>
This commit is contained in:
Abhinav Parihar
4
Kbuild
4
Kbuild
@@ -18,10 +18,6 @@ dtbo-y += sun/sun-dsp.dtbo
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endif
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endif
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endif
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endif
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ifeq ($(CONFIG_ARCH_NIOBE), y)
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dtbo-y += niobe/niobe-dsp.dtbo
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endif
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always-y := $(dtb-y) $(dtbo-y)
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always-y := $(dtb-y) $(dtbo-y)
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subdir-y := $(dts-dirs)
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subdir-y := $(dts-dirs)
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clean-files := *.dtb *.dtbo
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clean-files := *.dtb *.dtbo
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@@ -1,11 +0,0 @@
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/dts-v1/;
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/plugin/;
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#include "niobe-dsp.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Niobe SoC";
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compatible = "qcom,niobe";
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qcom,msm-id = <629 0x10000>, <652 0x10000>;
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qcom,board-id = <0 0>;
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};
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@@ -1,224 +0,0 @@
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&remoteproc_adsp_glink {
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qcom,fastrpc {
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compatible = "qcom,fastrpc";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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label = "adsp";
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memory-region = <&adsp_mem_heap>;
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qcom,vmids = <22 37>;
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compute-cb@1 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <3>;
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iommus = <&apps_smmu 0x1003 0x0000>,
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<&apps_smmu 0x1063 0x0000>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <1>; /* ROOT_PD */
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};
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compute-cb@2 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <4>;
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iommus = <&apps_smmu 0x1004 0x0000>,
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<&apps_smmu 0x1064 0x0000>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <2>; /* AUDIO_STATICPD */
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};
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compute-cb@3 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <5>;
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iommus = <&apps_smmu 0x1005 0x0000>,
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<&apps_smmu 0x1065 0x0000>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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qcom,nsessions = <8>;
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dma-coherent;
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pd-type = <3>; /* SENSORS_STATICPD */
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};
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compute-cb@4 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <6>;
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iommus = <&apps_smmu 0x1006 0x0000>,
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<&apps_smmu 0x1066 0x0000>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@5 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <7>;
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iommus = <&apps_smmu 0x1007 0x0000>,
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<&apps_smmu 0x1067 0x0000>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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};
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};
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&remoteproc_cdsp_glink {
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qcom,fastrpc {
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compatible = "qcom,fastrpc";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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label = "cdsp";
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qcom,fastrpc-gids = <2908>;
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qcom,rpc-latency-us = <235>;
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compute-cb@1 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <1>;
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iommus = <&apps_smmu 0x0C01 0x0040>,
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<&apps_smmu 0x0C21 0x0000>,
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<&apps_smmu 0x0C41 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <1>; /* ROOT_PD */
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};
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compute-cb@2 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <2>;
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iommus = <&apps_smmu 0x0C02 0x0040>,
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<&apps_smmu 0x0C22 0x0000>,
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<&apps_smmu 0x0C42 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@3 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <3>;
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iommus = <&apps_smmu 0x0C03 0x0040>,
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<&apps_smmu 0x0C23 0x0000>,
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<&apps_smmu 0x0C43 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@4 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <4>;
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iommus = <&apps_smmu 0x0C04 0x0040>,
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<&apps_smmu 0x0C24 0x0000>,
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<&apps_smmu 0x0C44 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@5 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <5>;
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iommus = <&apps_smmu 0x0C05 0x0040>,
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<&apps_smmu 0x0C25 0x0000>,
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<&apps_smmu 0x0C45 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@6 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <6>;
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iommus = <&apps_smmu 0x0C06 0x0040>,
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<&apps_smmu 0x0C26 0x0000>,
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<&apps_smmu 0x0C46 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@7 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <7>;
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iommus = <&apps_smmu 0x0C07 0x0040>,
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<&apps_smmu 0x0C27 0x0000>,
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<&apps_smmu 0x0C47 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@8 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <8>;
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iommus = <&apps_smmu 0x0C08 0x0040>,
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<&apps_smmu 0x0C28 0x0000>,
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<&apps_smmu 0x0C48 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@9 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <9>;
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qcom,secure-context-bank;
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iommus = <&apps_smmu 0x0C09 0x0040>,
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<&apps_smmu 0x0C29 0x0000>,
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<&apps_smmu 0x0C49 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
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qcom,nsessions = <3>;
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dma-coherent;
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pd-type = <6>; /* CPZ_USERPD */
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};
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compute-cb@10 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <12>;
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iommus = <&apps_smmu 0x0C0C 0x0040>,
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<&apps_smmu 0x0C2C 0x0000>,
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<&apps_smmu 0x0C4C 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@11 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <13>;
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iommus = <&apps_smmu 0x0C0D 0x0040>,
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<&apps_smmu 0x0C2D 0x0000>,
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<&apps_smmu 0x0C4D 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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compute-cb@12 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <14>;
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iommus = <&apps_smmu 0x0C0E 0x0040>,
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<&apps_smmu 0x0C2E 0x0000>,
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<&apps_smmu 0x0C4E 0x0040>;
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qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <7>; /* USERPD */
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};
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};
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};
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