diff --git a/bindings/mdss-dsi-panel.yaml b/bindings/mdss-dsi-panel.yaml
index 54e88f3a..f085a963 100644
--- a/bindings/mdss-dsi-panel.yaml
+++ b/bindings/mdss-dsi-panel.yaml
@@ -1418,6 +1418,9 @@ properties:
   qcom,mdss-dsc-block-prediction-enable:
     description: A boolean value to enable/disable the block prediction at decoder.
 
+  qcom,mdss-dsc-rc-override_v1:
+    description: A boolean value to enable override rc_range_bpg_ofs in sde_dsc_rc_range_bpg_override_v1.
+
   qcom,mdss-dsc-config-by-manufacture-cmd:
     description: >
       A boolean to indicates panel use manufacture command to setup pps
@@ -1786,6 +1789,7 @@ examples:
         qcom,mdss-dsi-panel-prefill-lines = <0x10>;
         qcom,mdss-dsi-force-clock-lane-hs;
         qcom,compression-mode = "dsc";
+        qcom,mdss-dsc-rc-override_v1;
         qcom,adjust-timer-wakeup-ms = <1>;
         qcom,platform-reset-gpio = <&tlmm 0 0>;
 
diff --git a/display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi b/display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi
index 499ea14e..aad5198e 100644
--- a/display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi
+++ b/display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi
@@ -109,6 +109,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-10bit-video.dtsi b/display/dsi-panel-nt37801-dsc-10bit-video.dtsi
index d7d968d6..79524689 100644
--- a/display/dsi-panel-nt37801-dsc-10bit-video.dtsi
+++ b/display/dsi-panel-nt37801-dsc-10bit-video.dtsi
@@ -106,6 +106,7 @@
 				qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-fhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-dsc-fhd-plus-cmd.dtsi
index d6816370..e1c2f792 100644
--- a/display/dsi-panel-nt37801-dsc-fhd-plus-cmd.dtsi
+++ b/display/dsi-panel-nt37801-dsc-fhd-plus-cmd.dtsi
@@ -127,6 +127,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <540>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -227,6 +228,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <540>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -340,6 +342,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <540>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -453,6 +456,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <540>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -566,6 +570,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <540>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi
index 8030ebb2..fc12f0d7 100644
--- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi
+++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi
@@ -38,6 +38,20 @@
 		qcom,mdss-dsi-te-using-te-pin;
 		qcom,panel-cphy-mode;
 		qcom,spr-pack-type = "pentile";
+		/*
+		 * ###############################################################
+		 * # Pentile SPR phases for SM8750 and later
+		 * ###############################################################
+		 * # RG/BG Type A    BG/RG Type A    GR/GB Type A    GB/GR Type A
+		 * # R B R B ...     B R B R ...      R B R B ...     B R B R ...
+		 * #  G G G G ...     G G G G ...    G G G G ...     G G G G ...
+		 * #
+		 * # RG/BG Type B    BG/RG Type B    GR/GB Type B    GB/GR Type B
+		 * #  G G G G ...     G G G G ...    G G G G ...     G G G G ...
+		 * # R B R B ...     B R B R ...      R B R B ...     B R B R ...
+		 * ###############################################################
+		 */
+		qcom,spr-pentile-pack-type = "RG-BG Type A";
 
 		qcom,mdss-dsi-display-timings {
 			timing@0 {
@@ -125,6 +139,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -226,6 +241,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -338,6 +354,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-ddicspr.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-ddicspr.dtsi
index 260dc4a4..7b969aa8 100644
--- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-ddicspr.dtsi
+++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-ddicspr.dtsi
@@ -113,6 +113,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi
index 76401ecf..4ebc8416 100644
--- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi
+++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi
@@ -120,6 +120,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi
index 1b86e3d2..1d5cf4e7 100644
--- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi
+++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi
@@ -40,6 +40,20 @@
 		qcom,mdss-dsi-te-check-enable;
 		qcom,mdss-dsi-te-using-te-pin;
 		qcom,spr-pack-type = "pentile";
+		/*
+		 * ###############################################################
+		 * # Pentile SPR phases for SM8750 and later
+		 * ###############################################################
+		 * # RG/BG Type A    BG/RG Type A    GR/GB Type A    GB/GR Type A
+		 * # R B R B ...     B R B R ...      R B R B ...     B R B R ...
+		 * #  G G G G ...     G G G G ...    G G G G ...     G G G G ...
+		 * #
+		 * # RG/BG Type B    BG/RG Type B    GR/GB Type B    GB/GR Type B
+		 * #  G G G G ...     G G G G ...    G G G G ...     G G G G ...
+		 * # R B R B ...     B R B R ...      R B R B ...     B R B R ...
+		 * ###############################################################
+		 */
+		qcom,spr-pentile-pack-type = "RG-BG Type A";
 		qcom,mdss-dsi-display-timings {
 			timing@0 {
 				cell-index = <0>;
@@ -125,6 +139,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -225,6 +240,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -337,6 +353,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -449,6 +466,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
@@ -561,230 +579,7 @@
 					"dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
-				qcom,mdss-dsc-slice-height = <40>;
-				qcom,mdss-dsc-slice-width = <720>;
-				qcom,mdss-dsc-slice-per-pkt = <1>;
-				qcom,mdss-dsc-bit-per-component = <8>;
-				qcom,mdss-dsc-bit-per-pixel = <8>;
-				qcom,mdss-dsc-block-prediction-enable;
-			};
-
-			timing@5 {
-				cell-index = <5>;
-				qcom,mdss-dsi-panel-framerate = <24>;
-				qcom,mdss-dsi-panel-width = <1440>;
-				qcom,mdss-dsi-panel-height = <3200>;
-				qcom,mdss-dsi-h-front-porch = <20>;
-				qcom,mdss-dsi-h-back-porch = <20>;
-				qcom,mdss-dsi-h-pulse-width = <4>;
-				qcom,mdss-dsi-h-sync-skew = <0>;
-				qcom,mdss-dsi-v-back-porch = <18>;
-				qcom,mdss-dsi-v-front-porch = <20>;
-				qcom,mdss-dsi-v-pulse-width = <2>;
-				qcom,mdss-dsi-h-left-border = <0>;
-				qcom,mdss-dsi-h-right-border = <0>;
-				qcom,mdss-dsi-v-top-border = <0>;
-				qcom,mdss-dsi-v-bottom-border = <0>;
-				qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
-				qcom,mdss-dsi-panel-clockrate = <1199900000>;
-
-				qcom,mdss-dsi-timing-switch-command = [
-					39 01 00 00 00 00 05 2a 00 00 05 9f
-					39 01 00 00 00 00 05 2b 00 00 0c 7f
-					39 01 00 00 00 00 02 8f 00
-					39 01 00 00 00 00 02 2f 00
-					39 01 00 00 00 00 02 26 01
-					39 01 00 00 00 00 02 5a 01
-					39 01 00 00 00 00 02 2f 30
-					39 01 00 00 00 00 06 f0 55 aa 52 08 00
-					39 01 00 00 00 00 02 6f 1c
-					39 01 00 00 00 00 09 ba 91 04 04 00 01
-					   04 04 00
-					39 01 00 00 00 00 06 f0 55 aa 52 08 00
-					39 01 00 00 00 00 06 c0 54 c0 00 21 43
-					39 01 00 00 00 00 06 f0 55 aa 52 08 02
-					39 01 00 00 00 00 02 cc 30
-					39 01 00 00 00 00 02 ce 01
-					39 01 00 00 20 00 02 cc 00
-				];
-
-				qcom,mdss-dsi-on-command = [
-					39 01 00 00 00 00 06 F0 55 AA 52 08 01
-					39 01 00 00 00 00 02 6F 01
-					39 01 00 00 00 00 04 C5 0B 0B 0B
-					39 01 00 00 00 00 05 FF AA 55 A5 80
-					39 01 00 00 00 00 02 6F 02
-					39 01 00 00 00 00 02 F5 10
-					39 01 00 00 00 00 02 6F 1B
-					39 01 00 00 00 00 02 F4 55
-					39 01 00 00 00 00 02 6F 18
-					39 01 00 00 00 00 02 F8 19
-					39 01 00 00 00 00 02 6F 0F
-					39 01 00 00 00 00 02 FC 00
-					39 01 00 00 00 00 05 2A 00 00 05 9F
-					39 01 00 00 00 00 05 2B 00 00 0C 7F
-					39 01 00 00 00 00 03 90 03 03
-					39 01 00 00 00 00 13 91 89 28 00 28 c2
-					   00 02 68 04 6c 00 0a 02 77 01 e9 10
-					   f0
-					39 01 00 00 00 00 05 ff aa 55 a5 81
-					39 01 00 00 00 00 02 6f 23
-					39 01 00 00 00 00 15 fb 00 01 00 11 33
-					   33 33 55 57 d0 00 00 44 56 77 78 9a
-					   bc dd f0
-					39 01 00 00 00 00 02 6F 06
-					39 01 00 00 00 00 02 F3 DC
-					39 01 00 00 00 00 02 26 00
-					39 01 00 00 00 00 02 35 00
-					39 01 00 00 00 00 05 3B 00 18 00 10
-					39 01 00 00 00 00 02 53 20
-					39 01 00 00 00 00 07 51 07 FF 07 FF 0F
-					   FF
-					39 01 00 00 00 00 02 5A 01
-					39 01 00 00 00 00 02 5F 00
-					39 01 00 00 00 00 02 9C 01
-					05 01 00 00 00 00 01 2C
-					39 01 00 00 00 00 02 2f 00
-					39 01 00 00 00 00 02 26 01
-					39 01 00 00 00 00 02 5a 01
-					39 01 00 00 00 00 02 2f 30
-					39 01 00 00 00 00 06 f0 55 aa 52 08 00
-					39 01 00 00 00 00 02 6f 1c
-					39 01 00 00 00 00 09 ba 91 04 04 00 01
-					   04 04 00
-					39 01 00 00 00 00 06 f0 55 aa 52 08 00
-					39 01 00 00 00 00 06 c0 54 c0 00 21 43
-					39 01 00 00 00 00 06 f0 55 aa 52 08 02
-					39 01 00 00 00 00 02 cc 30
-					39 01 00 00 00 00 02 ce 01
-					39 01 00 00 20 00 02 cc 00
-					39 01 00 00 00 00 06 F0 55 AA 52 08 01
-					39 01 00 00 00 00 05 B2 55 01 FF 03
-					05 01 00 00 78 00 01 11
-					05 01 00 00 14 00 01 29
-				];
-
-				qcom,mdss-dsi-off-command = [
-					05 01 00 00 14 00 02 28 00
-					05 01 00 00 78 00 02 10 00];
-				qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
-				qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
-				qcom,mdss-dsi-timing-switch-command-state =
-					"dsi_lp_mode";
-				qcom,mdss-dsi-h-sync-pulse = <0>;
-				qcom,compression-mode = "dsc";
-				qcom,mdss-dsc-slice-height = <40>;
-				qcom,mdss-dsc-slice-width = <720>;
-				qcom,mdss-dsc-slice-per-pkt = <1>;
-				qcom,mdss-dsc-bit-per-component = <8>;
-				qcom,mdss-dsc-bit-per-pixel = <8>;
-				qcom,mdss-dsc-block-prediction-enable;
-			};
-
-			timing@6 {
-				cell-index = <6>;
-				qcom,mdss-dsi-panel-framerate = <20>;
-				qcom,mdss-dsi-panel-width = <1440>;
-				qcom,mdss-dsi-panel-height = <3200>;
-				qcom,mdss-dsi-h-front-porch = <20>;
-				qcom,mdss-dsi-h-back-porch = <20>;
-				qcom,mdss-dsi-h-pulse-width = <4>;
-				qcom,mdss-dsi-h-sync-skew = <0>;
-				qcom,mdss-dsi-v-back-porch = <18>;
-				qcom,mdss-dsi-v-front-porch = <20>;
-				qcom,mdss-dsi-v-pulse-width = <2>;
-				qcom,mdss-dsi-h-left-border = <0>;
-				qcom,mdss-dsi-h-right-border = <0>;
-				qcom,mdss-dsi-v-top-border = <0>;
-				qcom,mdss-dsi-v-bottom-border = <0>;
-				qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
-				qcom,mdss-dsi-panel-clockrate = <1199900000>;
-
-				qcom,mdss-dsi-timing-switch-command = [
-					39 01 00 00 00 00 05 2a 00 00 05 9f
-					39 01 00 00 00 00 05 2b 00 00 0c 7f
-					39 01 00 00 00 00 02 8f 00
-					39 01 00 00 00 00 02 2f 00
-					39 01 00 00 00 00 02 26 01
-					39 01 00 00 00 00 02 5a 01
-					39 01 00 00 00 00 02 2f 30
-					39 01 00 00 00 00 06 f0 55 aa 52 08 00
-					39 01 00 00 00 00 02 6f 1c
-					39 01 00 00 00 00 09 ba 91 05 05 00 01
-					   05 05 00
-					39 01 00 00 00 00 06 f0 55 aa 52 08 00
-					39 01 00 00 00 00 06 c0 54 c0 00 21 43
-					39 01 00 00 00 00 06 f0 55 aa 52 08 02
-					39 01 00 00 00 00 02 cc 30
-					39 01 00 00 00 00 02 ce 01
-					39 01 00 00 20 00 02 cc 00
-				];
-
-				qcom,mdss-dsi-on-command = [
-					39 01 00 00 00 00 06 F0 55 AA 52 08 01
-					39 01 00 00 00 00 02 6F 01
-					39 01 00 00 00 00 04 C5 0B 0B 0B
-					39 01 00 00 00 00 05 FF AA 55 A5 80
-					39 01 00 00 00 00 02 6F 02
-					39 01 00 00 00 00 02 F5 10
-					39 01 00 00 00 00 02 6F 1B
-					39 01 00 00 00 00 02 F4 55
-					39 01 00 00 00 00 02 6F 18
-					39 01 00 00 00 00 02 F8 19
-					39 01 00 00 00 00 02 6F 0F
-					39 01 00 00 00 00 02 FC 00
-					39 01 00 00 00 00 05 2A 00 00 05 9F
-					39 01 00 00 00 00 05 2B 00 00 0C 7F
-					39 01 00 00 00 00 03 90 03 03
-					39 01 00 00 00 00 13 91 89 28 00 28 c2
-					   00 02 68 04 6c 00 0a 02 77 01 e9 10
-					   f0
-					39 01 00 00 00 00 05 ff aa 55 a5 81
-					39 01 00 00 00 00 02 6f 23
-					39 01 00 00 00 00 15 fb 00 01 00 11 33
-					   33 33 55 57 d0 00 00 44 56 77 78 9a
-					   bc dd f0
-					39 01 00 00 00 00 02 6F 06
-					39 01 00 00 00 00 02 F3 DC
-					39 01 00 00 00 00 02 26 00
-					39 01 00 00 00 00 02 35 00
-					39 01 00 00 00 00 05 3B 00 18 00 10
-					39 01 00 00 00 00 02 53 20
-					39 01 00 00 00 00 07 51 07 FF 07 FF 0F
-					   FF
-					39 01 00 00 00 00 02 5A 01
-					39 01 00 00 00 00 02 5F 00
-					39 01 00 00 00 00 02 9C 01
-					05 01 00 00 00 00 01 2C
-					39 01 00 00 00 00 02 2f 00
-					39 01 00 00 00 00 02 26 01
-					39 01 00 00 00 00 02 5a 01
-					39 01 00 00 00 00 02 2f 30
-					39 01 00 00 00 00 06 f0 55 aa 52 08 00
-					39 01 00 00 00 00 02 6f 1c
-					39 01 00 00 00 00 09 ba 91 05 05 00 01
-					   05 05 00
-					39 01 00 00 00 00 06 f0 55 aa 52 08 00
-					39 01 00 00 00 00 06 c0 54 c0 00 21 43
-					39 01 00 00 00 00 06 f0 55 aa 52 08 02
-					39 01 00 00 00 00 02 cc 30
-					39 01 00 00 00 00 02 ce 01
-					39 01 00 00 20 00 02 cc 00
-					39 01 00 00 00 00 06 F0 55 AA 52 08 01
-					39 01 00 00 00 00 05 B2 55 01 FF 03
-					05 01 00 00 78 00 01 11
-					05 01 00 00 14 00 01 29
-				];
-
-				qcom,mdss-dsi-off-command = [
-					05 01 00 00 14 00 02 28 00
-					05 01 00 00 78 00 02 10 00];
-				qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
-				qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
-				qcom,mdss-dsi-timing-switch-command-state =
-					"dsi_lp_mode";
-				qcom,mdss-dsi-h-sync-pulse = <0>;
-				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi
index ed5a1961..dd6127df 100644
--- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi
+++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi
@@ -28,6 +28,20 @@
 		qcom,adjust-timer-wakeup-ms = <1>;
 		qcom,panel-cphy-mode;
 		qcom,spr-pack-type = "pentile";
+		/*
+		 * ###############################################################
+		 * # Pentile SPR phases for SM8750 and later
+		 * ###############################################################
+		 * # RG/BG Type A    BG/RG Type A    GR/GB Type A    GB/GR Type A
+		 * # R B R B ...     B R B R ...      R B R B ...     B R B R ...
+		 * #  G G G G ...     G G G G ...    G G G G ...     G G G G ...
+		 * #
+		 * # RG/BG Type B    BG/RG Type B    GR/GB Type B    GB/GR Type B
+		 * #  G G G G ...     G G G G ...    G G G G ...     G G G G ...
+		 * # R B R B ...     B R B R ...      R B R B ...     B R B R ...
+		 * ###############################################################
+		 */
+		qcom,spr-pentile-pack-type = "RG-BG Type A";
 
 		qcom,mdss-dsi-wr-mem-start = <0x2c>;
 		qcom,mdss-dsi-wr-mem-continue = <0x3c>;
@@ -111,6 +125,7 @@
 				qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-ddicspr.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-ddicspr.dtsi
index 212ad8ec..71f33306 100644
--- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-ddicspr.dtsi
+++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-ddicspr.dtsi
@@ -112,6 +112,7 @@
 				qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-spr.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-spr.dtsi
new file mode 100644
index 00000000..461591aa
--- /dev/null
+++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-spr.dtsi
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&mdss_mdp {
+	dsi_nt37801_amoled_vid_spr: qcom,mdss_dsi_nt37801_wqhd_plus_vid_spr {
+		qcom,mdss-dsi-panel-name =
+			"nt37801 amoled vid mode dsi csot panel with DSC and AP SPR";
+		qcom,mdss-dsi-panel-type = "dsi_video_mode";
+		qcom,mdss-dsi-panel-physical-type = "oled";
+		qcom,mdss-dsi-virtual-channel-id = <0>;
+		qcom,mdss-dsi-stream = <0>;
+		qcom,mdss-dsi-bpp = <24>;
+		qcom,mdss-dsi-border-color = <0>;
+		qcom,dsi-ctrl-num = <0>;
+		qcom,dsi-phy-num = <0>;
+		qcom,dsi-sec-ctrl-num = <1>;
+		qcom,dsi-sec-phy-num = <1>;
+		qcom,mdss-dsi-traffic-mode = "burst_mode";
+		qcom,mdss-dsi-bllp-eof-power-mode;
+		qcom,mdss-dsi-bllp-power-mode;
+		qcom,mdss-dsi-lane-0-state;
+		qcom,mdss-dsi-lane-1-state;
+		qcom,mdss-dsi-lane-2-state;
+		qcom,mdss-dsi-lane-3-state;
+		qcom,mdss-dsi-dma-trigger = "trigger_sw";
+		qcom,mdss-dsi-mdp-trigger = "none";
+		qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
+		qcom,mdss-dsi-tx-eot-append;
+		qcom,adjust-timer-wakeup-ms = <1>;
+
+		qcom,mdss-dsi-wr-mem-start = <0x2c>;
+		qcom,mdss-dsi-wr-mem-continue = <0x3c>;
+		qcom,spr-pack-type = "pentile";
+		qcom,mdss-dsi-display-timings {
+			timing@0 {
+				cell-index = <0>;
+				qcom,mdss-dsi-panel-framerate = <120>;
+				qcom,mdss-dsi-panel-width = <1440>;
+				qcom,mdss-dsi-panel-height = <3200>;
+				qcom,mdss-dsi-h-front-porch = <100>;
+				qcom,mdss-dsi-h-back-porch = <20>;
+				qcom,mdss-dsi-h-pulse-width = <20>;
+				qcom,mdss-dsi-h-sync-skew = <0>;
+				qcom,mdss-dsi-v-back-porch = <20>;
+				qcom,mdss-dsi-v-front-porch = <44>;
+				qcom,mdss-dsi-v-pulse-width = <2>;
+				qcom,mdss-dsi-h-left-border = <0>;
+				qcom,mdss-dsi-h-right-border = <0>;
+				qcom,mdss-dsi-v-top-border = <0>;
+				qcom,mdss-dsi-v-bottom-border = <0>;
+
+				qcom,mdss-dsc-version = <0x12>;
+				qcom,src-chroma-format = <1>;
+
+				qcom,mdss-dsi-on-command = [
+					39 01 00 00 00 00 06 F0 55 AA 52 08 00
+					39 01 00 00 00 00 02 C2 81
+					39 01 00 00 00 00 06 F0 55 AA 52 08 03
+					39 01 00 00 00 00 02 C6 A2
+					39 01 00 00 00 00 06 F0 55 AA 52 08 05
+					39 01 00 00 00 00 02 6F 08
+					39 01 00 00 00 00 06 EC 10 00 00 00 FF
+					39 01 00 00 00 00 02 17 01
+					39 01 00 00 00 00 05 3B 00 14 00 2C
+					39 01 00 00 00 00 06 F0 55 AA 52 08 01
+					39 01 00 00 00 00 02 C3 19
+					39 01 00 00 00 00 02 6F 01
+					39 01 00 00 00 00 04 C5 0B 0B 0B
+					39 01 00 00 00 00 05 FF AA 55 A5 80
+					39 01 00 00 00 00 02 6F 02
+					39 01 00 00 00 00 02 F5 10
+					39 01 00 00 00 00 02 6F 1B
+					39 01 00 00 00 00 02 F4 55
+					39 01 00 00 00 00 02 6F 18
+					39 01 00 00 00 00 02 F8 19
+					39 01 00 00 00 00 02 6F 0F
+					39 01 00 00 00 00 02 FC 00
+					39 01 00 00 00 00 05 2A 00 00 05 9F
+					39 01 00 00 00 00 05 2B 00 00 0C 7F
+					39 01 00 00 00 00 03 90 03 03
+					39 01 00 00 00 00 13 91 89 28 00 28 D2
+					   00 02 86 04 3A 00 0A 02 AB 01 E9 10
+					   F0
+					39 01 00 00 00 00 02 6F 06
+					39 01 00 00 00 00 02 F3 DC
+					39 01 00 00 00 00 02 26 00
+					39 01 00 00 00 00 02 35 00
+					39 01 00 00 00 00 02 53 20
+					39 01 00 00 00 00 07 51 07 FF 07 FF 0F
+					   FF
+					39 01 00 00 00 00 02 5A 01
+					39 01 00 00 00 00 02 5F 00
+					39 01 00 00 00 00 02 9C 01
+					05 01 00 00 00 00 01 2C
+					39 01 00 00 00 00 02 2f 00
+					39 01 00 00 00 00 06 F0 55 AA 52 08 01
+					39 01 00 00 00 00 05 B2 55 01 FF 03
+
+					39 01 00 00 00 00 06 F0 55 AA 52 08 03
+					39 01 00 00 00 00 02 6F 08
+					39 01 00 00 00 00 02 DE 00
+					39 01 00 00 00 00 02 6F 09
+					39 01 00 00 00 00 07 DE 10 34 25 30 14 25
+					39 01 00 00 00 00 05 FF AA 55 A5 81
+					39 01 00 00 00 00 02 6F 1D
+					39 01 00 00 00 00 02 FB 6F
+
+					39 01 00 00 00 00 06 F0 55 AA 52 08 07
+					39 01 00 00 00 00 02 B0 24
+					39 01 00 00 00 00 02 03 10
+
+					05 01 00 00 78 00 01 11
+					05 01 00 00 14 00 01 29
+				];
+
+				qcom,mdss-dsi-off-command = [
+					05 01 00 00 14 00 02 28 00
+					05 01 00 00 78 00 02 10 00];
+				qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+				qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
+				qcom,mdss-dsi-h-sync-pulse = <0>;
+				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
+				qcom,mdss-dsc-slice-height = <40>;
+				qcom,mdss-dsc-slice-width = <720>;
+				qcom,mdss-dsc-slice-per-pkt = <1>;
+				qcom,mdss-dsc-bit-per-component = <8>;
+				qcom,mdss-dsc-bit-per-pixel = <8>;
+				qcom,mdss-dsc-block-prediction-enable;
+			};
+		};
+	};
+};
diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi
index 483359ec..fe387ae4 100644
--- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi
+++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi
@@ -33,6 +33,20 @@
 		qcom,mdss-dsi-wr-mem-start = <0x2c>;
 		qcom,mdss-dsi-wr-mem-continue = <0x3c>;
 		qcom,spr-pack-type = "pentile";
+		/*
+		 * ###############################################################
+		 * # Pentile SPR phases for SM8750 and later
+		 * ###############################################################
+		 * # RG/BG Type A    BG/RG Type A    GR/GB Type A    GB/GR Type A
+		 * # R B R B ...     B R B R ...      R B R B ...     B R B R ...
+		 * #  G G G G ...     G G G G ...    G G G G ...     G G G G ...
+		 * #
+		 * # RG/BG Type B    BG/RG Type B    GR/GB Type B    GB/GR Type B
+		 * #  G G G G ...     G G G G ...    G G G G ...     G G G G ...
+		 * # R B R B ...     B R B R ...      R B R B ...     B R B R ...
+		 * ###############################################################
+		 */
+		qcom,spr-pentile-pack-type = "RG-BG Type A";
 		qcom,mdss-dsi-display-timings {
 			timing@0 {
 				cell-index = <0>;
@@ -110,6 +124,7 @@
 				qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi
index 979693ae..b90133b6 100644
--- a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi
+++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi
@@ -131,6 +131,7 @@
 					"dsi_hs_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi
index 841f1ee0..c665564d 100644
--- a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi
+++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi
@@ -130,6 +130,7 @@
 					"dsi_hs_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi
index af59a3fb..4992feb5 100644
--- a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi
+++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi
@@ -113,6 +113,7 @@
 				qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi
index 7da07c60..061be26c 100644
--- a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi
+++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi
@@ -112,6 +112,7 @@
 				qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
 				qcom,mdss-dsi-h-sync-pulse = <0>;
 				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-rc-override_v1;
 				qcom,mdss-dsc-slice-height = <40>;
 				qcom,mdss-dsc-slice-width = <720>;
 				qcom,mdss-dsc-slice-per-pkt = <1>;
diff --git a/display/sun-sde-display-cdp.dtsi b/display/sun-sde-display-cdp.dtsi
index 638c2fcb..2049962d 100644
--- a/display/sun-sde-display-cdp.dtsi
+++ b/display/sun-sde-display-cdp.dtsi
@@ -100,6 +100,19 @@
 	qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
 };
 
+&dsi_nt37801_amoled_vid_spr {
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <10>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,mdss-brightness-max-level = <8191>;
+	qcom,mdss-dsi-bl-inverted-dbv;
+	qcom,platform-reset-gpio = <&tlmm 98 0>;
+	qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
+};
+
 &dsi_nt37801_amoled_qsync_cmd {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
@@ -277,6 +290,7 @@
 			&dsi_nt37801_amoled_dsc_10b_video
 			&dsi_nt37801_amoled_video_cphy
 			&dsi_nt37801_amoled_cmd_spr
+			&dsi_nt37801_amoled_vid_spr
 			&dsi_nt37801_amoled_qsync_cmd
 			&dsi_nt37801_amoled_qsync_video
 			&dsi_nt37801_amoled_fhd_plus_cmd
@@ -292,6 +306,7 @@
 			&dsi_nt37801_amoled_cmd_cphy
 			&dsi_nt37801_amoled_video
 			&dsi_nt37801_amoled_video_cphy
-			&dsi_nt37801_amoled_cmd_spr>;
+			&dsi_nt37801_amoled_cmd_spr
+			&dsi_nt37801_amoled_vid_spr>;
 	};
 };
diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi
index 4c366e75..c8c82641 100644
--- a/display/sun-sde-display-common.dtsi
+++ b/display/sun-sde-display-common.dtsi
@@ -10,6 +10,7 @@
 #include "dsi-panel-nt37801-dsc-10bit-cmd.dtsi"
 #include "dsi-panel-nt37801-dsc-10bit-video.dtsi"
 #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi"
+#include "dsi-panel-nt37801-dsc-wqhd-plus-video-spr.dtsi"
 #include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi"
 #include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi"
 #include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi"
@@ -385,36 +386,22 @@
 		};
 
 		timing@2 {
-			qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1f 06
-					06 06 06 02 04 13 0b];
+			qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
+					0b 0a 02 04 00 21 0f];
 			qcom,display-topology = <2 2 1>;
 			qcom,default-topology-index = <0>;
 		};
 
 		timing@3 {
-			qcom,mdss-dsi-panel-phy-timings = [00 11 03 04 12 1e 04
-					04 04 03 02 04 0e 09];
+			qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
+					0b 0a 02 04 00 21 0f];
 			qcom,display-topology = <2 2 1>;
 			qcom,default-topology-index = <0>;
 		};
 
 		timing@4 {
-			qcom,mdss-dsi-panel-phy-timings = [00 0d 03 03 10 1d 03
-					03 03 02 02 04 0c 08];
-			qcom,display-topology = <2 2 1>;
-			qcom,default-topology-index = <0>;
-		};
-
-		timing@5 {
-			qcom,mdss-dsi-panel-phy-timings = [00 0c 02 02 10 1c 03
-					03 03 02 02 04 0b 08];
-			qcom,display-topology = <2 2 1>;
-			qcom,default-topology-index = <0>;
-		};
-
-		timing@6 {
-			qcom,mdss-dsi-panel-phy-timings = [00 0a 02 02 0f 1c 02
-					02 02 02 02 04 0a 07];
+			qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
+					0b 0a 02 04 00 21 0f];
 			qcom,display-topology = <2 2 1>;
 			qcom,default-topology-index = <0>;
 		};
@@ -564,6 +551,26 @@
 	};
 };
 
+&dsi_nt37801_amoled_vid_spr {
+	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
+	qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
+	qcom,esd-check-enabled;
+	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
+	qcom,mdss-dsi-panel-status-value = <0x9c>;
+	qcom,mdss-dsi-panel-status-read-length = <1>;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
+					0b 0a 02 04 00 21 0f];
+			qcom,display-topology = <2 2 1>;
+			qcom,default-topology-index = <0>;
+		};
+	};
+};
+
 &dsi_nt37801_amoled_qsync_cmd {
 	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
 	qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
diff --git a/display/sun-sde-display-mtp.dtsi b/display/sun-sde-display-mtp.dtsi
index a9814173..baa362b2 100644
--- a/display/sun-sde-display-mtp.dtsi
+++ b/display/sun-sde-display-mtp.dtsi
@@ -97,6 +97,16 @@
 	qcom,platform-reset-gpio = <&tlmm 98 0>;
 };
 
+&dsi_nt37801_amoled_vid_spr {
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <10>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,mdss-brightness-max-level = <8191>;
+	qcom,mdss-dsi-bl-inverted-dbv;
+	qcom,platform-reset-gpio = <&tlmm 98 0>;
+};
+
 &dsi_nt37801_amoled_qsync_cmd {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
@@ -264,6 +274,7 @@
 			&dsi_nt37801_amoled_dsc_10b_cmd
 			&dsi_nt37801_amoled_dsc_10b_video
 			&dsi_nt37801_amoled_cmd_spr
+			&dsi_nt37801_amoled_vid_spr
 			&dsi_nt37801_amoled_qsync_cmd
 			&dsi_nt37801_amoled_qsync_video
 			&dsi_nt37801_amoled_fhd_plus_cmd
@@ -277,5 +288,6 @@
 				&dsi_nt37801_amoled_cmd_cphy
 				&dsi_nt37801_amoled_video
 				&dsi_nt37801_amoled_video_cphy
-				&dsi_nt37801_amoled_cmd_spr>;
+				&dsi_nt37801_amoled_cmd_spr
+				&dsi_nt37801_amoled_vid_spr>;
 };
diff --git a/display/sun-sde-display.dtsi b/display/sun-sde-display.dtsi
index 4ca8588d..c779d0fd 100644
--- a/display/sun-sde-display.dtsi
+++ b/display/sun-sde-display.dtsi
@@ -191,16 +191,6 @@
 			qcom,partial-update-enabled = "single_roi";
 			qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
 		};
-
-		timing@5 {
-			qcom,partial-update-enabled = "single_roi";
-			qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
-		};
-
-		timing@6 {
-			qcom,partial-update-enabled = "single_roi";
-			qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
-		};
 	};
 };
 
@@ -252,6 +242,15 @@
 	};
 };
 
+&dsi_nt37801_amoled_cmd_spr {
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			qcom,partial-update-enabled = "single_roi";
+			qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
+		};
+	};
+};
+
 &dsi_sharp_4k_dsc_cmd {
 	qcom,ulps-enabled;
 };
@@ -265,7 +264,7 @@
 		};
 
 		timing@2 { /* FHD 60FPS cmd mode*/
-			qcom,panel-roi-alignment = <540 40 540 40 540 40>;
+			qcom,panel-roi-alignment = <540 20 540 20 540 20>;
 			qcom,partial-update-enabled = "single_roi";
 		};
 
diff --git a/display/trustedvm-sun-sde-display-cdp.dtsi b/display/trustedvm-sun-sde-display-cdp.dtsi
index 24679ff3..13d89f62 100644
--- a/display/trustedvm-sun-sde-display-cdp.dtsi
+++ b/display/trustedvm-sun-sde-display-cdp.dtsi
@@ -63,6 +63,15 @@
 	qcom,platform-reset-gpio = <&tlmm 98 0>;
 };
 
+&dsi_nt37801_amoled_vid_spr {
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <10>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,mdss-brightness-max-level = <8191>;
+	qcom,mdss-dsi-bl-inverted-dbv;
+	qcom,platform-reset-gpio = <&tlmm 98 0>;
+};
+
 &dsi_vtdr6130_amoled_120hz_video {
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
 	qcom,mdss-dsi-bl-min-level = <10>;
@@ -158,7 +167,8 @@
 			&dsi_nt37801_amoled_video
 			&dsi_nt37801_amoled_dsc_10b_video
 			&dsi_nt37801_amoled_video_cphy
-			&dsi_nt37801_amoled_cmd_spr>;
+			&dsi_nt37801_amoled_cmd_spr
+			&dsi_nt37801_amoled_vid_spr>;
 	};
 };
 
@@ -169,6 +179,7 @@
 			&dsi_nt37801_amoled_cmd_cphy
 			&dsi_nt37801_amoled_video
 			&dsi_nt37801_amoled_video_cphy
-			&dsi_nt37801_amoled_cmd_spr>;
+			&dsi_nt37801_amoled_cmd_spr
+			&dsi_nt37801_amoled_vid_spr>;
 	};
 };
diff --git a/display/trustedvm-sun-sde-display-mtp.dtsi b/display/trustedvm-sun-sde-display-mtp.dtsi
index eda8e972..d762f789 100644
--- a/display/trustedvm-sun-sde-display-mtp.dtsi
+++ b/display/trustedvm-sun-sde-display-mtp.dtsi
@@ -32,6 +32,15 @@
 	qcom,platform-reset-gpio = <&tlmm 98 0>;
 };
 
+&dsi_nt37801_amoled_vid_spr {
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <10>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,mdss-brightness-max-level = <8191>;
+	qcom,mdss-dsi-bl-inverted-dbv;
+	qcom,platform-reset-gpio = <&tlmm 98 0>;
+};
+
 &dsi_sim_panel_au {
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
 	qcom,mdss-dsi-bl-min-level = <10>;
@@ -84,6 +93,7 @@
 			&dsi_nt37801_amoled_video
 			&dsi_nt37801_amoled_video_cphy
 			&dsi_nt37801_amoled_dsc_10b_video
-			&dsi_nt37801_amoled_cmd_spr>;
+			&dsi_nt37801_amoled_cmd_spr
+			&dsi_nt37801_amoled_vid_spr>;
 	};
 };