From 7168896a72f69cb907b4ef791b998deda4cf3897 Mon Sep 17 00:00:00 2001
From: Melody Olvera <quic_molvera@quicinc.com>
Date: Mon, 10 Jul 2023 16:38:17 -0700
Subject: [PATCH 1/2] dt-bindings: soc: qcom: Add documnetation for EUD

Add documnetation for msm EUD driver.

Change-Id: I54d5230b646a2fd57e83cfddceea74dcc5a7e890
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
---
 bindings/soc/qcom/qcom,msm-eud.yaml | 67 +++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 bindings/soc/qcom/qcom,msm-eud.yaml

diff --git a/bindings/soc/qcom/qcom,msm-eud.yaml b/bindings/soc/qcom/qcom,msm-eud.yaml
new file mode 100644
index 00000000..81a4d3b3
--- /dev/null
+++ b/bindings/soc/qcom/qcom,msm-eud.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/soc/qcom/qcom,msm-eud.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies Inc Embedded USB Debugger (EUD)
+
+maintainers:
+  - Prakruthi Deepak Heragu <quic_pheragu@quicinc.com>
+
+description: |+
+  The EUD (Embedded USB Debugger) is a mini-USB hub implemented
+  on chip to support the USB-based debug and trace capabilities.
+
+properties:
+  compatible:
+    - const: qcom,msm-eud
+
+  reg:
+    items:
+      - description: address and size of EUD register space
+      - description: address and size of EUD mode manager space for secure EUD
+
+  reg-names:
+    items:
+      - const: eud_base
+      - const: eud_mode_mgr2
+
+  interrupts:
+    maxItems: 1
+
+  interrupt-names:
+    const: eud_irq
+
+  qcom,secure-eud-en:
+    description: enable secure eud
+
+  qcom,eud-clock-vote-req:
+    description: enable clock voting from eud
+
+  qcom,eud-utmi-delay:
+    description: override default UTMI switch delay
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - interrupts
+  - interrupt-names
+
+example:
+  - |
+    eud: qcom,msm-eud@88e0000 {
+       compatible = "qcom,msm-eud";
+       interrupt-names = "eud_irq";
+       interrupts = <GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH>;
+       reg = <0x88e0000 0x4000>;
+       reg-names = "eud_base";
+    };
+
+client-example:
+  - |
+    usb3 {
+       extcon = <&eud>;
+    };
+...

From 8261384c4a6e31b8c7a11724d71724aa453cc211 Mon Sep 17 00:00:00 2001
From: Melody Olvera <quic_molvera@quicinc.com>
Date: Wed, 9 Aug 2023 16:29:37 -0700
Subject: [PATCH 2/2] ARM: dts: msm: sun: Add EUD node for sun SoC

Add EUD node for sun SoC.

Change-Id: If4105edc4c0426eab5168ed256d10ed28cfaa889
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
---
 qcom/sun.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index 942ae0cb..d8ff5abf 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -279,6 +279,17 @@
 		};
 	};
 
+	eud: qcom,msm-eud@88e0000 {
+		compatible = "qcom,msm-eud";
+		interrupt-names = "eud_irq";
+		interrupts = <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x88e0000 0x2000>,
+			<0x88e2000 0x1000>;
+		reg-names = "eud_base", "eud_mode_mgr2";
+		qcom,secure-eud-en;
+		status = "ok";
+	};
+
 	cache-controller@24800000 {
 		compatible = "qcom,sun-llcc";
 		reg = <0x24800000 0x2000000> , <0x26800000 0x200000>;