From 2e42dfc11e143d6349d4537dd5a7b4f8391d23a7 Mon Sep 17 00:00:00 2001
From: Fenglin Wu <quic_fenglinw@quicinc.com>
Date: Mon, 9 Dec 2024 18:55:16 +0800
Subject: [PATCH 01/22] ARM: dts: qcom: add pmd802x device node in debug SPMI
 bus

Add pmd802x device node in debug SPMI bus so that it can get populated
and exported in regmap debugfs node for debug purpose.

Change-Id: I7ea3cc95064283a82bbf44997ec25df1e8bf1edf
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
 qcom/tuna-pmih010x.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/qcom/tuna-pmih010x.dtsi b/qcom/tuna-pmih010x.dtsi
index f2ac1b7d..9a2c279a 100644
--- a/qcom/tuna-pmih010x.dtsi
+++ b/qcom/tuna-pmih010x.dtsi
@@ -35,6 +35,14 @@
 };
 
 &spmi0_debug_bus {
+	qcom,pmd802x-debug@4 {
+		compatible = "qcom,spmi-pmic";
+		reg = <4 SPMI_USID>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+		qcom,can-sleep;
+	};
+
 	qcom,pmih010x-debug@7 {
 		compatible = "qcom,spmi-pmic";
 		reg = <7 SPMI_USID>;

From 05552150e8b3bfa73cb90b55b0b0347ce72bf4e9 Mon Sep 17 00:00:00 2001
From: Tingguo Cheng <quic_tingguoc@quicinc.com>
Date: Mon, 16 Dec 2024 12:55:27 +0800
Subject: [PATCH 02/22] ARM: dts: msm: update haptics device settings for Tuna
 QRD platform

Update voltage and resonant frequency for the vibrator used on Tuna QRD.

Change-Id: Ia97af1405dda1e7432e2297d9feeb8982353ba15
Signed-off-by: Tingguo Cheng <quic_tingguoc@quicinc.com>
---
 qcom/tuna-pmih010x.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qcom/tuna-pmih010x.dtsi b/qcom/tuna-pmih010x.dtsi
index 53203c9b..f201fd4c 100644
--- a/qcom/tuna-pmih010x.dtsi
+++ b/qcom/tuna-pmih010x.dtsi
@@ -69,6 +69,8 @@
 };
 
 &pmih010x_haptics {
+	qcom,vmax-mv = <1700>;
+	qcom,lra-period-us = <5880>;
 	nvmem-names = "hap_cfg_sdam";
 	nvmem = <&pmk8550_sdam_46>;
 };

From c4b2a48bd1cf7ac7d2091f2bd5432981e72078a2 Mon Sep 17 00:00:00 2001
From: Varshitha H N <quic_vhn@quicinc.com>
Date: Mon, 1 Jul 2024 12:41:35 +0530
Subject: [PATCH 03/22] dt-bindings: power: Add bindings for schgm-flash driver

Add devicetree bindings for the schgm-flash driver.

Change-Id: Id9da37b6dd5a33f1d6028007237d2e4fc763534c
Signed-off-by: Varshitha H N <quic_vhn@quicinc.com>
---
 bindings/power/supply/qcom,schgm-flash.yaml | 96 +++++++++++++++++++++
 1 file changed, 96 insertions(+)
 create mode 100644 bindings/power/supply/qcom,schgm-flash.yaml

diff --git a/bindings/power/supply/qcom,schgm-flash.yaml b/bindings/power/supply/qcom,schgm-flash.yaml
new file mode 100644
index 00000000..a3748d9f
--- /dev/null
+++ b/bindings/power/supply/qcom,schgm-flash.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/supply/qcom,schgm-flash.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. schgm_flash driver
+
+maintainers:
+  - Rakesh Kota <quic_kotarake@quicinc.com>
+
+description: |
+  Add support for SCHGM_FLASH module under charger.
+  SCHGM_FLASH module handles flash failure, de-rating and
+  allows configuration for different flash features.
+
+properties:
+  compatible:
+    const: qcom,schgm-flash
+
+  reg:
+    description: |
+      Address and size of the peripheral's register block.
+
+  interrupts:
+    description: |
+      Peripheral interrupt specifier.
+
+  interrupt-names:
+    description: |
+      Interrupt names.  This list must match up 1-to-1 with the
+      interrupts specified in the 'interrupts' property.
+
+  qcom,flash-derating-soc:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      SOC threshold in percentage below which hardware will start
+      derating flash. This is only applicable to certain PMICs like
+      PMI632 which has SCHGM_FLASH peripheral.
+
+  qcom,flash-disable-soc:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      SOC threshold in percentage below which hardware will disable
+      flash. This is only applicable to certain PMICs like PMI632
+      which has SCHGM_FLASH peripheral.
+
+  qcom,headroom-mode:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      Specifies flash hardware headroom management policy.
+      possible values are
+      0 - Fixed mode, constant 5V at flash input.
+      1 - Adaptive mode allows charger output voltage to be
+          dynamically controlled by the flash module based on the
+          required flash headroom.
+      This is only applicable to certain PMICs like PMI632 which
+      has SCHGM_FLASH peripheral.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-names
+
+allOf:
+  - $ref: power-supply.yaml#
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    qcom,schgm-flash@a600 {
+            compatible = "qcom,schgm-flash";
+            reg = <0xa600 0x100>;
+            interrupts = <0x2 0xa6 0x0 IRQ_TYPE_NONE>,
+                         <0x2 0xa6 0x1 IRQ_TYPE_NONE>,
+                         <0x2 0xa6 0x2 IRQ_TYPE_NONE>,
+                         <0x2 0xa6 0x3 IRQ_TYPE_NONE>,
+                         <0x2 0xa6 0x4 IRQ_TYPE_NONE>,
+                         <0x2 0xa6 0x5 IRQ_TYPE_NONE>,
+                         <0x2 0xa6 0x6 IRQ_TYPE_NONE>,
+                         <0x2 0xa6 0x7 IRQ_TYPE_NONE>;
+
+            interrupt-names =	"flash-en",
+                                "torch-req",
+                                "flash-state-change",
+                                "vout-up",
+                                "vout-down",
+                                "ilim1-s1",
+                                "ilim2-s2",
+                                "vreg-ok";
+    };
+...

From d88427773d41982e93660d239f980758815022bd Mon Sep 17 00:00:00 2001
From: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
Date: Tue, 19 Nov 2024 20:46:46 -0800
Subject: [PATCH 04/22] ARM: dts: msm: add changes for q2spi 4mA drive strength

During Airplane mode testing with BT, UWB and PCIE concurrent
test scenarios, due to pcie traffic signal tolerance issue seen
on q2spi signals. As per the recommendation from design team
decreasing current drive strength from 6mA to 4mA for q2spi
active state GPIO configuration.

Change-Id: I530dfd636e834c4d6eb1e067e8dcb76dcfa4ab87
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
---
 qcom/sun-pinctrl.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/qcom/sun-pinctrl.dtsi b/qcom/sun-pinctrl.dtsi
index ece6e0b7..c24265b0 100644
--- a/qcom/sun-pinctrl.dtsi
+++ b/qcom/sun-pinctrl.dtsi
@@ -2813,7 +2813,7 @@
 
 			config {
 				pins = "gpio20";
-				drive-strength = <6>;
+				drive-strength = <4>;
 				bias-disable;
 			};
 		};
@@ -2826,7 +2826,7 @@
 
 			config {
 				pins = "gpio21";
-				drive-strength = <6>;
+				drive-strength = <4>;
 				bias-pull-down;
 			};
 		};
@@ -2839,7 +2839,7 @@
 
 			config {
 				pins = "gpio22";
-				drive-strength = <6>;
+				drive-strength = <4>;
 				bias-pull-down;
 			};
 		};
@@ -2852,7 +2852,7 @@
 
 			config {
 				pins = "gpio23";
-				drive-strength = <6>;
+				drive-strength = <4>;
 				bias-pull-down;
 			};
 		};

From c7ac0d1333210cae942112cce1eb939740fd20f9 Mon Sep 17 00:00:00 2001
From: kundan kumar <quic_kunkum@quicinc.com>
Date: Wed, 18 Dec 2024 09:11:07 +0530
Subject: [PATCH 05/22] ARM: dts: msm: enabling mem-object node for sdxkova

Enable mem-object node and heap buf.

Change-Id: I00dae06164ab2893a23ce3b54c9f4c0984c0d56c
Signed-off-by: kundan kumar <quic_kunkum@quicinc.com>
---
 qcom/sdxkova-dma-heaps.dtsi | 31 +++++++++++++++++++++++++++++++
 qcom/sdxkova.dtsi           | 35 +++++++++++++++++++++++++++++++++--
 2 files changed, 64 insertions(+), 2 deletions(-)
 create mode 100644 qcom/sdxkova-dma-heaps.dtsi

diff --git a/qcom/sdxkova-dma-heaps.dtsi b/qcom/sdxkova-dma-heaps.dtsi
new file mode 100644
index 00000000..21cfefa3
--- /dev/null
+++ b/qcom/sdxkova-dma-heaps.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/arm/msm/qcom_dma_heap_dt_constants.h>
+
+&soc {
+	qcom,dma-heaps {
+		compatible = "qcom,dma-heaps";
+		depends-on-supply = <&scm>;
+
+		qcom,qseecom {
+			qcom,dma-heap-name = "qcom,qseecom";
+			qcom,dma-heap-type = <HEAP_TYPE_CMA>;
+			memory-region = <&qseecom_mem>;
+		};
+
+		qcom,qseecom_ta {
+			qcom,dma-heap-name = "qcom,qseecom-ta";
+			qcom,dma-heap-type = <HEAP_TYPE_CMA>;
+			memory-region = <&qseecom_ta_mem>;
+		};
+
+		qcom_audio: qcom,audio {
+			qcom,dma-heap-name = "qcom,audio";
+			qcom,dma-heap-type = <HEAP_TYPE_CARVEOUT>;
+			memory-region = <&audio_heap_mem>;
+		};
+	};
+};
diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi
index fc542c6e..6a83939d 100644
--- a/qcom/sdxkova.dtsi
+++ b/qcom/sdxkova.dtsi
@@ -11,7 +11,9 @@
 /delete-node/ &apps_smmu;
 /delete-node/ &tcsr_mutex;
 #include "msm-arm-smmu-sdxkova.dtsi"
-/{
+#include "sdxkova-dma-heaps.dtsi"
+
+/ {
 	qcom_tzlog: tz-log@14680720 {
 		compatible = "qcom,tz-log";
 		reg = <0x0 0x14680720 0x0 0x3000>;
@@ -20,6 +22,16 @@
 		hyplog-size-offset = <0x414>;
 	};
 
+	qcom,mem-buf {
+		compatible = "qcom,mem-buf";
+		qcom,mem-buf-capabilities = "supplier";
+		qcom,vmid = <3>;
+	};
+
+	qcom,mem-buf-msgq {
+		compatible = "qcom,mem-buf-msgq";
+	};
+
 	/delete-node/ timer;
 
 	arch_timer: timer {
@@ -45,6 +57,23 @@
 			size = <0x0 0x2000000>;
 			linux,cma-default;
 		};
+		qseecom_mem: qseecom_region {
+		compatible = "shared-dma-pool";
+		alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
+		reusable;
+		alignment = <0x0 0x400000>;
+		size = <0x0 0x800000>;
+		};
+
+		qseecom_ta_mem: qseecom_ta_region {
+		compatible = "shared-dma-pool";
+		alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
+		reusable;
+		alignment = <0x0 0x400000>;
+		size = <0x0 0x400000>;
+		};
+
+
 	};
 
 	soc: soc {
@@ -1248,7 +1277,9 @@
 	qcom_smcinvoke {
 		compatible = "qcom,smcinvoke";
 	};
-
+	qcom_mem_object {
+		compatible = "qcom,mem-object";
+	};
 };
 
 #include "sdxkova-regulators.dtsi"

From e622a7f68a655c6689d87f83aa015d3de1faeda4 Mon Sep 17 00:00:00 2001
From: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Date: Mon, 30 Dec 2024 15:52:05 +0530
Subject: [PATCH 06/22] ARM: dts: msm: Split platform related VM DTs for Kera

Split platform specific devicetree files for Kera TUIVM and OEMVM.

Change-Id: I687bc081579cd1545a5f560127417cde6c5e9790
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
---
 qcom/Makefile                                 | 20 ++++++----
 ...mvm-cdp.dts => kera-oemvm-cdp-qca6750.dts} |  4 +-
 ...m-cdp.dtsi => kera-oemvm-cdp-qca6750.dtsi} |  0
 qcom/kera-oemvm-mtp-qca6750.dts               | 16 ++++++++
 ...m-mtp.dtsi => kera-oemvm-mtp-qca6750.dtsi} |  0
 ...mvm-mtp.dts => kera-oemvm-mtp-wcn7750.dts} |  6 +--
 ...m-qrd.dtsi => kera-oemvm-mtp-wcn7750.dtsi} |  0
 ...mvm-qrd.dts => kera-oemvm-qrd-wcn7750.dts} |  4 +-
 ...m-rcm.dtsi => kera-oemvm-qrd-wcn7750.dtsi} |  0
 ...mvm-rcm.dts => kera-oemvm-rcm-qca6750.dts} |  6 +--
 ...m-qrd.dtsi => kera-oemvm-rcm-qca6750.dtsi} |  0
 qcom/kera-oemvm-rcm-wcn7750.dts               | 16 ++++++++
 ...m-rcm.dtsi => kera-oemvm-rcm-wcn7750.dtsi} |  0
 ...era-vm-cdp.dts => kera-vm-cdp-qca6750.dts} |  4 +-
 ...a-vm-cdp.dtsi => kera-vm-cdp-qca6750.dtsi} |  0
 qcom/kera-vm-mtp-qca6750.dts                  | 16 ++++++++
 ...a-vm-mtp.dtsi => kera-vm-mtp-qca6750.dtsi} |  0
 ...era-vm-mtp.dts => kera-vm-mtp-wcn7750.dts} |  6 +--
 qcom/kera-vm-mtp-wcn7750.dtsi                 | 30 ++++++++++++++
 ...era-vm-qrd.dts => kera-vm-qrd-wcn7750.dts} |  4 +-
 qcom/kera-vm-qrd-wcn7750.dtsi                 |  7 ++++
 ...era-vm-rcm.dts => kera-vm-rcm-qca6750.dts} |  6 +--
 qcom/kera-vm-rcm-qca6750.dtsi                 |  7 ++++
 qcom/kera-vm-rcm-wcn7750.dts                  | 16 ++++++++
 qcom/kera-vm-rcm-wcn7750.dtsi                 |  7 ++++
 qcom/platform_map.bzl                         | 40 +++++++++++--------
 26 files changed, 171 insertions(+), 44 deletions(-)
 rename qcom/{kera-oemvm-cdp.dts => kera-oemvm-cdp-qca6750.dts} (76%)
 rename qcom/{kera-oemvm-cdp.dtsi => kera-oemvm-cdp-qca6750.dtsi} (100%)
 create mode 100644 qcom/kera-oemvm-mtp-qca6750.dts
 rename qcom/{kera-oemvm-mtp.dtsi => kera-oemvm-mtp-qca6750.dtsi} (100%)
 rename qcom/{kera-oemvm-mtp.dts => kera-oemvm-mtp-wcn7750.dts} (59%)
 rename qcom/{kera-oemvm-qrd.dtsi => kera-oemvm-mtp-wcn7750.dtsi} (100%)
 rename qcom/{kera-oemvm-qrd.dts => kera-oemvm-qrd-wcn7750.dts} (75%)
 rename qcom/{kera-oemvm-rcm.dtsi => kera-oemvm-qrd-wcn7750.dtsi} (100%)
 rename qcom/{kera-oemvm-rcm.dts => kera-oemvm-rcm-qca6750.dts} (59%)
 rename qcom/{kera-vm-qrd.dtsi => kera-oemvm-rcm-qca6750.dtsi} (100%)
 create mode 100644 qcom/kera-oemvm-rcm-wcn7750.dts
 rename qcom/{kera-vm-rcm.dtsi => kera-oemvm-rcm-wcn7750.dtsi} (100%)
 rename qcom/{kera-vm-cdp.dts => kera-vm-cdp-qca6750.dts} (76%)
 rename qcom/{kera-vm-cdp.dtsi => kera-vm-cdp-qca6750.dtsi} (100%)
 create mode 100644 qcom/kera-vm-mtp-qca6750.dts
 rename qcom/{kera-vm-mtp.dtsi => kera-vm-mtp-qca6750.dtsi} (100%)
 rename qcom/{kera-vm-mtp.dts => kera-vm-mtp-wcn7750.dts} (59%)
 create mode 100644 qcom/kera-vm-mtp-wcn7750.dtsi
 rename qcom/{kera-vm-qrd.dts => kera-vm-qrd-wcn7750.dts} (76%)
 create mode 100644 qcom/kera-vm-qrd-wcn7750.dtsi
 rename qcom/{kera-vm-rcm.dts => kera-vm-rcm-qca6750.dts} (59%)
 create mode 100644 qcom/kera-vm-rcm-qca6750.dtsi
 create mode 100644 qcom/kera-vm-rcm-wcn7750.dts
 create mode 100644 qcom/kera-vm-rcm-wcn7750.dtsi

diff --git a/qcom/Makefile b/qcom/Makefile
index 4da30b34..a20c41b7 100644
--- a/qcom/Makefile
+++ b/qcom/Makefile
@@ -272,16 +272,20 @@ ifeq ($(CONFIG_ARCH_KERA), y)
 ifeq ($(CONFIG_ARCH_QTI_VM), y)
 kera_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += kera-vm-rumi.dtb \
 				kera-vm-atp.dtb \
-				kera-vm-cdp.dtb \
-				kera-vm-mtp.dtb \
-				kera-vm-qrd.dtb \
-				kera-vm-rcm.dtb \
+				kera-vm-cdp-qca6750.dtb \
+				kera-vm-mtp-qca6750.dtb \
+				kera-vm-mtp-wcn7750.dtb \
+				kera-vm-qrd-wcn7750.dtb \
+				kera-vm-rcm-qca6750.dtb \
+				kera-vm-rcm-wcn7750.dtb \
 				kera-oemvm-rumi.dtb \
 				kera-oemvm-atp.dtb \
-				kera-oemvm-cdp.dtb \
-				kera-oemvm-mtp.dtb \
-				kera-oemvm-qrd.dtb \
-				kera-oemvm-rcm.dtb
+				kera-oemvm-cdp-qca6750.dtb \
+				kera-oemvm-mtp-qca6750.dtb \
+				kera-oemvm-mtp-wcn7750.dtb \
+				kera-oemvm-qrd-wcn7750.dtb \
+				kera-oemvm-rcm-qca6750.dtb \
+				kera-oemvm-rcm-wcn7750.dtb
 dtb-y += $(kera_tuivm-dtb-y)
 endif
 endif
diff --git a/qcom/kera-oemvm-cdp.dts b/qcom/kera-oemvm-cdp-qca6750.dts
similarity index 76%
rename from qcom/kera-oemvm-cdp.dts
rename to qcom/kera-oemvm-cdp-qca6750.dts
index 0120d39e..df596081 100644
--- a/qcom/kera-oemvm-cdp.dts
+++ b/qcom/kera-oemvm-cdp-qca6750.dts
@@ -6,10 +6,10 @@
 /dts-v1/;
 
 #include "kera-oemvm.dtsi"
-#include "kera-oemvm-cdp.dtsi"
+#include "kera-oemvm-cdp-qca6750.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. Kera OEMVM CDP";
+	model = "Qualcomm Technologies, Inc. Kera OEMVM CDP + QCA6750";
 	compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap",
 			"qcom,cdp";
 
diff --git a/qcom/kera-oemvm-cdp.dtsi b/qcom/kera-oemvm-cdp-qca6750.dtsi
similarity index 100%
rename from qcom/kera-oemvm-cdp.dtsi
rename to qcom/kera-oemvm-cdp-qca6750.dtsi
diff --git a/qcom/kera-oemvm-mtp-qca6750.dts b/qcom/kera-oemvm-mtp-qca6750.dts
new file mode 100644
index 00000000..ddb014c0
--- /dev/null
+++ b/qcom/kera-oemvm-mtp-qca6750.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "kera-oemvm.dtsi"
+#include "kera-oemvm-mtp-qca6750.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera OEMVM MTP + QCA6750";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			 "qcom,mtp";
+	qcom,board-id = <0x10008 0>, <0x20008 0>, <0x30008 0>;
+};
diff --git a/qcom/kera-oemvm-mtp.dtsi b/qcom/kera-oemvm-mtp-qca6750.dtsi
similarity index 100%
rename from qcom/kera-oemvm-mtp.dtsi
rename to qcom/kera-oemvm-mtp-qca6750.dtsi
diff --git a/qcom/kera-oemvm-mtp.dts b/qcom/kera-oemvm-mtp-wcn7750.dts
similarity index 59%
rename from qcom/kera-oemvm-mtp.dts
rename to qcom/kera-oemvm-mtp-wcn7750.dts
index 8c35e062..06d8713d 100644
--- a/qcom/kera-oemvm-mtp.dts
+++ b/qcom/kera-oemvm-mtp-wcn7750.dts
@@ -6,11 +6,11 @@
 /dts-v1/;
 
 #include "kera-oemvm.dtsi"
-#include "kera-oemvm-mtp.dtsi"
+#include "kera-oemvm-mtp-wcn7750.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. Kera OEMVM MTP";
+	model = "Qualcomm Technologies, Inc. Kera OEMVM MTP + WCN7750";
 	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
 			"qcom,mtp";
-	qcom,board-id = <0x10008 0>, <0x10008 1>, <0x20008 0>, <0x20008 1>, <0x30008 0>, <0x30008 1>;
+	qcom,board-id = <0x10008 1>, <0x20008 1>, <0x30008 1>;
 };
diff --git a/qcom/kera-oemvm-qrd.dtsi b/qcom/kera-oemvm-mtp-wcn7750.dtsi
similarity index 100%
rename from qcom/kera-oemvm-qrd.dtsi
rename to qcom/kera-oemvm-mtp-wcn7750.dtsi
diff --git a/qcom/kera-oemvm-qrd.dts b/qcom/kera-oemvm-qrd-wcn7750.dts
similarity index 75%
rename from qcom/kera-oemvm-qrd.dts
rename to qcom/kera-oemvm-qrd-wcn7750.dts
index bbc32acd..a7d76ac8 100644
--- a/qcom/kera-oemvm-qrd.dts
+++ b/qcom/kera-oemvm-qrd-wcn7750.dts
@@ -6,10 +6,10 @@
 /dts-v1/;
 
 #include "kera-oemvm.dtsi"
-#include "kera-oemvm-qrd.dtsi"
+#include "kera-oemvm-qrd-wcn7750.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. Kera OEMVM QRD";
+	model = "Qualcomm Technologies, Inc. Kera OEMVM QRD + WCN7750";
 	compatible = "qcom,kera-qrd", "qcom,kera", "qcom,kerap-qrd", "qcom,kerap",
 			"qcom,qrd";
 	qcom,board-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>;
diff --git a/qcom/kera-oemvm-rcm.dtsi b/qcom/kera-oemvm-qrd-wcn7750.dtsi
similarity index 100%
rename from qcom/kera-oemvm-rcm.dtsi
rename to qcom/kera-oemvm-qrd-wcn7750.dtsi
diff --git a/qcom/kera-oemvm-rcm.dts b/qcom/kera-oemvm-rcm-qca6750.dts
similarity index 59%
rename from qcom/kera-oemvm-rcm.dts
rename to qcom/kera-oemvm-rcm-qca6750.dts
index e9e5cb10..4dd58893 100644
--- a/qcom/kera-oemvm-rcm.dts
+++ b/qcom/kera-oemvm-rcm-qca6750.dts
@@ -6,11 +6,11 @@
 /dts-v1/;
 
 #include "kera-oemvm.dtsi"
-#include "kera-oemvm-rcm.dtsi"
+#include "kera-oemvm-rcm-qca6750.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. Kera OEMVM RCM";
+	model = "Qualcomm Technologies, Inc. Kera OEMVM RCM + QCA6750";
 	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
 			"qcom,rcm";
-	qcom,board-id = <0x10015 0>, <0x10015 1>, <0x20015 0>, <0x20015 1>, <0x30015 0>, <0x30015 1>;
+	qcom,board-id = <0x10015 0>, <0x20015 0>, <0x30015 0>;
 };
diff --git a/qcom/kera-vm-qrd.dtsi b/qcom/kera-oemvm-rcm-qca6750.dtsi
similarity index 100%
rename from qcom/kera-vm-qrd.dtsi
rename to qcom/kera-oemvm-rcm-qca6750.dtsi
diff --git a/qcom/kera-oemvm-rcm-wcn7750.dts b/qcom/kera-oemvm-rcm-wcn7750.dts
new file mode 100644
index 00000000..fa68c4f6
--- /dev/null
+++ b/qcom/kera-oemvm-rcm-wcn7750.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "kera-oemvm.dtsi"
+#include "kera-oemvm-rcm-wcn7750.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera OEMVM RCM + WCN7750";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,board-id = <0x10015 1>, <0x20015 1>, <0x30015 1>;
+};
diff --git a/qcom/kera-vm-rcm.dtsi b/qcom/kera-oemvm-rcm-wcn7750.dtsi
similarity index 100%
rename from qcom/kera-vm-rcm.dtsi
rename to qcom/kera-oemvm-rcm-wcn7750.dtsi
diff --git a/qcom/kera-vm-cdp.dts b/qcom/kera-vm-cdp-qca6750.dts
similarity index 76%
rename from qcom/kera-vm-cdp.dts
rename to qcom/kera-vm-cdp-qca6750.dts
index 2505df90..09a2d95a 100644
--- a/qcom/kera-vm-cdp.dts
+++ b/qcom/kera-vm-cdp-qca6750.dts
@@ -6,10 +6,10 @@
 /dts-v1/;
 
 #include "kera-vm.dtsi"
-#include "kera-vm-cdp.dtsi"
+#include "kera-vm-cdp-qca6750.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. Kera SVM CDP";
+	model = "Qualcomm Technologies, Inc. Kera SVM CDP + QCA6750";
 	compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap",
 			"qcom,cdp";
 
diff --git a/qcom/kera-vm-cdp.dtsi b/qcom/kera-vm-cdp-qca6750.dtsi
similarity index 100%
rename from qcom/kera-vm-cdp.dtsi
rename to qcom/kera-vm-cdp-qca6750.dtsi
diff --git a/qcom/kera-vm-mtp-qca6750.dts b/qcom/kera-vm-mtp-qca6750.dts
new file mode 100644
index 00000000..e1f06d69
--- /dev/null
+++ b/qcom/kera-vm-mtp-qca6750.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "kera-vm.dtsi"
+#include "kera-vm-mtp-qca6750.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera SVM MTP + QCA6750";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			 "qcom,mtp";
+	qcom,board-id = <0x10008 0>, <0x20008 0>, <0x30008 0>;
+};
diff --git a/qcom/kera-vm-mtp.dtsi b/qcom/kera-vm-mtp-qca6750.dtsi
similarity index 100%
rename from qcom/kera-vm-mtp.dtsi
rename to qcom/kera-vm-mtp-qca6750.dtsi
diff --git a/qcom/kera-vm-mtp.dts b/qcom/kera-vm-mtp-wcn7750.dts
similarity index 59%
rename from qcom/kera-vm-mtp.dts
rename to qcom/kera-vm-mtp-wcn7750.dts
index 3a17f7fd..69ea7b6f 100644
--- a/qcom/kera-vm-mtp.dts
+++ b/qcom/kera-vm-mtp-wcn7750.dts
@@ -6,11 +6,11 @@
 /dts-v1/;
 
 #include "kera-vm.dtsi"
-#include "kera-vm-mtp.dtsi"
+#include "kera-vm-mtp-wcn7750.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. Kera SVM MTP";
+	model = "Qualcomm Technologies, Inc. Kera SVM MTP + WCN7750";
 	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
 			"qcom,mtp";
-	qcom,board-id = <0x10008 0>, <0x10008 1>, <0x20008 0>, <0x20008 1>, <0x30008 0>, <0x30008 1>;
+	qcom,board-id = <0x10008 1>, <0x20008 1>, <0x30008 1>;
 };
diff --git a/qcom/kera-vm-mtp-wcn7750.dtsi b/qcom/kera-vm-mtp-wcn7750.dtsi
new file mode 100644
index 00000000..10bb9113
--- /dev/null
+++ b/qcom/kera-vm-mtp-wcn7750.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+};
+
+&qupv3_se8_spi {
+	status = "ok";
+	goodix-berlin@0 {
+		compatible = "goodix,gt9916S";
+		reg = <0>;
+		spi-max-frequency = <1000000>;
+		goodix,panel-max-x = <1080>;
+		goodix,panel-max-y = <2400>;
+		goodix,panel-max-w = <255>;
+		goodix,panel-max-p = <4096>;
+		goodix,touch-type = "primary";
+		goodix,qts_en;
+		qts,trusted-touch-mode = "vm_mode";
+		qts,touch-environment = "tvm";
+		qts,trusted-touch-type = "primary";
+		qts,trusted-touch-spi-irq = <653>;
+		qts,trusted-touch-io-bases = <0xa90000>;
+		qts,trusted-touch-io-sizes = <0x1000>;
+		qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
+						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
+	};
+};
diff --git a/qcom/kera-vm-qrd.dts b/qcom/kera-vm-qrd-wcn7750.dts
similarity index 76%
rename from qcom/kera-vm-qrd.dts
rename to qcom/kera-vm-qrd-wcn7750.dts
index 2ec17d3a..a44f5697 100644
--- a/qcom/kera-vm-qrd.dts
+++ b/qcom/kera-vm-qrd-wcn7750.dts
@@ -6,10 +6,10 @@
 /dts-v1/;
 
 #include "kera-vm.dtsi"
-#include "kera-vm-qrd.dtsi"
+#include "kera-vm-qrd-wcn7750.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. Kera SVM QRD";
+	model = "Qualcomm Technologies, Inc. Kera SVM QRD + WCN7750";
 	compatible = "qcom,kera-qrd", "qcom,kera", "qcom,kerap-qrd", "qcom,kerap",
 			"qcom,qrd";
 	qcom,board-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>;
diff --git a/qcom/kera-vm-qrd-wcn7750.dtsi b/qcom/kera-vm-qrd-wcn7750.dtsi
new file mode 100644
index 00000000..1510613d
--- /dev/null
+++ b/qcom/kera-vm-qrd-wcn7750.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+};
diff --git a/qcom/kera-vm-rcm.dts b/qcom/kera-vm-rcm-qca6750.dts
similarity index 59%
rename from qcom/kera-vm-rcm.dts
rename to qcom/kera-vm-rcm-qca6750.dts
index 44db195e..984404c3 100644
--- a/qcom/kera-vm-rcm.dts
+++ b/qcom/kera-vm-rcm-qca6750.dts
@@ -6,11 +6,11 @@
 /dts-v1/;
 
 #include "kera-vm.dtsi"
-#include "kera-vm-rcm.dtsi"
+#include "kera-vm-rcm-qca6750.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. Kera SVM RCM";
+	model = "Qualcomm Technologies, Inc. Kera SVM RCM + QCA6750";
 	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
 			"qcom,rcm";
-	qcom,board-id = <0x10015 0>, <0x10015 1>, <0x20015 0>, <0x20015 1>, <0x30015 0>, <0x30015 1>;
+	qcom,board-id = <0x10015 0>, <0x20015 0>, <0x30015 0>;
 };
diff --git a/qcom/kera-vm-rcm-qca6750.dtsi b/qcom/kera-vm-rcm-qca6750.dtsi
new file mode 100644
index 00000000..1510613d
--- /dev/null
+++ b/qcom/kera-vm-rcm-qca6750.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+};
diff --git a/qcom/kera-vm-rcm-wcn7750.dts b/qcom/kera-vm-rcm-wcn7750.dts
new file mode 100644
index 00000000..774638fc
--- /dev/null
+++ b/qcom/kera-vm-rcm-wcn7750.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "kera-vm.dtsi"
+#include "kera-vm-rcm-wcn7750.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera SVM RCM + WCN7750";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,board-id = <0x10015 1>, <0x20015 1>, <0x30015 1>;
+};
diff --git a/qcom/kera-vm-rcm-wcn7750.dtsi b/qcom/kera-vm-rcm-wcn7750.dtsi
new file mode 100644
index 00000000..1510613d
--- /dev/null
+++ b/qcom/kera-vm-rcm-wcn7750.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+};
diff --git a/qcom/platform_map.bzl b/qcom/platform_map.bzl
index 41162b2f..2e9155e2 100644
--- a/qcom/platform_map.bzl
+++ b/qcom/platform_map.bzl
@@ -247,16 +247,20 @@ _platform_map = {
         "dtb_list": [
             # keep sorted
             {"name": "kera-oemvm-atp.dtb"},
-            {"name": "kera-oemvm-cdp.dtb"},
-            {"name": "kera-oemvm-mtp.dtb"},
-            {"name": "kera-oemvm-qrd.dtb"},
-            {"name": "kera-oemvm-rcm.dtb"},
+            {"name": "kera-oemvm-cdp-qca6750.dtb"},
+            {"name": "kera-oemvm-mtp-qca6750.dtb"},
+            {"name": "kera-oemvm-mtp-wcn7750.dtb"},
+            {"name": "kera-oemvm-qrd-wcn7750.dtb"},
+            {"name": "kera-oemvm-rcm-qca6750.dtb"},
+            {"name": "kera-oemvm-rcm-wcn7750.dtb"},
             {"name": "kera-oemvm-rumi.dtb"},
             {"name": "kera-vm-atp.dtb"},
-            {"name": "kera-vm-cdp.dtb"},
-            {"name": "kera-vm-mtp.dtb"},
-            {"name": "kera-vm-qrd.dtb"},
-            {"name": "kera-vm-rcm.dtb"},
+            {"name": "kera-vm-cdp-qca6750.dtb"},
+            {"name": "kera-vm-mtp-qca6750.dtb"},
+            {"name": "kera-vm-mtp-wcn7750.dtb"},
+            {"name": "kera-vm-qrd-wcn7750.dtb"},
+            {"name": "kera-vm-rcm-qca6750.dtb"},
+            {"name": "kera-vm-rcm-wcn7750.dtb"},
             {"name": "kera-vm-rumi.dtb"},
         ],
     },
@@ -264,16 +268,20 @@ _platform_map = {
         "dtb_list": [
             # keep sorted
             {"name": "kera-oemvm-atp.dtb"},
-            {"name": "kera-oemvm-cdp.dtb"},
-            {"name": "kera-oemvm-mtp.dtb"},
-            {"name": "kera-oemvm-qrd.dtb"},
-            {"name": "kera-oemvm-rcm.dtb"},
+            {"name": "kera-oemvm-cdp-qca6750.dtb"},
+            {"name": "kera-oemvm-mtp-qca6750.dtb"},
+            {"name": "kera-oemvm-mtp-wcn7750.dtb"},
+            {"name": "kera-oemvm-qrd-wcn7750.dtb"},
+            {"name": "kera-oemvm-rcm-qca6750.dtb"},
+            {"name": "kera-oemvm-rcm-wcn7750.dtb"},
             {"name": "kera-oemvm-rumi.dtb"},
             {"name": "kera-vm-atp.dtb"},
-            {"name": "kera-vm-cdp.dtb"},
-            {"name": "kera-vm-mtp.dtb"},
-            {"name": "kera-vm-qrd.dtb"},
-            {"name": "kera-vm-rcm.dtb"},
+            {"name": "kera-vm-cdp-qca6750.dtb"},
+            {"name": "kera-vm-mtp-qca6750.dtb"},
+            {"name": "kera-vm-mtp-wcn7750.dtb"},
+            {"name": "kera-vm-qrd-wcn7750.dtb"},
+            {"name": "kera-vm-rcm-qca6750.dtb"},
+            {"name": "kera-vm-rcm-wcn7750.dtb"},
             {"name": "kera-vm-rumi.dtb"},
         ],
     },

From 745b522e384fdcf1b7072a82349bff7a298ce85d Mon Sep 17 00:00:00 2001
From: songchai <quic_songchai@quicinc.com>
Date: Mon, 30 Dec 2024 21:45:33 -0800
Subject: [PATCH 07/22] ARM: dts: msm: enable some tpdms for kera

Enable some tpdms for kera.

Change-Id: I008a3e5d820c080c7d1ffeb8dec65595c2f781e7
Signed-off-by: Yingchao Deng <quic_yingdeng@quicinc.com>
Signed-off-by: songchai <quic_songchai@quicinc.com>
---
 qcom/kera-coresight.dtsi | 55 ++++++++++------------------------------
 1 file changed, 13 insertions(+), 42 deletions(-)

diff --git a/qcom/kera-coresight.dtsi b/qcom/kera-coresight.dtsi
index 4f0a45ca..0a904130 100644
--- a/qcom/kera-coresight.dtsi
+++ b/qcom/kera-coresight.dtsi
@@ -814,7 +814,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -836,7 +835,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -858,7 +856,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -880,7 +877,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -902,7 +898,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -931,7 +926,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		in-ports {
 			#address-cells = <1>;
@@ -999,7 +993,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -1021,7 +1014,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -1181,7 +1173,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -1280,7 +1271,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -1302,7 +1292,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -1526,7 +1515,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -1548,7 +1536,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -1614,7 +1601,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -2167,7 +2153,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		qcom,hw-enable-check;
 
@@ -2189,14 +2174,13 @@
 
 		coresight-name = "coresight-tpda-tmess";
 
-		qcom,dsb-elem-size = <0 32>;
+		qcom,dsb-elem-size = <2 64>;
 		qcom,cmb-elem-size = <0 32>,
 				     <1 32>,
 				     <2 64>;
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		in-ports {
 			#address-cells = <1>;
@@ -2653,7 +2637,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -2678,7 +2661,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		in-ports {
 			#address-cells = <1>;
@@ -2786,7 +2768,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -2843,7 +2824,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -2865,7 +2845,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3075,14 +3054,21 @@
 
 		coresight-name = "coresight-tpda-dlct";
 
-		qcom,cmb-elem-size = <0 32>,
-				     <1 32>,
+		qcom,dsb-elem-size = <0 32>,
 				     <2 32>,
-				     <3 32>;
+				     <5 32>,
+				     <15 32>,
+				     <17 32>,
+				     <26 32>;
+		qcom,cmb-elem-size = <2 32>,
+				     <3 32>,
+				     <6 32>,
+				     <18 32>,
+				     <23 32>,
+				     <27 64>;
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		in-ports {
 			#address-cells = <1>;
@@ -3273,8 +3259,6 @@
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
 
-		status = "disabled";
-
 		out-ports {
 			port {
 				tpdm_mm_dsb_out_tn_ag: endpoint {
@@ -3318,7 +3302,7 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
+
 		out-ports {
 			port {
 				tpdm_south_dsb_out_tn_ag: endpoint {
@@ -3339,7 +3323,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3361,7 +3344,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3449,7 +3431,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3471,7 +3452,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3810,7 +3790,6 @@
 		qcom,hw-enable-check;
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3832,7 +3811,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3857,7 +3835,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		in-ports {
 			#address-cells = <1>;
@@ -3901,7 +3878,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3923,7 +3899,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3945,7 +3920,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3967,7 +3941,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -3989,7 +3962,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		out-ports {
 			port {
@@ -4018,7 +3990,6 @@
 
 		clocks = <&aoss_qmp>;
 		clock-names = "apb_pclk";
-		status = "disabled";
 
 		in-ports {
 			#address-cells = <1>;

From 1ccd4eccd35e04f7f9450b3fc3a8aec8b01daaeb Mon Sep 17 00:00:00 2001
From: songchai <quic_songchai@quicinc.com>
Date: Fri, 27 Dec 2024 13:40:06 +0800
Subject: [PATCH 08/22] ARM: dts: msm: enable dcc for kera

Enable dcc for kera.

Change-Id: I81a206ed0c0869839e1bca7cf349b6a66ab047d4
Signed-off-by: songchai <quic_songchai@quicinc.com>
---
 qcom/kera-debug.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/qcom/kera-debug.dtsi b/qcom/kera-debug.dtsi
index da91ef64..008e38e9 100644
--- a/qcom/kera-debug.dtsi
+++ b/qcom/kera-debug.dtsi
@@ -22,7 +22,6 @@
 		reg = <0x100ff000 0x1000>,
 		      <0x10084000 0x4000>;
 
-		status = "disabled";
 		qcom,transaction_timeout = <0>;
 
 		reg-names = "dcc-base", "dcc-ram-base";

From 9c855d6ff7ac05a037b6ba227bd1d810ae4482da Mon Sep 17 00:00:00 2001
From: songchai <quic_songchai@quicinc.com>
Date: Thu, 26 Dec 2024 18:44:01 +0800
Subject: [PATCH 09/22] ARM: dts: msm: Correct etr interrupts for kera

Correct etr interrupts for kera.

Change-Id: Id47f2a0765ca43755a19f2627269a6241692262c
Signed-off-by: songchai <quic_songchai@quicinc.com>
---
 qcom/kera-coresight.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/qcom/kera-coresight.dtsi b/qcom/kera-coresight.dtsi
index 4f0a45ca..52548171 100644
--- a/qcom/kera-coresight.dtsi
+++ b/qcom/kera-coresight.dtsi
@@ -4353,7 +4353,7 @@
 		csr-irqctrl-offset = <0x6c>;
 		byte-cntr-name = "byte-cntr";
 		byte-cntr-class-name = "coresight-tmc-etr-stream";
-		interrupts = <GIC_SPI 738 IRQ_TYPE_EDGE_RISING>;
+		interrupts = <GIC_SPI 352 IRQ_TYPE_EDGE_RISING>;
 		interrupt-names = "byte-cntr-irq";
 
 		clocks = <&aoss_qmp>;
@@ -4386,7 +4386,7 @@
 		csr-irqctrl-offset = <0x70>;
 		byte-cntr-name = "byte-cntr1";
 		byte-cntr-class-name = "coresight-tmc-etr1-stream";
-		interrupts = <GIC_SPI 737 IRQ_TYPE_EDGE_RISING>;
+		interrupts = <GIC_SPI 362 IRQ_TYPE_EDGE_RISING>;
 		interrupt-names = "byte-cntr-irq";
 
 		clocks = <&aoss_qmp>;

From 1c0a6399d98a30a53d1c4564480c8ca86d916355 Mon Sep 17 00:00:00 2001
From: songchai <quic_songchai@quicinc.com>
Date: Mon, 30 Dec 2024 21:48:05 -0800
Subject: [PATCH 10/22] ARM: dts: msm: correct wpss funnel for kera

Correct wpss funnel for kera.

Change-Id: I495a6e2c3fb468355beea0a93c65a9732fe0daad
Signed-off-by: songchai <quic_songchai@quicinc.com>
---
 qcom/kera-coresight.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qcom/kera-coresight.dtsi b/qcom/kera-coresight.dtsi
index 4f0a45ca..7119bb99 100644
--- a/qcom/kera-coresight.dtsi
+++ b/qcom/kera-coresight.dtsi
@@ -1359,6 +1359,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			port@0 {
+				reg = <0>;
 				funnel_wpss_out_tpda_dlct_5: endpoint {
 					remote-endpoint =
 					<&tpda_dlct_5_in_funnel_wpss>;
@@ -1367,6 +1368,7 @@
 			};
 
 			port@1 {
+				reg = <1>;
 				funnel_wpss_out_tpda_dlct_6: endpoint {
 					remote-endpoint =
 					<&tpda_dlct_6_in_funnel_wpss>;

From 7f24fdfd7606c2901ca80bc48d66bf9e50ec70c1 Mon Sep 17 00:00:00 2001
From: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Date: Fri, 20 Dec 2024 14:20:02 +0530
Subject: [PATCH 11/22] ARM: dts: msm: Define maximum number of USB XHCI
 interrupters

DWC3 host and XHCI plat now communicates the maximum number of interrupters
the XHCI HCD will allocate.  Since platforms only require a limited number
of interrupters (i.e. 3) make sure XHCI doesn't allocate more than is
required.

Change-Id: I466748df07aba6d7bdc79c7b2b17b3a57c58d3d4
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
---
 qcom/kera-usb.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qcom/kera-usb.dtsi b/qcom/kera-usb.dtsi
index 92e1213a..e566d04b 100644
--- a/qcom/kera-usb.dtsi
+++ b/qcom/kera-usb.dtsi
@@ -83,6 +83,7 @@
 			snps,dis_u2_susphy_quirk;
 			snps,ssp-u3-u0-quirk;
 			tx-fifo-resize;
+			num-hc-interrupters = /bits/ 16 <3>;
 			dr_mode = "peripheral";
 			maximum-speed = "super-speed-plus";
 			usb-role-switch;

From 4f171bf25c56d08d7a32423aba57afb8e8bfcefd Mon Sep 17 00:00:00 2001
From: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Date: Fri, 20 Dec 2024 14:15:50 +0530
Subject: [PATCH 12/22] ARM: dts: msm: Enable UCSI nodes for kera USB

To support cable detection events from UCSI, updates need to be made
to enable usb role switch and setting up a connection to the UCSI PMIC
glink node.

Change-Id: Ic3a848f882072a766b3efb872f943dd3f4220ba1
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
---
 qcom/kera-usb.dtsi | 6 ++++++
 qcom/kera.dtsi     | 7 +++++++
 2 files changed, 13 insertions(+)

diff --git a/qcom/kera-usb.dtsi b/qcom/kera-usb.dtsi
index e566d04b..865e516f 100644
--- a/qcom/kera-usb.dtsi
+++ b/qcom/kera-usb.dtsi
@@ -88,6 +88,12 @@
 			maximum-speed = "super-speed-plus";
 			usb-role-switch;
 		};
+
+		port {
+			usb_port0: endpoint {
+				remote-endpoint = <&usb_port0_connector>;
+			};
+		};
 	};
 
 	dwc3_mem_region: dwc3_mem_region {
diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi
index d39d3fdf..d32191ff 100644
--- a/qcom/kera.dtsi
+++ b/qcom/kera.dtsi
@@ -2379,6 +2379,13 @@
 
 		ucsi: qcom,ucsi {
 			compatible = "qcom,ucsi-glink";
+			connector {
+				port {
+					usb_port0_connector: endpoint {
+					remote-endpoint = <&usb_port0>;
+					};
+				};
+			};
 		};
 
 		altmode: qcom,altmode {

From ed15e2b75982cda3b08eec507d91fe9d20abf5d7 Mon Sep 17 00:00:00 2001
From: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Date: Fri, 20 Dec 2024 14:17:52 +0530
Subject: [PATCH 13/22] ARM: dts: msm: Add usb-role-switch and eud on kera

This change will add usb-role-switch and eud in Kera.

Change-Id: I74ca8c0e19b45d925bcecc78e993439441339e20
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
---
 qcom/kera-usb.dtsi | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/qcom/kera-usb.dtsi b/qcom/kera-usb.dtsi
index 865e516f..89d7b69f 100644
--- a/qcom/kera-usb.dtsi
+++ b/qcom/kera-usb.dtsi
@@ -45,6 +45,9 @@
 		qcom,use-pdc-interrupts;
 		qcom,use-eusb2-phy;
 
+		extcon = <&eud>;
+		usb-role-switch;
+
 		interconnect-names = "usb-ddr", "usb-ipa", "ddr-usb";
 		interconnects = <&aggre1_noc MASTER_USB3_0 &mc_virt SLAVE_EBI1>,
 				<&aggre1_noc MASTER_USB3_0 &config_noc SLAVE_IPA_CFG>,
@@ -84,7 +87,7 @@
 			snps,ssp-u3-u0-quirk;
 			tx-fifo-resize;
 			num-hc-interrupters = /bits/ 16 <3>;
-			dr_mode = "peripheral";
+			dr_mode = "otg";
 			maximum-speed = "super-speed-plus";
 			usb-role-switch;
 		};

From 3b62a4c3382060f514b549534962d4beafd83425 Mon Sep 17 00:00:00 2001
From: Priyansh Jain <quic_priyjain@quicinc.com>
Date: Tue, 31 Dec 2024 10:30:34 +0530
Subject: [PATCH 14/22] ARM: dts: qcom: Add pmic die temp mitigation mapping
 for kera and tuna

Add pmic die temp mitigation mapping for kera and tuna.

Change-Id: I1ef3b8f4b775cd38b3c975ae47e4d90c640c30e1
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
---
 qcom/kera-thermal-overlay.dtsi | 196 +++++++++++++++++++++++++++++++++
 qcom/kera-thermal.dtsi         |   2 +-
 qcom/kera.dtsi                 |   2 +-
 qcom/tuna-thermal-overlay.dtsi |  56 ++++++++++
 4 files changed, 254 insertions(+), 2 deletions(-)
 create mode 100644 qcom/kera-thermal-overlay.dtsi

diff --git a/qcom/kera-thermal-overlay.dtsi b/qcom/kera-thermal-overlay.dtsi
new file mode 100644
index 00000000..aab92127
--- /dev/null
+++ b/qcom/kera-thermal-overlay.dtsi
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/thermal/thermal_qti.h>
+
+&thermal_zones {
+	pmxr2230_tz {
+		cooling-maps {
+			pmxr2230_cdsp {
+				trip = <&pmxr2230_trip0>;
+				cooling-device = <&cdsp_sw  5 THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+
+	pm8550vs_d_tz {
+		cooling-maps {
+			pm8550vs_d_cdsp {
+				trip = <&pm8550vs_d_trip0>;
+				cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
+			};
+
+			pm8550vs_d_apc1 {
+				trip = <&pm8550vs_d_trip0>;
+				cooling-device = <&APC1_MX_CX_PAUSE 1 1>;
+			};
+
+			pm8550vs_d_apc0 {
+				trip = <&pm8550vs_d_trip0>;
+				cooling-device = <&APC0_MX_CX_PAUSE 1 1>;
+			};
+
+			pm8550vs_d_lte {
+				trip = <&pm8550vs_d_trip0>;
+				cooling-device = <&modem_lte_dsc 255 255>;
+			};
+
+			pm8550vs_d_nr {
+				trip = <&pm8550vs_d_trip0>;
+				cooling-device = <&modem_nr_scg_dsc 255 255>;
+			};
+		};
+	};
+
+	pm8550vs_g_tz {
+		cooling-maps {
+			pm8550vs_g_gpu {
+				trip = <&pm8550vs_g_trip0>;
+				cooling-device = <&msm_gpu 7 THERMAL_NO_LIMIT>;
+			};
+
+			pm8550vs_g_apc1 {
+				trip = <&pm8550vs_g_trip0>;
+				cooling-device = <&APC1_MX_CX_PAUSE 1 1>;
+			};
+
+			pm8550vs_g_apc0 {
+				trip = <&pm8550vs_g_trip0>;
+				cooling-device = <&APC0_MX_CX_PAUSE 1 1>;
+			};
+		};
+	};
+
+	pmxr2230-bcl-lvl0 {
+		cooling-maps {
+			lbat_0_nr_scg {
+				trip = <&bcl_lvl0>;
+				cooling-device = <&modem_nr_scg_dsc 3 3>;
+			};
+
+			lbat_0_nr {
+				trip = <&bcl_lvl0>;
+				cooling-device = <&modem_nr_dsc 6 6>;
+			};
+
+			lbat_0_mdm_lte {
+				trip = <&bcl_lvl0>;
+				cooling-device = <&modem_lte_dsc 8 8>;
+			};
+
+			lbat_gpu0 {
+				trip = <&bcl_lvl0>;
+				cooling-device = <&msm_gpu 2 2>;
+			};
+		};
+	};
+
+	pmxr2230-bcl-lvl1 {
+		cooling-maps {
+			lbat_1_nr_scg {
+				trip = <&bcl_lvl1>;
+				cooling-device = <&modem_nr_scg_dsc 10 10>;
+			};
+
+			lbat_1_nr {
+				trip = <&bcl_lvl1>;
+				cooling-device = <&modem_nr_dsc 9 9>;
+			};
+
+			lbat_1_mdm_lte {
+				trip = <&bcl_lvl1>;
+				cooling-device = <&modem_lte_dsc 10 10>;
+			};
+
+			lbat_gpu1 {
+				trip = <&bcl_lvl1>;
+				cooling-device = <&msm_gpu 3 3>;
+			};
+		};
+	};
+
+	pmxr2230-bcl-lvl2 {
+		cooling-maps {
+			lbat_gpu2 {
+				trip = <&bcl_lvl2>;
+				cooling-device = <&msm_gpu 7 7>;
+			};
+		};
+	};
+
+	sys-therm-0 {
+		cooling-maps {
+			apc1_cdev {
+				trip = <&trip_config0>;
+				cooling-device = <&APC1_MX_CX_PAUSE 1 1>;
+			};
+
+			apc0_cdev {
+				trip = <&trip_config0>;
+				cooling-device = <&APC0_MX_CX_PAUSE 1 1>;
+			};
+
+			cdsp_cdev {
+				trip = <&trip_config0>;
+				cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
+			};
+
+			gpu_cdev {
+				trip = <&trip_config0>;
+				cooling-device = <&msm_gpu 5 THERMAL_NO_LIMIT>;
+			};
+
+			cpu3_hot_cdev {
+				trip = <&trip_config1>;
+				cooling-device = <&cpu3_hotplug 1 1>;
+			};
+
+			cpu4_hot_cdev {
+				trip = <&trip_config1>;
+				cooling-device = <&cpu4_hotplug 1 1>;
+			};
+
+			cpu5_hot_cdev {
+				trip = <&trip_config1>;
+				cooling-device = <&cpu5_hotplug 1 1>;
+			};
+
+			cpu6_hot_cdev {
+				trip = <&trip_config1>;
+				cooling-device = <&cpu6_hotplug 1 1>;
+			};
+
+			cpu7_hot_cdev {
+				trip = <&trip_config1>;
+				cooling-device = <&cpu7_hotplug 1 1>;
+			};
+
+			lte_cdev {
+				trip = <&trip_config1>;
+				cooling-device = <&modem_lte_dsc 255 255>;
+			};
+
+			nr_cdev {
+				trip = <&trip_config1>;
+				cooling-device = <&modem_nr_scg_dsc 255 255>;
+			};
+
+			display_cdev1 {
+				trip = <&display_test_config1>;
+				cooling-device = <&display_fps 1 1>;
+			};
+
+			display_cdev2 {
+				trip = <&display_test_config2>;
+				cooling-device = <&display_fps 2 2>;
+			};
+
+			display_cdev3 {
+				trip = <&display_test_config3>;
+				cooling-device = <&display_fps 3 3>;
+			};
+		};
+	};
+};
diff --git a/qcom/kera-thermal.dtsi b/qcom/kera-thermal.dtsi
index 7cc541af..036869cd 100644
--- a/qcom/kera-thermal.dtsi
+++ b/qcom/kera-thermal.dtsi
@@ -1037,7 +1037,7 @@
 	video {
 		polling-delay-passive = <0>;
 		polling-delay = <0>;
-		thermal-sensors = <&tsens1 11>;
+		thermal-sensors = <&tsens1 10>;
 
 		trips {
 			trip-point0 {
diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi
index 4bbe6ab9..38fc677f 100644
--- a/qcom/kera.dtsi
+++ b/qcom/kera.dtsi
@@ -3360,4 +3360,4 @@
 		vdd-usb-cp-supply = <&L7B>;
 	};
 };
-#include "tuna-thermal-overlay.dtsi"
+#include "kera-thermal-overlay.dtsi"
diff --git a/qcom/tuna-thermal-overlay.dtsi b/qcom/tuna-thermal-overlay.dtsi
index e0c1e053..2e9de58e 100644
--- a/qcom/tuna-thermal-overlay.dtsi
+++ b/qcom/tuna-thermal-overlay.dtsi
@@ -6,6 +6,62 @@
 #include <dt-bindings/thermal/thermal_qti.h>
 
 &thermal_zones {
+	pmxr2230_tz {
+		cooling-maps {
+			pmxr2230_apc1 {
+				trip = <&pmxr2230_trip0>;
+				cooling-device = <&APC1_MX_CX_PAUSE 1 1>;
+			};
+
+			pmxr2230_apc0 {
+				trip = <&pmxr2230_trip0>;
+				cooling-device = <&APC0_MX_CX_PAUSE 1 1>;
+			};
+		};
+	};
+
+	pm8550vs_d_tz {
+		cooling-maps {
+			pm8550vs_d_cdsp {
+				trip = <&pm8550vs_d_trip0>;
+				cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
+			};
+
+			pm8550vs_d_lte {
+				trip = <&pm8550vs_d_trip0>;
+				cooling-device = <&modem_lte_dsc 255 255>;
+			};
+
+			pm8550vs_d_nr {
+				trip = <&pm8550vs_d_trip0>;
+				cooling-device = <&modem_nr_scg_dsc 255 255>;
+			};
+		};
+	};
+
+	pm8550vs_f_tz {
+		cooling-maps {
+			pm8550vs_f_gpu {
+				trip = <&pm8550vs_f_trip0>;
+				cooling-device = <&msm_gpu 7 THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+
+	pm8550vs_g_tz {
+		cooling-maps {
+			pm8550vs_g_apc1 {
+				trip = <&pm8550vs_g_trip0>;
+				cooling-device = <&APC1_MX_CX_PAUSE 1 1>;
+			};
+
+			pm8550vs_g_apc0 {
+				trip = <&pm8550vs_g_trip0>;
+				cooling-device = <&APC0_MX_CX_PAUSE 1 1>;
+			};
+		};
+	};
+
 	pmxr2230-bcl-lvl0 {
 		cooling-maps {
 			lbat_0_nr_scg {

From de2ef76b9266a23582d7221bd182416a8f39b2a7 Mon Sep 17 00:00:00 2001
From: Shilpa Suresh <quic_c_sbsure@quicinc.com>
Date: Thu, 2 Jan 2025 15:48:11 +0530
Subject: [PATCH 15/22] ARM: dts: msm: Enable schgm-flash node for ravelin

Add compatible string to schgm-flash DT node. This was removed
from the bulk DT porting for Ravelin on qcom-6.6 device-tree branch.

Change-Id: I16d410ce8cc15278b0d8a3480a1e7fd5a044669f
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
---
 qcom/pmi632.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/qcom/pmi632.dtsi b/qcom/pmi632.dtsi
index 1d470d30..7fe60f50 100644
--- a/qcom/pmi632.dtsi
+++ b/qcom/pmi632.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -135,6 +135,7 @@
 		};
 
 		qcom,schgm-flash@a600 {
+			compatible = "qcom,schgm-flash";
 			reg = <0xa600>;
 			interrupts = <0x2 0xa6 0x2 IRQ_TYPE_EDGE_RISING>,
 				     <0x2 0xa6 0x6 IRQ_TYPE_EDGE_RISING>;

From e35701ca994c6dc01c909bb729491d23ee0d7ee2 Mon Sep 17 00:00:00 2001
From: Anand Tarakh <quic_atarakh@quicinc.com>
Date: Fri, 3 Jan 2025 12:34:28 +0530
Subject: [PATCH 16/22] ARM: dts: msm: update touch io base address to spi qup
 node for kera

Update trusted touch io base address to spi qup node address for kera.

Change-Id: Ice0a8e82b62f3f44b5ceb12d89744c1c11681da1
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
---
 qcom/kera-cdp.dtsi            | 4 ++--
 qcom/kera-mtp.dtsi            | 4 ++--
 qcom/kera-qrd.dtsi            | 4 ++--
 qcom/kera-rcm.dtsi            | 4 ++--
 qcom/kera-vm-cdp-qca6750.dtsi | 4 ++--
 qcom/kera-vm-mtp-qca6750.dtsi | 4 ++--
 qcom/kera-vm-mtp-wcn7750.dtsi | 4 ++--
 7 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/qcom/kera-cdp.dtsi b/qcom/kera-cdp.dtsi
index f9d8f28b..d9f13391 100644
--- a/qcom/kera-cdp.dtsi
+++ b/qcom/kera-cdp.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 #include <dt-bindings/gpio/gpio.h>
 
@@ -58,7 +58,7 @@
 		qts,touch-environment = "pvm";
 		qts,trusted-touch-type = "primary";
 		qts,trusted-touch-spi-irq = <653>;
-		qts,trusted-touch-io-bases = <0xa90000>;
+		qts,trusted-touch-io-bases = <0x880000>;
 		qts,trusted-touch-io-sizes = <0x1000>;
 		qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
 						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
diff --git a/qcom/kera-mtp.dtsi b/qcom/kera-mtp.dtsi
index fe3b8f24..0d549584 100644
--- a/qcom/kera-mtp.dtsi
+++ b/qcom/kera-mtp.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
@@ -71,7 +71,7 @@
 		qts,touch-environment = "pvm";
 		qts,trusted-touch-type = "primary";
 		qts,trusted-touch-spi-irq = <653>;
-		qts,trusted-touch-io-bases = <0xa90000>;
+		qts,trusted-touch-io-bases = <0x880000>;
 		qts,trusted-touch-io-sizes = <0x1000>;
 		qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
 						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
diff --git a/qcom/kera-qrd.dtsi b/qcom/kera-qrd.dtsi
index bc809756..835d90fe 100644
--- a/qcom/kera-qrd.dtsi
+++ b/qcom/kera-qrd.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 #include <dt-bindings/gpio/gpio.h>
 
@@ -66,7 +66,7 @@
 		qts,touch-environment = "pvm";
 		qts,trusted-touch-type = "primary";
 		qts,trusted-touch-spi-irq = <653>;
-		qts,trusted-touch-io-bases = <0xa90000>;
+		qts,trusted-touch-io-bases = <0x880000>;
 		qts,trusted-touch-io-sizes = <0x1000>;
 		qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
 						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
diff --git a/qcom/kera-rcm.dtsi b/qcom/kera-rcm.dtsi
index f9d8f28b..d9f13391 100644
--- a/qcom/kera-rcm.dtsi
+++ b/qcom/kera-rcm.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 #include <dt-bindings/gpio/gpio.h>
 
@@ -58,7 +58,7 @@
 		qts,touch-environment = "pvm";
 		qts,trusted-touch-type = "primary";
 		qts,trusted-touch-spi-irq = <653>;
-		qts,trusted-touch-io-bases = <0xa90000>;
+		qts,trusted-touch-io-bases = <0x880000>;
 		qts,trusted-touch-io-sizes = <0x1000>;
 		qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
 						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
diff --git a/qcom/kera-vm-cdp-qca6750.dtsi b/qcom/kera-vm-cdp-qca6750.dtsi
index 10bb9113..805e6850 100644
--- a/qcom/kera-vm-cdp-qca6750.dtsi
+++ b/qcom/kera-vm-cdp-qca6750.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 &soc {
@@ -22,7 +22,7 @@
 		qts,touch-environment = "tvm";
 		qts,trusted-touch-type = "primary";
 		qts,trusted-touch-spi-irq = <653>;
-		qts,trusted-touch-io-bases = <0xa90000>;
+		qts,trusted-touch-io-bases = <0x880000>;
 		qts,trusted-touch-io-sizes = <0x1000>;
 		qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
 						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
diff --git a/qcom/kera-vm-mtp-qca6750.dtsi b/qcom/kera-vm-mtp-qca6750.dtsi
index 10bb9113..805e6850 100644
--- a/qcom/kera-vm-mtp-qca6750.dtsi
+++ b/qcom/kera-vm-mtp-qca6750.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 &soc {
@@ -22,7 +22,7 @@
 		qts,touch-environment = "tvm";
 		qts,trusted-touch-type = "primary";
 		qts,trusted-touch-spi-irq = <653>;
-		qts,trusted-touch-io-bases = <0xa90000>;
+		qts,trusted-touch-io-bases = <0x880000>;
 		qts,trusted-touch-io-sizes = <0x1000>;
 		qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
 						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
diff --git a/qcom/kera-vm-mtp-wcn7750.dtsi b/qcom/kera-vm-mtp-wcn7750.dtsi
index 10bb9113..805e6850 100644
--- a/qcom/kera-vm-mtp-wcn7750.dtsi
+++ b/qcom/kera-vm-mtp-wcn7750.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 &soc {
@@ -22,7 +22,7 @@
 		qts,touch-environment = "tvm";
 		qts,trusted-touch-type = "primary";
 		qts,trusted-touch-spi-irq = <653>;
-		qts,trusted-touch-io-bases = <0xa90000>;
+		qts,trusted-touch-io-bases = <0x880000>;
 		qts,trusted-touch-io-sizes = <0x1000>;
 		qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
 						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;

From 8642f7b4094c84f4af45d1ed0ceae644fdc499d6 Mon Sep 17 00:00:00 2001
From: songchai <quic_songchai@quicinc.com>
Date: Sun, 5 Jan 2025 18:18:56 -0800
Subject: [PATCH 17/22] ARM: dts: msm: Reserve 32kb to dcc on HLOS for kera

Reserve 32kb to dcc on HLOS for kera.

Change-Id: I926dc00c21e46411785392e08121b08ad116003e
Signed-off-by: songchai <quic_songchai@quicinc.com>
---
 qcom/kera-debug.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/qcom/kera-debug.dtsi b/qcom/kera-debug.dtsi
index da91ef64..da87105f 100644
--- a/qcom/kera-debug.dtsi
+++ b/qcom/kera-debug.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <dt-bindings/soc/qcom,dcc_v2.h>
@@ -20,13 +20,13 @@
 	dcc: dcc_v2@100ff000 {
 		compatible = "qcom,dcc-v2";
 		reg = <0x100ff000 0x1000>,
-		      <0x10084000 0x4000>;
+		      <0x10080000 0x8000>;
 
 		status = "disabled";
 		qcom,transaction_timeout = <0>;
 
 		reg-names = "dcc-base", "dcc-ram-base";
-		dcc-ram-offset = <0x4000>;
+		dcc-ram-offset = <0x0>;
 	};
 
 	mem_dump {

From 95697cdf337b8c86dff92776eebf7ca6922d89b3 Mon Sep 17 00:00:00 2001
From: Sneh Mankad <quic_smankad@quicinc.com>
Date: Thu, 26 Dec 2024 14:46:23 +0530
Subject: [PATCH 18/22] ARM: dts: qcom: Modify APSS RSC device for sdxkova

Modify APSS RSC device for sdxkova.

Change-Id: I703d001082bcd29e44f9137ebad38f875904ef8b
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
---
 qcom/sdxkova.dtsi | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi
index 6a83939d..1d3434d0 100644
--- a/qcom/sdxkova.dtsi
+++ b/qcom/sdxkova.dtsi
@@ -86,21 +86,22 @@
 			      <0x0 0x17a10000 0x0 0x10000>,
 			      <0x0 0x17a20000 0x0 0x10000>;
 			reg-names = "drv-0", "drv-1", "drv-2";
+			qcom,drv-count = <3>;
 			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-			qcom,drv-count = <3>;
 
 			apps_rsc_drv2: drv@2 {
 				qcom,drv-id = <2>;
 				qcom,tcs-offset = <0xd00>;
+				qcom,tcs-distance = <0x2a0>;
+
 				channel@0 {
-					qcom,tcs-offset = <0xd00>;
-					qcom,tcs-config = <ACTIVE_TCS    3>,
-							  <SLEEP_TCS     2>,
-							  <WAKE_TCS      2>,
-							  <FAST_PATH_TCS 0>,
-							  <CONTROL_TCS   0>;
+					 qcom,tcs-config = <ACTIVE_TCS    3>,
+							   <SLEEP_TCS     2>,
+							   <WAKE_TCS      2>,
+							   <CONTROL_TCS   0>,
+							   <FAST_PATH_TCS 1>;
 				};
 
 				apps_bcm_voter: bcm-voter {

From ea95288e633d154f622d4e2ee4e13f503a4dfdb6 Mon Sep 17 00:00:00 2001
From: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Date: Tue, 7 Jan 2025 11:31:07 +0530
Subject: [PATCH 19/22] ARM: dts: msm: Update eUSB2 init sequence value as per
 ver 1.0.2 for Kera

eUSB2 HPG revision 1.0.2 recommends to program eusb register
USB_PHY_CFG_CTRL_1 to be programmed to 0x00 on phy init.

Since this divergence is only applicable for specific version therefore
updating the override sequence with the appropriate value.

Change-Id: Iaf84875c20e9c2c030b3f81eec9348a63f081105
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
---
 qcom/kera-usb.dtsi | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/qcom/kera-usb.dtsi b/qcom/kera-usb.dtsi
index 3bf8b556..040524c8 100644
--- a/qcom/kera-usb.dtsi
+++ b/qcom/kera-usb.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <dt-bindings/clock/qcom,gcc-kera.h>
@@ -124,6 +124,10 @@
 
 		resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
 		reset-names = "phy_reset";
+
+		/* eUSB2 HPG version 1.0.2 update */
+		qcom,param-override-seq =
+			<0x00 0x58>;
 	};
 
 	usb_nop_phy: usb_nop_phy {

From 5e343c553d526c7287e02368825edeb3d716b996 Mon Sep 17 00:00:00 2001
From: Smeet Raj <quic_smeeraj@quicinc.com>
Date: Tue, 24 Dec 2024 11:06:15 +0530
Subject: [PATCH 20/22] ARM: dts: msm: Add pcie_1 clocks support for Kera IoT
 platform

Kera IoT platform required pcie_1 clocks support. Add support
to model pcie_1 clocks and gdsc's for Kera IoT devices.

Change-Id: I5ada397442568c9e91b099e8cb4ea5234fb4b76e
Signed-off-by: Smeet Raj <quic_smeeraj@quicinc.com>
---
 qcom/kera-iot-cdp-qca6750-ufs4.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/qcom/kera-iot-cdp-qca6750-ufs4.dtsi b/qcom/kera-iot-cdp-qca6750-ufs4.dtsi
index b732b80b..665af693 100644
--- a/qcom/kera-iot-cdp-qca6750-ufs4.dtsi
+++ b/qcom/kera-iot-cdp-qca6750-ufs4.dtsi
@@ -4,3 +4,15 @@
  */
 
 #include "kera-cdp-qca6750-ufs4.dtsi"
+
+&gcc {
+	/delete-property/ protected-clocks;
+};
+
+&gcc_pcie_1_gdsc {
+	status = "ok";
+};
+
+&gcc_pcie_1_phy_gdsc {
+	status = "ok";
+};

From 960e130e061c1ff56a7b8896a8849ef796f46740 Mon Sep 17 00:00:00 2001
From: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Date: Thu, 12 Dec 2024 13:47:09 +0530
Subject: [PATCH 21/22] ARM: dts: msm: add proxy properties to DSI supplies for
 Kera

Add proxy enable properties to the DSI core and panel supplies
to support continuous splash for Kera.

Change-Id: Iac767f1f9fd51159ec9650370ab7caa0a6e695a5
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
---
 qcom/kera-regulators.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/qcom/kera-regulators.dtsi b/qcom/kera-regulators.dtsi
index 2b82ef1f..aa1caf42 100644
--- a/qcom/kera-regulators.dtsi
+++ b/qcom/kera-regulators.dtsi
@@ -112,6 +112,7 @@
 			<RPMH_REGULATOR_MODE_LPM
 			RPMH_REGULATOR_MODE_HPM>;
 		qcom,mode-threshold-currents = <0 30000>;
+		proxy-supply = <&L2B>;
 
 		L2B: pmxr2230_l2: vreg-pmxr2230-l2 {
 			regulator-name = "pmxr2230_l2";
@@ -120,6 +121,8 @@
 			regulator-max-microvolt = <950000>;
 			qcom,init-voltage = <720000>;
 			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+			qcom,proxy-consumer-enable;
+			qcom,proxy-consumer-current = <98000>;
 		};
 	};
 
@@ -148,6 +151,7 @@
 			<RPMH_REGULATOR_MODE_LPM
 			RPMH_REGULATOR_MODE_HPM>;
 		qcom,mode-threshold-currents = <0 30000>;
+		proxy-supply = <&L4B>;
 
 		L4B: pmxr2230_l4: vreg-pmxr2230-l4 {
 			regulator-name = "pmxr2230_l4";
@@ -156,6 +160,8 @@
 			regulator-max-microvolt = <1320000>;
 			qcom,init-voltage = <1200000>;
 			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+			qcom,proxy-consumer-enable;
+			qcom,proxy-consumer-current = <16600>;
 		};
 	};
 
@@ -226,6 +232,7 @@
 			<RPMH_REGULATOR_MODE_LPM
 			RPMH_REGULATOR_MODE_HPM>;
 		qcom,mode-threshold-currents = <0 30000>;
+		proxy-supply = <&L8B>;
 
 		L8B: pmxr2230_l8: vreg-pmxr2230-l8 {
 			regulator-name = "pmxr2230_l8";
@@ -234,6 +241,8 @@
 			regulator-max-microvolt = <2000000>;
 			qcom,init-voltage = <1800000>;
 			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+			qcom,proxy-consumer-enable;
+			qcom,proxy-consumer-current = <154000>;
 		};
 	};
 
@@ -433,6 +442,7 @@
 			<RPMH_REGULATOR_MODE_LPM
 			RPMH_REGULATOR_MODE_HPM>;
 		qcom,mode-threshold-currents = <0 10000>;
+		proxy-supply = <&L19B>;
 
 		L19B: pmxr2230_l19: vreg-pmxr2230-l19 {
 			regulator-name = "pmxr2230_l19";
@@ -441,6 +451,8 @@
 			regulator-max-microvolt = <3544000>;
 			qcom,init-voltage = <2600000>;
 			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+			qcom,proxy-consumer-enable;
+			qcom,proxy-consumer-current = <10000>;
 		};
 	};
 
@@ -745,6 +757,7 @@
 			<RPMH_REGULATOR_MODE_LPM
 			RPMH_REGULATOR_MODE_HPM>;
 		qcom,mode-threshold-currents = <0 30000>;
+		proxy-supply = <&L1G>;
 
 		L1G: pm_v6g_l1: vreg-pm_v6g-l1 {
 			regulator-name = "pm_v6g_l1";
@@ -753,6 +766,8 @@
 			regulator-max-microvolt = <1250000>;
 			qcom,init-voltage = <1150000>;
 			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+			qcom,proxy-consumer-enable;
+			qcom,proxy-consumer-current = <220000>;
 		};
 	};
 

From 3bce742da88bae0fc0045fed57999e155328bbdb Mon Sep 17 00:00:00 2001
From: Sneh Mankad <quic_smankad@quicinc.com>
Date: Fri, 27 Dec 2024 15:35:22 +0530
Subject: [PATCH 22/22] ARM: dts: qcom: Add LPM devices for sdxkova

Add idle states for CPU and CPU clusters, add PSCI device to
enable CPU to enter LPMs.

Additionally, update APPS RSC device to be in cluster power
domain to handle RSC activites when cluster is powering off.

Change-Id: Ibe2fa720bc5e81084d380b2e5dc4f8fa8910566c
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
---
 qcom/sdxkova.dtsi | 110 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 110 insertions(+)

diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi
index 1d3434d0..5130ff86 100644
--- a/qcom/sdxkova.dtsi
+++ b/qcom/sdxkova.dtsi
@@ -42,6 +42,24 @@
 			     <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 	};
 
+	cpus {
+		CPU0: cpu@0 {
+			cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>;
+		};
+
+		CPU1: cpu@100 {
+			cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>;
+		};
+
+		CPU2: cpu@200 {
+			cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>;
+		};
+
+		CPU3: cpu@300 {
+			cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>;
+		};
+	};
+
 	/delete-node/ reserved-memory;
 
 	reserved_memory: reserved-memory {
@@ -76,7 +94,93 @@
 
 	};
 
+	/delete-node/ idle-states;
+
+	idle-states {
+		entry-method = "psci";
+
+		SILVER_OFF: silver-c3 { /* C3 */
+			compatible = "arm,idle-state";
+			idle-state-name = "pc";
+			entry-latency-us = <235>;
+			exit-latency-us = <428>;
+			min-residency-us = <1774>;
+			arm,psci-suspend-param = <0x40000003>;
+			local-timer-stop;
+		};
+
+		SILVER_RAIL_OFF: silver-c4 { /* C4 */
+			compatible = "arm,idle-state";
+			idle-state-name = "rail-pc";
+			entry-latency-us = <800>;
+			exit-latency-us = <750>;
+			min-residency-us = <4090>;
+			arm,psci-suspend-param = <0x40000004>;
+			local-timer-stop;
+		};
+
+		CLUSTER_PWR_DN: cluster-d4 { /* D4 */
+			compatible = "domain-idle-state";
+			idle-state-name = "l3-off";
+			entry-latency-us = <1050>;
+			exit-latency-us = <2500>;
+			min-residency-us = <5309>;
+			arm,psci-suspend-param = <0x41000044>;
+		};
+
+		CX_RET: cx-ret { /* Cx Ret */
+			compatible = "domain-idle-state";
+			idle-state-name = "cx-ret";
+			entry-latency-us = <2761>;
+			exit-latency-us = <3964>;
+			min-residency-us = <8467>;
+			arm,psci-suspend-param = <0x41001344>;
+		};
+
+		APSS_OFF: cluster-e3 { /* E3 */
+			compatible = "domain-idle-state";
+			idle-state-name = "llcc-off";
+			entry-latency-us = <2793>;
+			exit-latency-us = <4023>;
+			min-residency-us = <9826>;
+			arm,psci-suspend-param = <0x4100B344>;
+		};
+	};
+
+	/delete-node/ psci;
+
 	soc: soc {
+
+		psci {
+			compatible = "arm,psci-1.0";
+			method = "smc";
+
+			CPU_PD0: cpu-pd0 {
+				#power-domain-cells = <0>;
+				power-domains = <&CLUSTER_PD>;
+			};
+
+			CPU_PD1: cpu-pd1 {
+				#power-domain-cells = <0>;
+				power-domains = <&CLUSTER_PD>;
+			};
+
+			CPU_PD2: cpu-pd2 {
+				#power-domain-cells = <0>;
+				power-domains = <&CLUSTER_PD>;
+			};
+
+			CPU_PD3: cpu-pd3 {
+				#power-domain-cells = <0>;
+				power-domains = <&CLUSTER_PD>;
+			};
+
+			CLUSTER_PD: cluster-pd {
+				#power-domain-cells = <0>;
+				domain-idle-states = <&CLUSTER_PWR_DN &CX_RET &APSS_OFF>;
+			};
+		};
+
 		/delete-node/ rsc@17a00000;
 
 		apps_rsc: rsc@17a00000 {
@@ -90,6 +194,7 @@
 			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&CLUSTER_PD>;
 
 			apps_rsc_drv2: drv@2 {
 				qcom,drv-id = <2>;
@@ -166,6 +271,11 @@
 				};
 			};
 		};
+
+		cluster-device {
+			compatible = "qcom,lpm-cluster-dev";
+			power-domains = <&CLUSTER_PD>;
+		};
 	};
 
 	firmware: firmware { };