diff --git a/bindings/power/supply/qcom,schgm-flash.yaml b/bindings/power/supply/qcom,schgm-flash.yaml new file mode 100644 index 00000000..a3748d9f --- /dev/null +++ b/bindings/power/supply/qcom,schgm-flash.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/qcom,schgm-flash.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. schgm_flash driver + +maintainers: + - Rakesh Kota + +description: | + Add support for SCHGM_FLASH module under charger. + SCHGM_FLASH module handles flash failure, de-rating and + allows configuration for different flash features. + +properties: + compatible: + const: qcom,schgm-flash + + reg: + description: | + Address and size of the peripheral's register block. + + interrupts: + description: | + Peripheral interrupt specifier. + + interrupt-names: + description: | + Interrupt names. This list must match up 1-to-1 with the + interrupts specified in the 'interrupts' property. + + qcom,flash-derating-soc: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SOC threshold in percentage below which hardware will start + derating flash. This is only applicable to certain PMICs like + PMI632 which has SCHGM_FLASH peripheral. + + qcom,flash-disable-soc: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SOC threshold in percentage below which hardware will disable + flash. This is only applicable to certain PMICs like PMI632 + which has SCHGM_FLASH peripheral. + + qcom,headroom-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Specifies flash hardware headroom management policy. + possible values are + 0 - Fixed mode, constant 5V at flash input. + 1 - Adaptive mode allows charger output voltage to be + dynamically controlled by the flash module based on the + required flash headroom. + This is only applicable to certain PMICs like PMI632 which + has SCHGM_FLASH peripheral. + +required: + - compatible + - reg + - interrupts + - interrupt-names + +allOf: + - $ref: power-supply.yaml# + +additionalProperties: false + +examples: + - | + #include + + qcom,schgm-flash@a600 { + compatible = "qcom,schgm-flash"; + reg = <0xa600 0x100>; + interrupts = <0x2 0xa6 0x0 IRQ_TYPE_NONE>, + <0x2 0xa6 0x1 IRQ_TYPE_NONE>, + <0x2 0xa6 0x2 IRQ_TYPE_NONE>, + <0x2 0xa6 0x3 IRQ_TYPE_NONE>, + <0x2 0xa6 0x4 IRQ_TYPE_NONE>, + <0x2 0xa6 0x5 IRQ_TYPE_NONE>, + <0x2 0xa6 0x6 IRQ_TYPE_NONE>, + <0x2 0xa6 0x7 IRQ_TYPE_NONE>; + + interrupt-names = "flash-en", + "torch-req", + "flash-state-change", + "vout-up", + "vout-down", + "ilim1-s1", + "ilim2-s2", + "vreg-ok"; + }; +... diff --git a/qcom/kera-iot-cdp-qca6750-ufs4.dtsi b/qcom/kera-iot-cdp-qca6750-ufs4.dtsi index b732b80b..665af693 100644 --- a/qcom/kera-iot-cdp-qca6750-ufs4.dtsi +++ b/qcom/kera-iot-cdp-qca6750-ufs4.dtsi @@ -4,3 +4,15 @@ */ #include "kera-cdp-qca6750-ufs4.dtsi" + +&gcc { + /delete-property/ protected-clocks; +}; + +&gcc_pcie_1_gdsc { + status = "ok"; +}; + +&gcc_pcie_1_phy_gdsc { + status = "ok"; +}; diff --git a/qcom/kera-regulators.dtsi b/qcom/kera-regulators.dtsi index 2b82ef1f..aa1caf42 100644 --- a/qcom/kera-regulators.dtsi +++ b/qcom/kera-regulators.dtsi @@ -112,6 +112,7 @@ ; qcom,mode-threshold-currents = <0 30000>; + proxy-supply = <&L2B>; L2B: pmxr2230_l2: vreg-pmxr2230-l2 { regulator-name = "pmxr2230_l2"; @@ -120,6 +121,8 @@ regulator-max-microvolt = <950000>; qcom,init-voltage = <720000>; qcom,init-mode = ; + qcom,proxy-consumer-enable; + qcom,proxy-consumer-current = <98000>; }; }; @@ -148,6 +151,7 @@ ; qcom,mode-threshold-currents = <0 30000>; + proxy-supply = <&L4B>; L4B: pmxr2230_l4: vreg-pmxr2230-l4 { regulator-name = "pmxr2230_l4"; @@ -156,6 +160,8 @@ regulator-max-microvolt = <1320000>; qcom,init-voltage = <1200000>; qcom,init-mode = ; + qcom,proxy-consumer-enable; + qcom,proxy-consumer-current = <16600>; }; }; @@ -226,6 +232,7 @@ ; qcom,mode-threshold-currents = <0 30000>; + proxy-supply = <&L8B>; L8B: pmxr2230_l8: vreg-pmxr2230-l8 { regulator-name = "pmxr2230_l8"; @@ -234,6 +241,8 @@ regulator-max-microvolt = <2000000>; qcom,init-voltage = <1800000>; qcom,init-mode = ; + qcom,proxy-consumer-enable; + qcom,proxy-consumer-current = <154000>; }; }; @@ -433,6 +442,7 @@ ; qcom,mode-threshold-currents = <0 10000>; + proxy-supply = <&L19B>; L19B: pmxr2230_l19: vreg-pmxr2230-l19 { regulator-name = "pmxr2230_l19"; @@ -441,6 +451,8 @@ regulator-max-microvolt = <3544000>; qcom,init-voltage = <2600000>; qcom,init-mode = ; + qcom,proxy-consumer-enable; + qcom,proxy-consumer-current = <10000>; }; }; @@ -745,6 +757,7 @@ ; qcom,mode-threshold-currents = <0 30000>; + proxy-supply = <&L1G>; L1G: pm_v6g_l1: vreg-pm_v6g-l1 { regulator-name = "pm_v6g_l1"; @@ -753,6 +766,8 @@ regulator-max-microvolt = <1250000>; qcom,init-voltage = <1150000>; qcom,init-mode = ; + qcom,proxy-consumer-enable; + qcom,proxy-consumer-current = <220000>; }; }; diff --git a/qcom/kera-usb.dtsi b/qcom/kera-usb.dtsi index 3bf8b556..040524c8 100644 --- a/qcom/kera-usb.dtsi +++ b/qcom/kera-usb.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -124,6 +124,10 @@ resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; + + /* eUSB2 HPG version 1.0.2 update */ + qcom,param-override-seq = + <0x00 0x58>; }; usb_nop_phy: usb_nop_phy { diff --git a/qcom/pmi632.dtsi b/qcom/pmi632.dtsi index 1d470d30..7fe60f50 100644 --- a/qcom/pmi632.dtsi +++ b/qcom/pmi632.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -135,6 +135,7 @@ }; qcom,schgm-flash@a600 { + compatible = "qcom,schgm-flash"; reg = <0xa600>; interrupts = <0x2 0xa6 0x2 IRQ_TYPE_EDGE_RISING>, <0x2 0xa6 0x6 IRQ_TYPE_EDGE_RISING>; diff --git a/qcom/sdxkova-dma-heaps.dtsi b/qcom/sdxkova-dma-heaps.dtsi new file mode 100644 index 00000000..21cfefa3 --- /dev/null +++ b/qcom/sdxkova-dma-heaps.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +&soc { + qcom,dma-heaps { + compatible = "qcom,dma-heaps"; + depends-on-supply = <&scm>; + + qcom,qseecom { + qcom,dma-heap-name = "qcom,qseecom"; + qcom,dma-heap-type = ; + memory-region = <&qseecom_mem>; + }; + + qcom,qseecom_ta { + qcom,dma-heap-name = "qcom,qseecom-ta"; + qcom,dma-heap-type = ; + memory-region = <&qseecom_ta_mem>; + }; + + qcom_audio: qcom,audio { + qcom,dma-heap-name = "qcom,audio"; + qcom,dma-heap-type = ; + memory-region = <&audio_heap_mem>; + }; + }; +}; diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi index fc542c6e..5130ff86 100644 --- a/qcom/sdxkova.dtsi +++ b/qcom/sdxkova.dtsi @@ -11,7 +11,9 @@ /delete-node/ &apps_smmu; /delete-node/ &tcsr_mutex; #include "msm-arm-smmu-sdxkova.dtsi" -/{ +#include "sdxkova-dma-heaps.dtsi" + +/ { qcom_tzlog: tz-log@14680720 { compatible = "qcom,tz-log"; reg = <0x0 0x14680720 0x0 0x3000>; @@ -20,6 +22,16 @@ hyplog-size-offset = <0x414>; }; + qcom,mem-buf { + compatible = "qcom,mem-buf"; + qcom,mem-buf-capabilities = "supplier"; + qcom,vmid = <3>; + }; + + qcom,mem-buf-msgq { + compatible = "qcom,mem-buf-msgq"; + }; + /delete-node/ timer; arch_timer: timer { @@ -30,6 +42,24 @@ ; }; + cpus { + CPU0: cpu@0 { + cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>; + }; + + CPU1: cpu@100 { + cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>; + }; + + CPU2: cpu@200 { + cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>; + }; + + CPU3: cpu@300 { + cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>; + }; + }; + /delete-node/ reserved-memory; reserved_memory: reserved-memory { @@ -45,9 +75,112 @@ size = <0x0 0x2000000>; linux,cma-default; }; + qseecom_mem: qseecom_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x800000>; + }; + + qseecom_ta_mem: qseecom_ta_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x400000>; + }; + + }; + /delete-node/ idle-states; + + idle-states { + entry-method = "psci"; + + SILVER_OFF: silver-c3 { /* C3 */ + compatible = "arm,idle-state"; + idle-state-name = "pc"; + entry-latency-us = <235>; + exit-latency-us = <428>; + min-residency-us = <1774>; + arm,psci-suspend-param = <0x40000003>; + local-timer-stop; + }; + + SILVER_RAIL_OFF: silver-c4 { /* C4 */ + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <800>; + exit-latency-us = <750>; + min-residency-us = <4090>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; + }; + + CLUSTER_PWR_DN: cluster-d4 { /* D4 */ + compatible = "domain-idle-state"; + idle-state-name = "l3-off"; + entry-latency-us = <1050>; + exit-latency-us = <2500>; + min-residency-us = <5309>; + arm,psci-suspend-param = <0x41000044>; + }; + + CX_RET: cx-ret { /* Cx Ret */ + compatible = "domain-idle-state"; + idle-state-name = "cx-ret"; + entry-latency-us = <2761>; + exit-latency-us = <3964>; + min-residency-us = <8467>; + arm,psci-suspend-param = <0x41001344>; + }; + + APSS_OFF: cluster-e3 { /* E3 */ + compatible = "domain-idle-state"; + idle-state-name = "llcc-off"; + entry-latency-us = <2793>; + exit-latency-us = <4023>; + min-residency-us = <9826>; + arm,psci-suspend-param = <0x4100B344>; + }; + }; + + /delete-node/ psci; + soc: soc { + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_PWR_DN &CX_RET &APSS_OFF>; + }; + }; + /delete-node/ rsc@17a00000; apps_rsc: rsc@17a00000 { @@ -57,21 +190,23 @@ <0x0 0x17a10000 0x0 0x10000>, <0x0 0x17a20000 0x0 0x10000>; reg-names = "drv-0", "drv-1", "drv-2"; + qcom,drv-count = <3>; interrupts = , , ; - qcom,drv-count = <3>; + power-domains = <&CLUSTER_PD>; apps_rsc_drv2: drv@2 { qcom,drv-id = <2>; qcom,tcs-offset = <0xd00>; + qcom,tcs-distance = <0x2a0>; + channel@0 { - qcom,tcs-offset = <0xd00>; - qcom,tcs-config = , - , - , - , - ; + qcom,tcs-config = , + , + , + , + ; }; apps_bcm_voter: bcm-voter { @@ -136,6 +271,11 @@ }; }; }; + + cluster-device { + compatible = "qcom,lpm-cluster-dev"; + power-domains = <&CLUSTER_PD>; + }; }; firmware: firmware { }; @@ -1248,7 +1388,9 @@ qcom_smcinvoke { compatible = "qcom,smcinvoke"; }; - + qcom_mem_object { + compatible = "qcom,mem-object"; + }; }; #include "sdxkova-regulators.dtsi" diff --git a/qcom/sun-pinctrl.dtsi b/qcom/sun-pinctrl.dtsi index ece6e0b7..c24265b0 100644 --- a/qcom/sun-pinctrl.dtsi +++ b/qcom/sun-pinctrl.dtsi @@ -2813,7 +2813,7 @@ config { pins = "gpio20"; - drive-strength = <6>; + drive-strength = <4>; bias-disable; }; }; @@ -2826,7 +2826,7 @@ config { pins = "gpio21"; - drive-strength = <6>; + drive-strength = <4>; bias-pull-down; }; }; @@ -2839,7 +2839,7 @@ config { pins = "gpio22"; - drive-strength = <6>; + drive-strength = <4>; bias-pull-down; }; }; @@ -2852,7 +2852,7 @@ config { pins = "gpio23"; - drive-strength = <6>; + drive-strength = <4>; bias-pull-down; }; }; diff --git a/qcom/tuna-pmih010x.dtsi b/qcom/tuna-pmih010x.dtsi index 0e68b9ea..a82a7e84 100644 --- a/qcom/tuna-pmih010x.dtsi +++ b/qcom/tuna-pmih010x.dtsi @@ -35,6 +35,14 @@ }; &spmi0_debug_bus { + qcom,pmd802x-debug@4 { + compatible = "qcom,spmi-pmic"; + reg = <4 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + qcom,pmih010x-debug@7 { compatible = "qcom,spmi-pmic"; reg = <7 SPMI_USID>; @@ -69,6 +77,8 @@ }; &pmih010x_haptics { + qcom,vmax-mv = <1700>; + qcom,lra-period-us = <5880>; nvmem-names = "hap_cfg_sdam"; nvmem = <&pmk8550_sdam_46>; };