From 671acbec763abff4c283c3635651208162edd647 Mon Sep 17 00:00:00 2001 From: Jyothi Kumar Seerapu Date: Tue, 6 Feb 2024 00:35:11 +0530 Subject: [PATCH] ARM: dts: msm: Add support of mosi, clk gpios and doorbell interrupt Add mosi, clock gpios and doorbell interrupt for Q2SPI wakeup support for Sun. Change-Id: I199a1cd41b8e69799f3fc8cc1caebd67406e8744 Signed-off-by: Jyothi Kumar Seerapu --- qcom/sun-qupv3.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/qcom/sun-qupv3.dtsi b/qcom/sun-qupv3.dtsi index 55acb0ff..8339e909 100644 --- a/qcom/sun-qupv3.dtsi +++ b/qcom/sun-qupv3.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ &soc { @@ -962,7 +962,8 @@ #address-cells = <1>; #size-cells = <0>; reg-names = "se_phys"; - interrupts = ; + interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 23 IRQ_TYPE_LEVEL_HIGH>; clock-names = "se-clk"; clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; interconnect-names = "qup-core", "qup-config", "qup-memory"; @@ -970,6 +971,8 @@ <&clk_virt MASTER_QUP_CORE_2 &clk_virt SLAVE_QUP_CORE_2>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_2>, <&aggre2_noc MASTER_QUP_2 &mc_virt SLAVE_EBI1>; + mosi-pin = <&tlmm 21 0>; + clk-pin = <&tlmm 22 0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&qupv3_se13_q2spi_mosi_active>, <&qupv3_se13_q2spi_miso_active>, <&qupv3_se13_q2spi_clk_active>, <&qupv3_se13_q2spi_doorbell_active>;