From 65f88ed0240763543a40c015c4fc0ecb22b6d1c1 Mon Sep 17 00:00:00 2001
From: Saranya R <quic_sarar@quicinc.com>
Date: Tue, 20 Feb 2024 11:44:32 +0530
Subject: [PATCH] dt-bindings: Add Synopsis Femto HS-PHY bindings

Add Synopsis Femto HS-PHY bindings for USB.

Change-Id: Id8e6140838eb2c2e9b1f8272483d00443f57e14c
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
---
 bindings/usb/qcom,snps-hs-usb-femto.yaml | 104 +++++++++++++++++++++++
 1 file changed, 104 insertions(+)
 create mode 100644 bindings/usb/qcom,snps-hs-usb-femto.yaml

diff --git a/bindings/usb/qcom,snps-hs-usb-femto.yaml b/bindings/usb/qcom,snps-hs-usb-femto.yaml
new file mode 100644
index 00000000..8d3bbde5
--- /dev/null
+++ b/bindings/usb/qcom,snps-hs-usb-femto.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/qcom,snps-hs-usb-femto.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. Synopsis Femto High-Speed Phy
+
+maintainers:
+  - Wesley Cheng <quic_wcheng@quicinc.com>
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - qcom,usb-hsphy-snps-femto
+          - qcom,usb-hsphy-snps-femto-lemans
+  reg:
+    description: Address and length of the registers set for the phy.
+    minItems: 1
+    maxItems: 2
+
+  reg-names:
+    minItems: 1
+    items:
+      - const: hsusb_phy_base
+      - const: eud_enable_reg
+
+  vdd-supply:
+    description: vdd supply for HSPHY digital circuit operation
+
+  vdd18-supply:
+    description: 1.8 V for HSPHY.
+
+  vdd33-supply:
+    description: 3.3 V for HSPHY
+
+  qcom,vdd-voltage-level:
+    description: Voltage level of the vdd supply.
+                 This is set to min value to vote from usb.
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+
+  clocks:
+    description: |
+      A list of phandles to the phy clocks::
+      - ref_clk_src:: Reference clk source required for enumeration.
+      - ref_clk:: Reference clk required for enumeration.
+    minItems: 1
+    maxItems: 3
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: ref_clk_src
+      - const: ref_clk
+
+  resets:
+    maxItems: 1
+
+  reset-names:
+    items:
+      - const: phy_reset
+
+  qcom,param-override-seq:
+    description: Required if override x0/1/2 need to be changed.
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    items:
+      items:
+        -
+          description: address
+        -
+          description: value
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,rpmcc.h>
+    #include <dt-bindings/clock/qcom,gcc-blair.h>
+
+    usb2_phy0: hsphy@162b000 {
+          compatible = "qcom,usb-hsphy-snps-femto";
+          reg = <0x162B000 0x114>,
+                <0x0162A000 0x1000>;
+          reg-names = "hsusb_phy_base",
+                      "eud_enable_reg";
+
+          vdd-supply = <&L7A>;
+          vdda18-supply = <&L10A>;
+          vdda33-supply = <&L7E>;
+          qcom,vdd-voltage-level = <0 880000 880000>;
+
+          clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+          <&gcc GCC_USB3_PRIM_CLKREF_CLK>;
+          clock-names = "ref_clk_src", "ref_clk";
+
+          resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+          reset-names = "phy_reset";
+          qcom,param-override-seq =
+                     <0xa6 0x6c	/* override_x0 */
+                      0x85 0x70	/* override_x1 */
+                      0x16 0x74>;	/* override x2 */
+    };
+