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Merge "ARM: dts: msm: Add initial device tree for parrot/ravelin vm"

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This commit is contained in:
QCTECMDR Service
2024-08-17 06:34:05 -07:00
committed by Gerrit - the friendly Code Review server
parent a4b731a3d6 a191ae962a
commit 63b45e34ec
39 changed files with 1196 additions and 4 deletions
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31
qcom/Makefile
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@@ -219,6 +219,37 @@ monaco-dtb-$(CONFIG_ARCH_MONACO) += \
monaco-overlays-dtb-$(CONFIG_ARCH_MONACO) += $(MONACO_BOARDS) $(MONACO_BASE_DTB)
dtb-y += $(monaco-dtb-y)
ifeq ($(CONFIG_ARCH_PARROT), y)
ifeq ($(CONFIG_ARCH_QTI_VM), y)
parrot_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += parrot-vm-rumi.dtb \
parrot-vm-atp.dtb \
parrot-vm-idp.dtb \
parrot-vm-idp-wcn3990.dtb \
parrot-vm-idp-wcn3990-amoled-rcm.dtb \
parrot-vm-idp-wcn6750-amoled.dtb \
parrot-vm-idp-wcn6750-amoled-rcm.dtb \
parrot-vm-qrd.dtb \
parrot-vm-qrd-wcn6750.dtb
dtb-y += $(parrot_tuivm-dtb-y)
endif
endif
ifeq ($(CONFIG_ARCH_RAVELIN), y)
ifeq ($(CONFIG_ARCH_QTI_VM), y)
parrot_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += ravelin-vm-rumi.dtb \
ravelin-vm-atp.dtb \
ravelin-vm-idp.dtb \
ravelin-vm-idp-wcn3988.dtb \
ravelin-vm-idp-wcn3950-amoled-rcm.dtb \
ravelin-vm-qrd.dtb
dtb-y += $(parrot_tuivm-dtb-y)
endif
endif
always-y := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

36
qcom/msm-arm-smmu-waipio-vm.dtsi Normal file
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@@ -0,0 +1,36 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
vm-config {
vdevices {
vsmmu@15000000 {
vdevice-type = "vsmmu-v2";
smmu-handle = <0x15000000>;
num-cbs = <0x2>;
num-smrs = <0x3>;
patch = "/soc/apps-smmu@15000000";
};
};
};
};
&soc {
apps_smmu: apps-smmu@15000000 {
/*
* reg, #global-interrupts & interrupts properties will
* be added dynamically by bootloader.
*/
compatible = "qcom,qsmmu-v500", "qcom,virt-smmu";
#iommu-cells = <2>;
qcom,use-3-lvl-tables;
dma-coherent;
qcom,actlr =
<0x2803 0x0400 0x00000001>,
<0x2804 0x0402 0x00000001>;
};
};

15
qcom/parrot-vm-atp.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot SVM ATP";
compatible = "qcom,parrot-atp", "qcom,parrot", "qcom,atp";
qcom,board-id = <33 0>;
};

7
qcom/parrot-vm-atp.dtsi Normal file
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@@ -0,0 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
};

15
qcom/parrot-vm-idp-wcn3990-amoled-rcm.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-idp-wcn3990-amoled-rcm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot WCN3990 VM IDP + AMOLED + RCM";
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
qcom,board-id = <34 3>;
};

9
qcom/parrot-vm-idp-wcn3990-amoled-rcm.dtsi Normal file
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@@ -0,0 +1,9 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "parrot-vm-idp.dtsi"
&soc {
};

15
qcom/parrot-vm-idp-wcn3990.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-idp-wcn3990.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot SVM IDP + WCN3990";
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
qcom,board-id = <34 1>;
};

9
qcom/parrot-vm-idp-wcn3990.dtsi Normal file
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@@ -0,0 +1,9 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "parrot-vm-idp.dtsi"
&soc {
};

15
qcom/parrot-vm-idp-wcn6750-amoled-rcm.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-idp-wcn6750-amoled-rcm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot WCN6750 VM IDP + AMOLED + RCM";
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
qcom,board-id = <34 2>;
};

9
qcom/parrot-vm-idp-wcn6750-amoled-rcm.dtsi Normal file
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@@ -0,0 +1,9 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "parrot-vm-idp.dtsi"
&soc {
};

15
qcom/parrot-vm-idp-wcn6750-amoled.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-idp-wcn6750-amoled.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot VM WCN6750 IDP + AMOLED";
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
qcom,board-id = <34 4>;
};

9
qcom/parrot-vm-idp-wcn6750-amoled.dtsi Normal file
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@@ -0,0 +1,9 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "parrot-vm-idp.dtsi"
&soc {
};

15
qcom/parrot-vm-idp.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot SVM IDP";
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
qcom,board-id = <34 0>;
};

21
qcom/parrot-vm-idp.dtsi Normal file
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@@ -0,0 +1,21 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
};
&qupv3_se9_i2c {
status = "ok";
novatek@62 {
reg = <0x62>;
novatek,trusted-touch-mode = "vm_mode";
novatek,touch-environment = "tvm";
novatek,trusted-touch-spi-irq = <566>;
novatek,trusted-touch-io-bases = <0xa8c000 0xa10000>;
novatek,trusted-touch-io-sizes = <0x1000 0x4000>;
novatek,trusted-touch-vm-gpio-list = <&tlmm 10 0 &tlmm 11 0
&tlmm 12 0 &tlmm 13 0x2008>;
};
};

15
qcom/parrot-vm-qrd-wcn6750.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-qrd-wcn6750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot SVM QRD + WCN6750";
compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
qcom,board-id = <0x1000B 1>;
};

9
qcom/parrot-vm-qrd-wcn6750.dtsi Normal file
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@@ -0,0 +1,9 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "parrot-vm-qrd.dtsi"
&soc {
};

15
qcom/parrot-vm-qrd.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot VM QRD";
compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

7
qcom/parrot-vm-qrd.dtsi Normal file
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@@ -0,0 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
};

15
qcom/parrot-vm-rumi.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "parrot-vm.dtsi"
#include "parrot-vm-rumi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Parrot SVM RUMI";
compatible = "qcom,parrot-rumi", "qcom,parrot", "qcom,rumi";
qcom,board-id = <15 0>;
};

8
qcom/parrot-vm-rumi.dtsi Normal file
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@@ -0,0 +1,8 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&arch_timer {
clock-frequency = <500000>;
};

146
qcom/parrot-vm.dtsi Normal file
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@@ -0,0 +1,146 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "waipio-vm.dtsi"
/ {
qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
<633 0x10000>, <634 0x10000>, <638 0x10000>;
interrupt-parent = <&vgic>;
qcom,vm-config {
iomemory-ranges = <0x0 0x0a28000 0x0 0x0a28000 0x0 0x4000 0x0
0x0 0xc400000 0x0 0xc400000 0x0 0x3000 0x1
0x0 0xc42d000 0x0 0xc42d000 0x0 0x4000 0x1
0x0 0xc440000 0x0 0xc440000 0x0 0x80000 0x1
0x0 0xc4c0000 0x0 0xc4c0000 0x0 0x10000 0x1
0x0 0xae8f000 0x0 0xae8f000 0x0 0x1000 0x0>;
gic-irq-ranges = <325 325>; /* PVM->SVM IRQ transfer */
vdevices {
gvsock-message-queue-pair {
status = "disabled";
};
};
};
};
&soc {
/delete-node/ interrupt-controller@17100000;
qcom,spmi@c42d000 {
status = "disabled";
};
vgic: interrupt-controller@17200000 {
compatible = "arm,gic-v3";
interrupt-controller;
#interrupt-cells = <0x3>;
#redistributor-regions = <1>;
redistributor-stride = <0x0 0x20000>;
reg = <0x17200000 0x10000>, /* GICD */
<0x17260000 0x100000>; /* GICR * 8 */
};
pinctrl@f000000 {
compatible = "qcom,parrot-vm-tlmm";
gpios = /bits/ 16 <>;
qcom,gpios-reserved = <0 1 2 3 38>;
};
tlmm-vm-mem-access {
tlmm-vm-gpio-list = <>;
};
apps-smmu@15000000 {
qcom,actlr =
/* Display and camera clients, +0 PF */
<0x800 0x7ff 0x1>,
<0x2000 0xE0 0x1>,
<0x2100 0x60 0x1>,
/* For video clients, +3 PF */
<0x2180 0x27 0x103>,
/* NSP clients, +15PF */
<0x1000 0x7ff 0x303>;
};
/delete-node/ qup_common_iommu_group;
/delete-node/ qcom,qupv3_0_geni_se@9c0000;
/delete-node/ qcom,gpi-dma@900000;
/delete-node/ i2c@990000;
/delete-node/ spi@990000;
qup_iommu_group: qup_common_iommu_group {
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
};
gpi_dma1: qcom,gpi-dma@a00000 {
compatible = "qcom,gpi-dma";
#dma-cells = <5>;
reg = <0xa00000 0x60000>;
reg-names = "gpi-top";
iommus = <&apps_smmu 0x418 0x0>;
qcom,iommu-group = <&qup_iommu_group>;
dma-coherent;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
qcom,max-num-gpii = <12>;
qcom,gpii-mask = <0x40>;
qcom,ev-factor = <2>;
qcom,gpi-ee-offset = <0x10000>;
qcom,le-vm;
status = "ok";
};
/* QUPv3_1 wrapper instance */
qupv3_1: qcom,qupv3_1_geni_se@ac0000 {
compatible = "qcom,geni-se-qup";
reg = <0xac0000 0x2000>;
iommus = <&apps_smmu 0x418 0x0>;
qcom,iommu-group = <&qup_iommu_group>;
dma-coherent;
status = "ok";
/* TUI over I2C */
qupv3_se9_i2c: i2c@a8c000 {
compatible = "qcom,i2c-geni";
reg = <0xa8c000 0x4000>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&gpi_dma1 0 3 3 64 0>,
<&gpi_dma1 1 3 3 64 0>;
dma-names = "tx", "rx";
qcom,le-vm;
status = "disabled";
};
qupv3_se9_spi: spi@a8c000 {
compatible = "qcom,spi-geni";
reg = <0xa8c000 0x4000>;
#address-cells = <1>;
#size-cells = <0>;
reg-names = "se_phys";
dmas = <&gpi_dma1 0 3 1 64 0>,
<&gpi_dma1 1 3 1 64 0>;
dma-names = "tx", "rx";
spi-max-frequency = <50000000>;
qcom,le-vm;
status = "disabled";
};
};
};

12
qcom/parrot.dtsi
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@@ -2047,12 +2047,20 @@
shared-buffers = <&trust_ui_vm_vblk0_ring &trust_ui_vm_swiotlb>;
};
qcom,virtio_backend@0 {
compatible = "qcom,virtio_backend";
trust_ui_vm_virt_be0: trust_ui_vm_virt_be0@11 {
qcom,vm = <&trust_ui_vm>;
qcom,label = <0x11>;
};
gh-secure-vm-loader@0 {
compatible = "qcom,gh-secure-vm-loader";
qcom,pas-id = <28>;
qcom,vmid = <45>;
qcom,firmware-name = "trustedvm";
memory-region = <&trust_ui_vm_mem>;
virtio-backends = <&trust_ui_vm_virt_be0>;
};
qrtr-gunyah {
compatible = "qcom,qrtr-gunyah";
qcom,master;

20
qcom/platform_map.bzl
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@@ -85,6 +85,26 @@ _platform_map = {
},
],
},
"parrot-tuivm": {
"dtb_list": [
# keep sorted
{"name": "parrot-vm-rumi.dtb"},
{"name": "parrot-vm-atp.dtb"},
{"name": "parrot-vm-idp.dtb"},
{"name": "parrot-vm-idp-wcn3990.dtb"},
{"name": "parrot-vm-idp-wcn3990-amoled-rcm.dtb"},
{"name": "parrot-vm-idp-wcn6750-amoled.dtb"},
{"name": "parrot-vm-idp-wcn6750-amoled-rcm.dtb"},
{"name": "parrot-vm-qrd.dtb"},
{"name": "parrot-vm-qrd-wcn6750.dtb"},
{"name": "ravelin-vm-rumi.dtb"},
{"name": "ravelin-vm-atp.dtb"},
{"name": "ravelin-vm-idp.dtb"},
{"name": "ravelin-vm-idp-wcn3988.dtb"},
{"name": "ravelin-vm-idp-wcn3950-amoled-rcm.dtb"},
{"name": "ravelin-vm-qrd.dtb"},
],
},
"sun-tuivm": {
"dtb_list": [
# keep sorted

15
qcom/ravelin-vm-atp.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "ravelin-vm.dtsi"
#include "ravelin-vm-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin SVM ATP";
compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp";
qcom,board-id = <33 0>;
};

7
qcom/ravelin-vm-atp.dtsi Normal file
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@@ -0,0 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
};

15
qcom/ravelin-vm-idp-wcn3950-amoled-rcm.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "ravelin-vm.dtsi"
#include "ravelin-vm-idp-wcn3950-amoled-rcm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin WCN3950 VM IDP + AMOLED + RCM";
compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
qcom,board-id = <34 2>;
};

9
qcom/ravelin-vm-idp-wcn3950-amoled-rcm.dtsi Normal file
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@@ -0,0 +1,9 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "ravelin-vm-idp.dtsi"
&soc {
};

15
qcom/ravelin-vm-idp-wcn3988.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "ravelin-vm.dtsi"
#include "ravelin-vm-idp-wcn3988.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin SVM IDP + WCN3988";
compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
qcom,board-id = <34 1>;
};

9
qcom/ravelin-vm-idp-wcn3988.dtsi Normal file
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@@ -0,0 +1,9 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "ravelin-vm-idp.dtsi"
&soc {
};

15
qcom/ravelin-vm-idp.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "ravelin-vm.dtsi"
#include "ravelin-vm-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin SVM IDP";
compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
qcom,board-id = <34 0>;
};

28
qcom/ravelin-vm-idp.dtsi Normal file
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@@ -0,0 +1,28 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
};
&qupv3_se1_i2c {
status = "ok";
focaltech@38 {
reg = <0x38>;
focaltech,display-coords = <0 0 1080 2408>;
focaltech,max-touch-number = <5>;
focaltech,ic-type = <0x8726081C>;
focaltech,reset-gpio-base = <0xF10C000>;
focaltech,intr-gpio-base = <0xF10D000>;
focaltech,trusted-touch-mode = "vm_mode";
focaltech,touch-environment = "tvm";
focaltech,trusted-touch-type = "primary";
focaltech,trusted-touch-spi-irq = <566>;
focaltech,trusted-touch-io-bases = <0x984000 0x910000>;
focaltech,trusted-touch-io-sizes = <0x1000 0x4000>;
focaltech,trusted-touch-vm-gpio-list = <&tlmm 10 0 &tlmm 11 0
&tlmm 12 0 &tlmm 13 0x2008>;
};
};

15
qcom/ravelin-vm-qrd.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "ravelin-vm.dtsi"
#include "ravelin-vm-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin VM QRD";
compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

7
qcom/ravelin-vm-qrd.dtsi Normal file
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@@ -0,0 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
};

15
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "ravelin-vm.dtsi"
#include "ravelin-vm-rumi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin SVM RUMI";
compatible = "qcom,ravelin-rumi", "qcom,ravelin", "qcom,rumi";
qcom,board-id = <15 0>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&arch_timer {
clock-frequency = <500000>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "waipio-vm.dtsi"
/ {
qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>;
interrupt-parent = <&vgic>;
qcom,vm-config {
iomemory-ranges = <0x0 0xae8f000 0x0 0xae8f000 0x0 0x1000 0x0
0x0 0x0928000 0x0 0x0928000 0x0 0x4000 0x0
0x0 0xc400000 0x0 0xc400000 0x0 0x3000 0x1
0x0 0xc42d000 0x0 0xc42d000 0x0 0x4000 0x1
0x0 0xc440000 0x0 0xc440000 0x0 0x80000 0x1
0x0 0xc4c0000 0x0 0xc4c0000 0x0 0x10000 0x1>;
gic-irq-ranges = <282 282>; /* PVM->SVM IRQ transfer */
vdevices {
gvsock-message-queue-pair {
status = "disabled";
};
};
};
};
&soc {
/delete-node/ interrupt-controller@17100000;
qcom,spmi@c42d000 {
status = "disabled";
};
vgic: interrupt-controller@17200000 {
compatible = "arm,gic-v3";
interrupt-controller;
#interrupt-cells = <0x3>;
#redistributor-regions = <1>;
redistributor-stride = <0x0 0x20000>;
reg = <0x17200000 0x10000>, /* GICD */
<0x17260000 0x100000>; /* GICR * 8 */
};
pinctrl@f000000 {
compatible = "qcom,ravelin-vm-tlmm";
gpios = /bits/ 16 <>;
qcom,gpios-reserved = <0 1 2 3 38>;
};
tlmm-vm-mem-access {
tlmm-vm-gpio-list = <>;
};
apps-smmu@15000000 {
qcom,actlr =
/* Display and camera clients, +0 PF */
<0x1900 0x3F 0x1>,
<0x1800 0xFF 0x1>,
<0x800 0x7FF 0x1>,
/* For video clients, +3 PF */
<0x1980 0x3F 0x103>;
};
/delete-node/ qup_common_iommu_group;
/delete-node/ qcom,qupv3_0_geni_se@9c0000;
/delete-node/ qcom,gpi-dma@900000;
/delete-node/ i2c@990000;
/delete-node/ spi@990000;
qup_iommu_group: qup_common_iommu_group {
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
};
gpi_dma0: qcom,gpi-dma@900000 {
compatible = "qcom,gpi-dma";
#dma-cells = <5>;
reg = <0x900000 0x60000>;
reg-names = "gpi-top";
iommus = <&apps_smmu 0x178 0x0>;
qcom,iommu-group = <&qup_iommu_group>;
dma-coherent;
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
qcom,max-num-gpii = <12>;
qcom,gpii-mask = <0x40>;
qcom,ev-factor = <2>;
qcom,gpi-ee-offset = <0x10000>;
qcom,le-vm;
status = "ok";
};
/* QUPv3_0 wrapper instance */
qupv3_0: qcom,qupv3_0_geni_se@9c0000 {
compatible = "qcom,geni-se-qup";
reg = <0x9c0000 0x2000>;
iommus = <&apps_smmu 0x178 0x0>;
qcom,iommu-group = <&qup_iommu_group>;
dma-coherent;
status = "ok";
/* Legacy Touch over I2C */
qupv3_se1_i2c: i2c@984000 {
compatible = "qcom,i2c-geni";
reg = <0x984000 0x4000>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&gpi_dma0 0 1 3 64 0>,
<&gpi_dma0 1 1 3 64 0>;
dma-names = "tx", "rx";
qcom,le-vm;
status = "disabled";
};
qupv3_se1_spi: spi@984000 {
compatible = "qcom,spi-geni";
reg = <0x984000 0x4000>;
#address-cells = <1>;
#size-cells = <0>;
reg-names = "se_phys";
dmas = <&gpi_dma0 0 1 1 64 0>,
<&gpi_dma0 1 1 1 64 0>;
dma-names = "tx", "rx";
spi-max-frequency = <50000000>;
qcom,le-vm;
status = "disabled";
};
};
};

12
qcom/ravelin.dtsi
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@@ -2454,12 +2454,20 @@
shared-buffers = <&trust_ui_vm_vblk0_ring &trust_ui_vm_swiotlb>;
};
qcom,virtio_backend@0 {
compatible = "qcom,virtio_backend";
trust_ui_vm_virt_be0: trust_ui_vm_virt_be0@11 {
qcom,vm = <&trust_ui_vm>;
qcom,label = <0x11>;
};
gh-secure-vm-loader@0 {
compatible = "qcom,gh-secure-vm-loader";
qcom,pas-id = <28>;
qcom,vmid = <45>;
qcom,firmware-name = "trustedvm";
memory-region = <&trust_ui_vm_mem>;
virtio-backends = <&trust_ui_vm_virt_be0>;
};
vendor_hooks: qcom,cpu-vendor-hooks {
compatible = "qcom,cpu-vendor-hooks";
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/arm/msm/qcom_dma_heap_dt_constants.h>
&soc {
qcom,dma-heaps {
compatible = "qcom,dma-heaps";
qcom,tui {
qcom,dma-heap-name = "qcom,tui";
qcom,dma-heap-type = <HEAP_TYPE_CARVEOUT>;
qcom,dynamic-heap;
};
};
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,rpmh.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
qcom,msm-id = <457 0x10000>, <482 0x10000>;
interrupt-parent = <&vgic>;
qcom,mem-buf {
compatible = "qcom,mem-buf";
qcom,mem-buf-capabilities = "consumer";
qcom,vmid = <45>;
};
qcom,mem-buf-msgq {
compatible = "qcom,mem-buf-msgq";
};
chosen {
bootargs = "nokaslr log_buf_len=256K console=hvc0 loglevel=8 swiotlb=noforce memhp_default_state=online_movable root=/dev/ram rw init=/init";
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
CPU0: cpu@0 {
compatible = "arm,armv8";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_PWR_DWN
&CLUSTER_PWR_DWN>;
};
CPU1: cpu@100 {
compatible = "arm,armv8";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_PWR_DWN
&CLUSTER_PWR_DWN>;
};
};
idle-states {
CPU_PWR_DWN: c4 { /* Using Gold C4 latencies */
compatible = "arm,idle-state";
idle-state-name = "rail-pc";
entry-latency-us = <600>;
exit-latency-us = <1550>;
min-residency-us = <4791>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
};
CLUSTER_PWR_DWN: d4 { /* C4+D4 */
compatible = "arm,idle-state";
idle-state-name = "l3-pc";
entry-latency-us = <1050>;
exit-latency-us = <2500>;
min-residency-us = <5309>;
arm,psci-suspend-param = <0x40000044>;
local-timer-stop;
};
};
qrtr-gunyah {
compatible = "qcom,qrtr-gunyah";
gunyah-label = <3>;
};
qcom,vm-config {
compatible = "qcom,vm-1.0";
vm-type = "aarch64-guest";
boot-config = "fdt,unified";
os-type = "linux";
kernel-entry-segment = "kernel";
kernel-entry-offset = <0x0 0x0>;
vendor = "QTI";
image-name = "qcom,trustedvm";
qcom,pasid = <0x0 0x1c>;
qcom,qtee-config-info = "p=7C,8F,97,159,199,7F1;";
qcom,secdomain-ids = <45>;
qcom,primary-vm-index = <0>;
vm-uri = "vmuid/trusted-ui";
vm-guid = "3f4d154a-92d3-54d0-9241-08e34c8bc670";
qcom,sensitive;
iomemory-ranges = <0x0 0x92c000 0x0 0x92c000 0x0 0x4000 0x0
0x0 0xc400000 0x0 0xc400000 0x0 0x3000 0x1
0x0 0xc42d000 0x0 0xc42d000 0x0 0x4000 0x1
0x0 0xc440000 0x0 0xc440000 0x0 0x80000 0x1
0x0 0xc4c0000 0x0 0xc4c0000 0x0 0x10000 0x1
0x0 0xae8f000 0x0 0xae8f000 0x0 0x1000 0x0>;
gic-irq-ranges = <283 283>; /* PVM->SVM IRQ transfer */
memory {
#address-cells = <0x2>;
#size-cells = <0x0>;
base-address = <0x0 0xe0b00000>;
size-min = <0x0 0x7a00000>; /* 122 MB */
};
segments {
ramdisk = <2>; /* 8MB */
};
vcpus {
config = "/cpus";
affinity = "static";
affinity-map = <0x5 0x6>;
sched-priority = <0>; /* relative to PVM */
sched-timeslice = <2000>; /* in ms */
};
interrupts {
config = &vgic;
};
vdevices {
generate = "/hypervisor";
rm-rpc {
vdevice-type = "rm-rpc";
generate = "/hypervisor/qcom,resource-mgr";
console-dev;
message-size = <0x000000f0>;
queue-depth = <0x00000008>;
qcom,label = <0x1>;
};
virtio-mmio@0 {
vdevice-type = "virtio-mmio";
generate = "/virtio-mmio";
peer-default;
vqs-num = <0x1>;
push-compatible = "virtio,mmio";
dma-coherent;
dma_base = <0x0 0x0>;
memory {
qcom,label = <0x11>;
#address-cells = <0x2>;
base = <0x0 0xFFEFC000>;
};
};
swiotlb-shm {
vdevice-type = "shm";
generate = "/swiotlb";
push-compatible = "swiotlb";
peer-default;
dma_base = <0x0 0x4000>;
memory {
qcom,label = <0x12>;
#address-cells = <0x2>;
base = <0x0 0xFFF00000>;
};
};
mem-buf-message-queue-pair {
vdevice-type = "message-queue-pair";
generate = "/hypervisor/membuf-msgq-pair";
message-size = <0x000000f0>;
queue-depth = <0x00000008>;
peer-default;
qcom,label = <0x0000001>;
};
display-message-queue-pair {
vdevice-type = "message-queue-pair";
generate = "/hypervisor/display-msgq-pair";
message-size = <0x000000f0>;
queue-depth = <0x00000008>;
peer-default;
qcom,label = <0x0000002>;
};
gvsock-message-queue-pair {
vdevice-type = "message-queue-pair";
generate = "/hypervisor/gvsock-msgq-pair";
message-size = <0x000000f0>;
queue-depth = <0x00000008>;
peer = "vm-name:qcom,oemvm";
qcom,label = <0x0000003>;
};
qrtr-shm {
vdevice-type = "shm-doorbell";
generate = "/hypervisor/qrtr-shm";
push-compatible = "qcom,qrtr-gunyah-gen";
peer-default;
memory {
qcom,label = <0x3>;
allocate-base;
};
};
gpiomem0 {
vdevice-type = "iomem";
patch = "/soc/tlmm-vm-mem-access";
push-compatible = "qcom,tlmm-vm-mem-access";
peer-default;
memory {
qcom,label = <0x8>;
qcom,mem-info-tag = <0x2>;
allocate-base;
};
};
test-dbl {
vdevice-type = "doorbell";
generate = "/hypervisor/test-dbl";
qcom,label = <0x4>;
peer-default;
};
test-dbl-source {
vdevice-type = "doorbell-source";
generate = "/hypervisor/test-dbl-source";
qcom,label = <0x4>;
peer-default;
};
};
};
firmware: firmware {
scm {
compatible = "qcom,scm";
};
};
soc: soc { };
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
spmi_bus: qcom,spmi@c42d000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0xc42d000 0x4000>,
<0xc400000 0x3000>,
<0xc500000 0x400000>,
<0xc440000 0x80000>,
<0xc4c0000 0x10000>;
reg-names = "cnfg", "core", "chnls", "obsrvr", "intr";
#address-cells = <2>;
#size-cells = <0>;
cell-index = <0>;
qcom,channel = <0>;
qcom,ee = <0>;
qcom,bus-id = <0>;
};
vm_tlmm_irq: vm-tlmm-irq@0 {
compatible = "qcom,tlmm-vm-irq";
reg = <0x0 0x0>;
interrupt-controller;
#interrupt-cells = <2>;
};
tlmm: pinctrl@f000000 {
reg = <0x0F000000 0x1000000>;
interrupts-extended = <&vm_tlmm_irq 1 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
/* Valid pins */
gpios = /bits/ 16 <64 65 66 67 0 4 86 87 16 17 18 19 20 21>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
tlmm-vm-mem-access {
compatible = "qcom,tlmm-vm-mem-access";
tlmm-vm-gpio-list = <365 366 367 368 301 305 387 388 317 318 319 320 321 322>;
};
vgic: interrupt-controller@17100000 {
compatible = "arm,gic-v3";
interrupt-controller;
#interrupt-cells = <0x3>;
#redistributor-regions = <1>;
redistributor-stride = <0x0 0x40000>;
reg = <0x17100000 0x10000>, /* GICD */
<0x17180000 0x100000>; /* GICR * 8 */
};
arch_timer: timer {
compatible = "arm,armv8-timer";
always-on;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <19200000>;
};
/*
* QUPv3 Instances
* North 4 : SE 4
*/
qup_iommu_group: qup_common_iommu_group {
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
};
/* GPI */
gpi_dma0: qcom,gpi-dma@900000 {
compatible = "qcom,gpi-dma";
#dma-cells = <5>;
reg = <0x900000 0x60000>;
reg-names = "gpi-top";
iommus = <&apps_smmu 0x5b8 0x0>;
qcom,iommu-group = <&qup_iommu_group>;
dma-coherent;
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
qcom,max-num-gpii = <12>;
qcom,gpii-mask = <0x80>;
qcom,ev-factor = <2>;
qcom,gpi-ee-offset = <0x10000>;
qcom,le-vm;
status = "ok";
};
/* QUPv3_0 wrapper instance: North QUP */
qupv3_0: qcom,qupv3_0_geni_se@9c0000 {
compatible = "qcom,geni-se-qup";
reg = <0x9c0000 0x2000>;
iommus = <&apps_smmu 0x5b8 0x0>;
qcom,iommu-group = <&qup_iommu_group>;
dma-coherent;
status = "ok";
/* I2C SE */
qupv3_se4_i2c: i2c@990000 {
compatible = "qcom,i2c-geni";
reg = <0x990000 0x4000>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&gpi_dma0 0 4 3 64 0>,
<&gpi_dma0 1 4 3 64 0>;
dma-names = "tx", "rx";
qcom,le-vm;
status = "disabled";
};
qupv3_se4_spi: spi@990000 {
compatible = "qcom,spi-geni";
reg = <0x990000 0x4000>;
reg-names = "se_phys";
#address-cells = <1>;
#size-cells = <0>;
dmas = <&gpi_dma0 0 4 1 64 0>,
<&gpi_dma0 1 4 1 64 0>;
dma-names = "tx", "rx";
spi-max-frequency = <50000000>;
qcom,le-vm;
status = "disabled";
};
};
qcom_smcinvoke {
compatible = "qcom,smcinvoke";
};
qtee_shmbridge {
compatible = "qcom,tee-shared-memory-bridge";
qcom,custom-bridge-size = <512>;
qcom,support-hypervisor;
};
qcom,test-dbl {
compatible = "qcom,gh-dbl";
qcom,label = <0x4>;
};
};
#include "waipio-vm-dma-heaps.dtsi"
#include "msm-arm-smmu-waipio-vm.dtsi"