From 1f53824ca5fb9c23b0a6ec667010a127e664fa87 Mon Sep 17 00:00:00 2001 From: Anjelique Melendez Date: Wed, 13 Sep 2023 17:56:52 -0700 Subject: [PATCH 1/3] dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIH010x and PMD802x bindings Update the Qualcomm Technologies, INC. PMIC GPIO binding documentation to include compatible strings for PMIH010x and PMD802x PMICs. Change-Id: Icf07b2f657d0e6fd104ae36553d1631caadcdb70 Signed-off-by: Anjelique Melendez --- bindings/pinctrl/qcom,pmic-gpio.yaml | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/bindings/pinctrl/qcom,pmic-gpio.yaml b/bindings/pinctrl/qcom,pmic-gpio.yaml index 72f44c12..f9ba0c54 100644 --- a/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -53,9 +53,11 @@ properties: - qcom,pm8994-gpio - qcom,pm8998-gpio - qcom,pma8084-gpio + - qcom,pmd802x-gpio - qcom,pmi8950-gpio - qcom,pmi8994-gpio - qcom,pmi8998-gpio + - qcom,pmih010x-gpio - qcom,pmk8350-gpio - qcom,pmk8550-gpio - qcom,pmm8155au-gpio @@ -136,6 +138,7 @@ allOf: - qcom,pm8005-gpio - qcom,pm8450-gpio - qcom,pm8916-gpio + - qcom,pmd802x-gpio - qcom,pmk8350-gpio - qcom,pmr735a-gpio - qcom,pmr735b-gpio @@ -309,6 +312,21 @@ allOf: minItems: 1 maxItems: 8 + - if: + properties: + comptaible: + contains: + enum: + - qcom,pmih010x-gpio + then: + properties: + gpio-line-names: + minItems: 18 + maxItems: 18 + gpio-reserved-ranges: + minItems: 1 + maxItems: 9 + - if: properties: compatible: @@ -439,8 +457,10 @@ $defs: - gpio1-gpio22 for pm8994 - gpio1-gpio26 for pm8998 - gpio1-gpio22 for pma8084 + - gpio1-gpio4 for pmd802x - gpio1-gpio2 for pmi8950 - gpio1-gpio10 for pmi8994 + - gpio1-gpio18 for pmih010x - gpio1-gpio4 for pmk8350 - gpio1-gpio6 for pmk8550 - gpio1-gpio10 for pmm8155au From ea8a9577b57daa6a12729ea5040ecf5f947d8fd3 Mon Sep 17 00:00:00 2001 From: Anjelique Melendez Date: Tue, 26 Sep 2023 11:06:38 -0700 Subject: [PATCH 2/3] ARM: dts: qcom: Prepare to add PMIC devices for Sun Sun and pineapple share certain PMICs. Prepare the shared PMIC devices to be used for both Sun and Pineapple. Change-Id: I378e781751b4ee42b3c0d4940dff30ffbd2b3e5a Signed-off-by: Anjelique Melendez --- qcom/pineapple-pmic-overlay.dtsi | 108 +++++++++++++++++++++++++++- qcom/pineapple-thermal-overlay.dtsi | 6 +- qcom/pm8550ve.dtsi | 18 ++--- qcom/pm8550vs.dtsi | 8 +++ qcom/pmk8550.dtsi | 71 ------------------ 5 files changed, 128 insertions(+), 83 deletions(-) diff --git a/qcom/pineapple-pmic-overlay.dtsi b/qcom/pineapple-pmic-overlay.dtsi index e57c2657..dbbea970 100644 --- a/qcom/pineapple-pmic-overlay.dtsi +++ b/qcom/pineapple-pmic-overlay.dtsi @@ -13,6 +13,46 @@ #include "pmk8550.dtsi" #include "pmr735d.dtsi" +&pm8550vs_c { + status = "ok"; +}; + +&pm8550vs_d { + status = "ok"; +}; + +&pm8550vs_e { + status = "ok"; +}; + +&pm8550vs_g { + status = "ok"; +}; + +&pm8550ve_i { + status = "ok"; +}; + +&pm8550vs_c_temp_alarm { + status = "ok"; +}; + +&pm8550vs_d_temp_alarm { + status = "ok"; +}; + +&pm8550vs_e_temp_alarm { + status = "ok"; +}; + +&pm8550vs_g_temp_alarm { + status = "ok"; +}; + +&pm8550ve_i_temp_alarm { + status = "ok"; +}; + &pm8550_gpios { key_vol_up { key_vol_up_default: key_vol_up_default { @@ -71,7 +111,7 @@ io-channel-names = "thermal"; }; -&pm8550ve_tz { +&pm8550ve_i_tz { io-channels = <&pmk8550_vadc PM8550VE_ADC5_GEN3_DIE_TEMP>; io-channel-names = "thermal"; }; @@ -162,6 +202,72 @@ reg = ; label = "pm8550b_ichg_fb"; }; + + pm8550b_offset_ref { + reg = ; + label = "pm8550b_offset_ref"; + qcom,pre-scaling = <1 1>; + }; + + pm8550b_vref_1p25 { + reg = ; + label = "pm8550b_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + pm8550b_die_temp { + reg = ; + label = "pm8550b_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pm8550b_lite_die_temp { + reg = ; + label = "pm8550b_lite_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pm8550b_vph_pwr { + reg = ; + label = "pm8550b_vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + pm8550b_vbat_sns_qbg { + reg = ; + label = "pm8550b_vbat_sns_qbg"; + qcom,pre-scaling = <1 3>; + }; + + pm8550vs_c_die_temp { + reg = ; + label = "pm8550vs_c_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pm8550vs_d_die_temp { + reg = ; + label = "pm8550vs_d_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pm8550vs_e_die_temp { + reg = ; + label = "pm8550vs_e_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pm8550vs_g_die_temp { + reg = ; + label = "pm8550vs_g_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pm8550ve_die_temp { + reg = ; + label = "pm8550ve_die_temp"; + qcom,pre-scaling = <1 1>; + }; }; &pmk8550_gpios { diff --git a/qcom/pineapple-thermal-overlay.dtsi b/qcom/pineapple-thermal-overlay.dtsi index 9eb5b324..0f78e0ef 100644 --- a/qcom/pineapple-thermal-overlay.dtsi +++ b/qcom/pineapple-thermal-overlay.dtsi @@ -226,10 +226,10 @@ }; }; - pm8550ve_tz { + pm8550ve_i_tz { cooling-maps { - pm8550ve_nsp { - trip = <&pm8550ve_trip0>; + pm8550ve_i_nsp { + trip = <&pm8550ve_i_trip0>; cooling-device = <&cdsp_sw_hvx 5 THERMAL_NO_LIMIT>; }; }; diff --git a/qcom/pm8550ve.dtsi b/qcom/pm8550ve.dtsi index e82971be..152456b4 100644 --- a/qcom/pm8550ve.dtsi +++ b/qcom/pm8550ve.dtsi @@ -12,20 +12,21 @@ interrupt-controller; #interrupt-cells = <4>; - qcom,pm8550ve@8 { + pm8550ve_i: qcom,pm8550ve@8 { compatible = "qcom,spmi-pmic"; reg = <0x8 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; - pm8550ve_tz: pm8550ve-temp-alarm@a00 { + pm8550ve_i_tz: pm8550ve-i-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; interrupts = <0x8 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; #thermal-sensor-cells = <0>; }; - pm8550ve_gpios: pinctrl@8800 { + pm8550ve_i_gpios: pinctrl@8800 { compatible = "qcom,pm8550ve-gpio"; reg = <0x8800>; gpio-controller; @@ -37,26 +38,27 @@ }; &thermal_zones { - pm8550ve_temp_alarm: pm8550ve_tz { + pm8550ve_i_temp_alarm: pm8550ve_i_tz { polling-delay-passive = <100>; polling-delay = <0>; thermal-governor = "step_wise"; - thermal-sensors = <&pm8550ve_tz>; + thermal-sensors = <&pm8550ve_i_tz>; + status = "disabled"; trips { - pm8550ve_trip0: trip0 { + pm8550ve_i_trip0: trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; - pm8550ve_trip1: trip1 { + pm8550ve_i_trip1: trip1 { temperature = <115000>; hysteresis = <0>; type = "passive"; }; - pm8550ve_trip2: trip2 { + pm8550ve_i_trip2: trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; diff --git a/qcom/pm8550vs.dtsi b/qcom/pm8550vs.dtsi index d03b8492..226f460f 100644 --- a/qcom/pm8550vs.dtsi +++ b/qcom/pm8550vs.dtsi @@ -17,6 +17,7 @@ reg = <0x2 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; pm8550vs_c_tz: pm8550vs-c-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; @@ -40,6 +41,7 @@ reg = <0x3 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; pm8550vs_d_tz: pm8550vs-d-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; @@ -63,6 +65,7 @@ reg = <0x4 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; pm8550vs_e_tz: pm8550vs-e-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; @@ -86,6 +89,7 @@ reg = <0x6 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; pm8550vs_g_tz: pm8550vs-g-temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; @@ -111,6 +115,7 @@ polling-delay = <0>; thermal-governor = "step_wise"; thermal-sensors = <&pm8550vs_c_tz>; + status = "disabled"; trips { pm8550vs_c_trip0: trip0 { @@ -138,6 +143,7 @@ polling-delay = <0>; thermal-governor = "step_wise"; thermal-sensors = <&pm8550vs_d_tz>; + status = "disabled"; trips { pm8550vs_d_trip0: trip0 { @@ -165,6 +171,7 @@ polling-delay = <0>; thermal-governor = "step_wise"; thermal-sensors = <&pm8550vs_e_tz>; + status = "disabled"; trips { pm8550vs_e_trip0: trip0 { @@ -192,6 +199,7 @@ polling-delay = <0>; thermal-governor = "step_wise"; thermal-sensors = <&pm8550vs_g_tz>; + status = "disabled"; trips { pm8550vs_g_trip0: trip0 { diff --git a/qcom/pmk8550.dtsi b/qcom/pmk8550.dtsi index dc53573f..23455f96 100644 --- a/qcom/pmk8550.dtsi +++ b/qcom/pmk8550.dtsi @@ -161,77 +161,6 @@ qcom,pre-scaling = <1 3>; }; - /* PM8550B Channel nodes */ - pm8550b_offset_ref { - reg = ; - label = "pm8550b_offset_ref"; - qcom,pre-scaling = <1 1>; - }; - - pm8550b_vref_1p25 { - reg = ; - label = "pm8550b_vref_1p25"; - qcom,pre-scaling = <1 1>; - }; - - pm8550b_die_temp { - reg = ; - label = "pm8550b_die_temp"; - qcom,pre-scaling = <1 1>; - }; - - pm8550b_lite_die_temp { - reg = ; - label = "pm8550b_lite_die_temp"; - qcom,pre-scaling = <1 1>; - }; - - pm8550b_vph_pwr { - reg = ; - label = "pm8550b_vph_pwr"; - qcom,pre-scaling = <1 3>; - }; - - pm8550b_vbat_sns_qbg { - reg = ; - label = "pm8550b_vbat_sns_qbg"; - qcom,pre-scaling = <1 3>; - }; - - /* PM8550VS_C Channel nodes */ - pm8550vs_c_die_temp { - reg = ; - label = "pm8550vs_c_die_temp"; - qcom,pre-scaling = <1 1>; - }; - - /* PM8550VS_D Channel nodes */ - pm8550vs_d_die_temp { - reg = ; - label = "pm8550vs_d_die_temp"; - qcom,pre-scaling = <1 1>; - }; - - /* PM8550VS_E Channel nodes */ - pm8550vs_e_die_temp { - reg = ; - label = "pm8550vs_e_die_temp"; - qcom,pre-scaling = <1 1>; - }; - - /* PM8550VS_G Channel nodes */ - pm8550vs_g_die_temp { - reg = ; - label = "pm8550vs_g_die_temp"; - qcom,pre-scaling = <1 1>; - }; - - /* PM8550VE Channel nodes */ - pm8550ve_die_temp { - reg = ; - label = "pm8550ve_die_temp"; - qcom,pre-scaling = <1 1>; - }; }; }; }; From 0720a9afe6002ce6a246f5e2d1c7ec98f745ff76 Mon Sep 17 00:00:00 2001 From: Anjelique Melendez Date: Mon, 18 Sep 2023 13:44:14 -0700 Subject: [PATCH 3/3] ARM: dts: qcom: add PMIC devices for Sun Add top level SPMI slave devices for PMD802x, PMIH010x, PM8550VE and PM8550VS. Change-Id: I7658cd5e9bb0c2801db10029380cb7a76a97abff Signed-off-by: Anjelique Melendez --- qcom/pm8550ve.dtsi | 34 +++++++++++++++++++++++++++++++++ qcom/pm8550vs.dtsi | 34 +++++++++++++++++++++++++++++++++ qcom/pmd802x.dtsi | 29 ++++++++++++++++++++++++++++ qcom/pmih010x.dtsi | 29 ++++++++++++++++++++++++++++ qcom/sun-cdp.dtsi | 1 + qcom/sun-mtp.dtsi | 1 + qcom/sun-pmic-overlay.dtsi | 39 ++++++++++++++++++++++++++++++++++++++ qcom/sun-qrd.dtsi | 1 + qcom/sun-rumi.dtsi | 2 ++ 9 files changed, 170 insertions(+) create mode 100644 qcom/pmd802x.dtsi create mode 100644 qcom/pmih010x.dtsi create mode 100644 qcom/sun-pmic-overlay.dtsi diff --git a/qcom/pm8550ve.dtsi b/qcom/pm8550ve.dtsi index 152456b4..0a330b76 100644 --- a/qcom/pm8550ve.dtsi +++ b/qcom/pm8550ve.dtsi @@ -12,6 +12,40 @@ interrupt-controller; #interrupt-cells = <4>; + pm8550ve_d: qcom,pm8550ve@3 { + compatible = "qcom,spmi-pmic"; + reg = <0x3 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pm8550ve_d_gpios: pinctrl@8800 { + compatible = "qcom,pm8550ve-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pm8550ve_g: qcom,pm8550ve@6 { + compatible = "qcom,spmi-pmic"; + reg = <0x6 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pm8550ve_g_gpios: pinctrl@8800 { + compatible = "qcom,pm8550ve-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + pm8550ve_i: qcom,pm8550ve@8 { compatible = "qcom,spmi-pmic"; reg = <0x8 SPMI_USID>; diff --git a/qcom/pm8550vs.dtsi b/qcom/pm8550vs.dtsi index 226f460f..caf385b8 100644 --- a/qcom/pm8550vs.dtsi +++ b/qcom/pm8550vs.dtsi @@ -84,6 +84,23 @@ }; }; + pm8550vs_f: qcom,pm8550vs@5 { + compatible = "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pm8550vs_f_gpios: pinctrl@8800 { + compatible = "qcom,pm8550vs-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + pm8550vs_g: qcom,pm8550vs@6 { compatible = "qcom,spmi-pmic"; reg = <0x6 SPMI_USID>; @@ -107,6 +124,23 @@ #interrupt-cells = <2>; }; }; + + pm8550vs_j: qcom,pm8550vs@9 { + compatible = "qcom,spmi-pmic"; + reg = <0x9 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pm8550vs_j_gpios: pinctrl@8800 { + compatible = "qcom,pm8550vs-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; }; &thermal_zones { diff --git a/qcom/pmd802x.dtsi b/qcom/pmd802x.dtsi new file mode 100644 index 00000000..5344b921 --- /dev/null +++ b/qcom/pmd802x.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pmd802x@4 { + compatible = "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmd802x_gpios: pinctrl@8800 { + compatible = "qcom,pmd802x-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; diff --git a/qcom/pmih010x.dtsi b/qcom/pmih010x.dtsi new file mode 100644 index 00000000..f6aa7860 --- /dev/null +++ b/qcom/pmih010x.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pmih010x@7 { + compatible = "qcom,spmi-pmic"; + reg = <0x7 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmih010x_gpios: pinctrl@8800 { + compatible = "qcom,pmih010x-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; diff --git a/qcom/sun-cdp.dtsi b/qcom/sun-cdp.dtsi index 8e86b1af..fa61d1a8 100644 --- a/qcom/sun-cdp.dtsi +++ b/qcom/sun-cdp.dtsi @@ -3,3 +3,4 @@ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include "sun-pmic-overlay.dtsi" diff --git a/qcom/sun-mtp.dtsi b/qcom/sun-mtp.dtsi index 8e86b1af..fa61d1a8 100644 --- a/qcom/sun-mtp.dtsi +++ b/qcom/sun-mtp.dtsi @@ -3,3 +3,4 @@ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include "sun-pmic-overlay.dtsi" diff --git a/qcom/sun-pmic-overlay.dtsi b/qcom/sun-pmic-overlay.dtsi new file mode 100644 index 00000000..65b2f045 --- /dev/null +++ b/qcom/sun-pmic-overlay.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +#include "pm8010.dtsi" +#include "pm8550.dtsi" +#include "pm8550ve.dtsi" +#include "pm8550vs.dtsi" +#include "pmd802x.dtsi" +#include "pmih010x.dtsi" +#include "pmk8550.dtsi" +#include "pmr735d.dtsi" + +&pm8550vs_f { + status = "ok"; +}; + +&pm8550vs_j { + status = "ok"; +}; + +&pm8550ve_d { + status = "ok"; +}; + +&pm8550ve_g { + status = "ok"; +}; + +&pm8550ve_i { + status = "ok"; +}; + +&pm8550ve_i_temp_alarm { + status = "ok"; +}; diff --git a/qcom/sun-qrd.dtsi b/qcom/sun-qrd.dtsi index 8e86b1af..fa61d1a8 100644 --- a/qcom/sun-qrd.dtsi +++ b/qcom/sun-qrd.dtsi @@ -3,3 +3,4 @@ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include "sun-pmic-overlay.dtsi" diff --git a/qcom/sun-rumi.dtsi b/qcom/sun-rumi.dtsi index 9f63fb7a..7a5b4839 100644 --- a/qcom/sun-rumi.dtsi +++ b/qcom/sun-rumi.dtsi @@ -7,6 +7,8 @@ #include #include +#include "sun-pmic-overlay.dtsi" + &reserved_memory { spintable: spintable_region@90000000 { no-map;