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ARM: dts: msm: add support for sw fuse for Sun target

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Add sw fuse range to dts file for Sun target. The swfuse_phys is only
needed in primary VM.

Change-Id: I8a7446c2f6cbf183a7bff6af463ff7f427467628
Signed-off-by: Ping Li <quic_pingli@quicinc.com>
This commit is contained in:
Ping Li
2024-09-05 13:18:08 -07:00
committed by Linux Display Service Account
parent bd65aed9a3
commit 5f9b22a66d
2 changed files with 5 additions and 3 deletions
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6
display/sun-sde-common.dtsi
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@@ -13,11 +13,13 @@
reg = <0x0ae00000 0x93800>, reg = <0x0ae00000 0x93800>,
<0x0aeb0000 0x2008>, <0x0aeb0000 0x2008>,
<0x0af80000 0x7000>, <0x0af80000 0x7000>,
<0x400000 0x2000>; <0x400000 0x2000>,
<0x0af50000 0x128>;
reg-names = "mdp_phys", reg-names = "mdp_phys",
"vbif_phys", "vbif_phys",
"regdma_phys", "regdma_phys",
"ipcc_reg"; "ipcc_reg",
"swfuse_phys";
/* interrupt config */ /* interrupt config */
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;

2
display/sun-sde.dtsi
View File

@@ -275,7 +275,7 @@
qcom,sde-soccp-controller = <&soccp_pas>; qcom,sde-soccp-controller = <&soccp_pas>;
qcom,sde-vm-exclude-reg-names = "ipcc_reg"; qcom,sde-vm-exclude-reg-names = "ipcc_reg", "swfuse_phys";
/* data and reg bus scale settings */ /* data and reg bus scale settings */
interconnects = <&mmss_noc MASTER_MDP &gem_noc SLAVE_LLCC>, interconnects = <&mmss_noc MASTER_MDP &gem_noc SLAVE_LLCC>,